| Mon, 13 Mar 2017 01:52:16 -0400 |
[C2] For the reason of deopt, the size of call-instructions must be the same. |
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| Wed, 08 Mar 2017 08:57:26 -0500 |
[C2] patchalbe_call32 for static java call. |
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| Wed, 08 Mar 2017 14:49:50 +0800 |
[C2] Fix the relocation for SafePoint in mips_64.ad. |
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| Tue, 07 Mar 2017 04:25:27 -0500 |
[C2] Polling at 0x10000 for MIPS. |
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| Mon, 06 Mar 2017 11:06:07 -0500 |
[C2] Fix li to patchable_set48 in CallStaticJavaDirect for MIPS. |
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| Sun, 05 Mar 2017 16:29:58 -0500 |
[C2] Use patchable_set48 in calls and jumps for MIPS CPUs. |
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| Sun, 05 Mar 2017 13:20:40 -0500 |
Adjust NativeCall for patchable_set48 on MIPS CPUs. |
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| Mon, 13 Mar 2017 15:56:48 +0800 |
#5014 Use dins/dinsu instructions to replace DSP instructions on 3A1000/3B1500. |
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| Sun, 05 Mar 2017 09:06:36 -0500 |
[C2] gsandn & gsorn are only supported on GS464E's ISA. |
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| Wed, 08 Mar 2017 05:19:55 +0800 |
[C2] adjust some format. |
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| Wed, 08 Mar 2017 02:30:50 +0800 |
[C2] Use gssdxc1 in storeD_imm0 for Loongson CPUs. |
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| Mon, 20 Feb 2017 13:00:42 +0800 |
[C2] Use gsswx in storeF_imm0 for Loongson CPUs. |
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| Mon, 20 Feb 2017 09:17:43 +0800 |
[C2] Use gslhx in load_S_enc for Loongson CPUs. |
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| Sun, 19 Feb 2017 08:52:27 +0800 |
[C2] Use gssbx in store_B_immI_enc_sync for Loongson CPUs. |
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| Sun, 19 Feb 2017 07:25:00 +0800 |
[C2] Use gsswx in store_I_immI_enc for Loongson CPUs. |
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| Sat, 18 Feb 2017 08:51:49 +0800 |
[C2] Use gssdx in store_P_reg_enc for Loongson CPUs. |
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| Fri, 17 Feb 2017 20:37:47 +0800 |
[C2] Modify some problems in last patch and Use gsswx in store_N_reg_enc for Loongson CPUs. |
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| Fri, 17 Feb 2017 17:22:14 +0800 |
[C2] Use gsldx in load_P_enc for Loongson CPUs. |
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| Wed, 01 Mar 2017 07:47:24 -0500 |
[C2] Rewrite loadConP_general and clean some dirty code. |
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| Wed, 01 Mar 2017 00:42:08 -0500 |
[C2] Rewrite loadConN & loadConNKlass in mips_64.ad |
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| Tue, 28 Feb 2017 12:02:36 -0500 |
[C2] Add storeC0 in mips_64.ad |
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| Tue, 28 Feb 2017 11:35:32 -0500 |
[C2] Remove storeImmP and add storeImmP0 in mips_64.ad |
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| Tue, 28 Feb 2017 10:29:54 -0500 |
[C2] Remove storeL_imm & storeL_reg_atomic in mips_64.ad |
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| Tue, 28 Feb 2017 09:53:43 -0500 |
[C2] Remove storeImmN & storeImmNKlass in mips_64.ad |
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| Fri, 24 Feb 2017 00:57:15 -0500 |
Sync before bgez in array_store_check() for MIPS. |
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| Thu, 23 Feb 2017 09:44:44 -0500 |
[C2] Add instruct xorL2I_Reg_immI_M1 in mips_64.add for Loongson CPUs. |
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| Thu, 23 Feb 2017 09:23:48 -0500 |
[C2] Add instruct salL2I_Reg_imm in mips_64.ad |
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| Thu, 23 Feb 2017 05:09:55 -0500 |
[C2] Add instruct sarL2I_Reg_immI_32_63 in mips_64.ad |
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| Wed, 22 Feb 2017 22:24:24 +0800 |
[C2] Add instruct slrL_Reg_immI_0_31_and_max_int in mips_64.ad |
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| Wed, 22 Feb 2017 22:02:26 +0800 |
[C2] Add instruct andL2I_Reg_imm_0_65535 in mips_64.ad |
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| Wed, 22 Feb 2017 17:31:07 -0500 |
[C2] Add instruct storeB_convL2I in mips_64.ad |
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| Wed, 22 Feb 2017 16:36:00 -0500 |
[C2] Add instruct slrL_Reg_immI_convL2I in mips_64.ad |
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| Mon, 20 Feb 2017 12:23:10 -0500 |
[C2] Add instruct rotI_shr_logical_Reg in mips_64.ad |
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| Sun, 19 Feb 2017 17:43:11 -0500 |
[C2] Add instruct combine_i2l in mips_64.ad |
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| Thu, 23 Feb 2017 09:08:41 +0800 |
#5131 [C2] Fix ReplicateS. |
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| Mon, 20 Feb 2017 22:24:57 +0800 |
[C2] Add salI_Reg_imm_and_M65536 in mips_64.ad |
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| Mon, 20 Feb 2017 22:13:56 +0800 |
[C2] low(a, b) --> Assembler::low(a, b) in mips_64.ad |
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| Mon, 20 Feb 2017 22:04:56 +0800 |
[C2] Optimize sarL_Reg_imm for MIPS. |
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| Mon, 20 Feb 2017 21:58:46 +0800 |
[C2] Optimize sarL_Reg_Reg & slrL_Reg_Reg for MIPS. |
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| Mon, 20 Feb 2017 21:54:25 +0800 |
[C2] Remove unnecessary dsllv in mips_64.ad |
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| Mon, 20 Feb 2017 21:35:55 +0800 |
[Assembler] Redefine the srl instruction for MIPS. |
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| Mon, 20 Feb 2017 21:27:49 +0800 |
[Assembler] Redefine the sll instruction for MIPS. |
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| Sat, 18 Feb 2017 19:19:48 -0500 |
[C2] Add logical right-rotate instructions for long in mips_64.ad |
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| Sat, 18 Feb 2017 18:56:55 -0500 |
[C2] Add rolI_Reg_immI_0_31 and rorI_Reg_immI_0_31 in mips_64.ad |
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| Sun, 19 Feb 2017 17:42:22 +0800 |
[C2] Optimize zero-extend operations for MIPS following changeset 9baf2a6cb610. |
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| Sun, 19 Feb 2017 17:09:02 +0800 |
[C2] Optimize instruct salL_Reg_Reg in mips_64.ad |
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| Sun, 19 Feb 2017 16:34:38 +0800 |
[C2] Use dext to optimize zero-extend operations for MIPS. |
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| Thu, 16 Feb 2017 09:56:42 -0500 |
[C2] Add instruct convD2L_reg_fast in mips_64.ad |
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| Thu, 16 Feb 2017 08:59:10 -0500 |
[C2] Add instruct convD2I_reg_reg_fast in mips_64.ad |
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| Thu, 16 Feb 2017 07:55:00 -0500 |
[C2] Add instruct convF2L_reg_fast in mips_64.ad |
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| Thu, 16 Feb 2017 05:45:03 -0500 |
[C2] Optimize cmpF3_reg_reg, cmpD3_reg_reg and cmpL3_reg_reg in mips_64.ad |
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| Thu, 16 Feb 2017 03:58:02 -0500 |
[C2] Remove instruct loadConI_65536 in mips_64.ad |
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| Wed, 15 Feb 2017 15:56:09 -0500 |
[C2] Add instruct convF2I_reg_fast in mips_64.ad |
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| Wed, 15 Feb 2017 15:23:24 -0500 |
Delete an unused instruct in mips_64.ad |
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| Wed, 15 Feb 2017 13:43:16 -0500 |
[C2] Add instruct mulL_reg_regI2L in mips_64.ad |
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| Wed, 15 Feb 2017 12:58:01 -0500 |
[C2] Add instruct convL2I2L_reg_reg_zex in mips_64.ad |
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| Wed, 15 Feb 2017 12:37:43 -0500 |
[C2] Add instruct convL2I2L_reg in mips_64.ad |
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| Wed, 15 Feb 2017 10:22:07 -0500 |
[C2] Add instruct andL_Reg_immL_nonneg_mask in mips_64.ad |
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| Wed, 15 Feb 2017 09:29:03 -0500 |
[C2] Add instruct andI_Reg_immI_nonneg_mask in mips_64.ad |
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| Wed, 15 Feb 2017 07:56:12 -0500 |
[C2] gsandn & gsorn are not designed for long on Loongson CPUs. |
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