Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Sun Mar 05 13:20:40 2017 -0500
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Sun Mar 05 16:29:58 2017 -0500
     1.3 @@ -570,7 +570,10 @@
     1.4   *                            *  If we change from JR to JALR, the assert will disappear, but WebClient will
     1.5   *                               *  fail  after the 403th method with unknown reason.
     1.6   *                                  */
     1.7 -  __ li48(T9, (long)OptoRuntime::exception_blob()->entry_point());
     1.8 +  cbuf.set_insts_mark();
     1.9 +  __ relocate(relocInfo::runtime_call_type);
    1.10 +
    1.11 +  __ patchable_set48(T9, (long)OptoRuntime::exception_blob()->entry_point());
    1.12    __ jr(T9);
    1.13    __ delayed()->nop();
    1.14    __ align(16);
    1.15 @@ -596,7 +599,7 @@
    1.16    cbuf.set_insts_mark();
    1.17    __ relocate(relocInfo::runtime_call_type);
    1.18  
    1.19 -  __ li48(T9, (long)SharedRuntime::deopt_blob()->unpack());
    1.20 +  __ patchable_set48(T9, (long)SharedRuntime::deopt_blob()->unpack());
    1.21    __ jalr(T9);
    1.22    __ delayed()->nop();
    1.23    __ align(16);
    1.24 @@ -656,14 +659,14 @@
    1.25  */
    1.26  
    1.27    // static stub relocation also tags the methodOop in the code-stream.
    1.28 -  __ li48(S3, (long)0);
    1.29 +  __ patchable_set48(S3, (long)0);
    1.30    // This is recognized as unresolved by relocs/nativeInst/ic code
    1.31  
    1.32    __ relocate(relocInfo::runtime_call_type);
    1.33  
    1.34    cbuf.set_insts_mark();
    1.35    address call_pc = (address)-1;
    1.36 -  __ li48(AT, (long)call_pc);
    1.37 +  __ patchable_set48(AT, (long)call_pc);
    1.38    __ jr(AT);
    1.39    __ nop();
    1.40    __ align(16);
    1.41 @@ -1614,7 +1617,7 @@
    1.42    __ nop();
    1.43  
    1.44    __ relocate(relocInfo::runtime_call_type);
    1.45 -  __ li48(T9, (long)SharedRuntime::get_ic_miss_stub());
    1.46 +  __ patchable_set48(T9, (long)SharedRuntime::get_ic_miss_stub());
    1.47    __ jr(T9);
    1.48    __ nop();
    1.49  
    1.50 @@ -1658,19 +1661,19 @@
    1.51      address baseaddr = consts_section->start() + -(constant_table.table_base_offset());
    1.52      // RelocationHolder rspec = internal_word_Relocation::spec(baseaddr);
    1.53      __ relocate(relocInfo::internal_pc_type);
    1.54 -    __ li48(Rtoc, (long)baseaddr);
    1.55 +    __ patchable_set48(Rtoc, (long)baseaddr);
    1.56    }
    1.57  }
    1.58  
    1.59  uint MachConstantBaseNode::size(PhaseRegAlloc* ra_) const {
    1.60 -  // li48 (4 insts)
    1.61 +  // patchable_set48 (4 insts)
    1.62    return 4 * 4;
    1.63  }
    1.64  
    1.65  #ifndef PRODUCT
    1.66  void MachConstantBaseNode::format(PhaseRegAlloc* ra_, outputStream* st) const {
    1.67    Register r = as_Register(ra_->get_encode(this));
    1.68 -  st->print("li48    %s, &constanttable (constant table base) @ MachConstantBaseNode", r->name());
    1.69 +  st->print("patchable_set48    %s, &constanttable (constant table base) @ MachConstantBaseNode", r->name());
    1.70  }
    1.71  #endif
    1.72  
    1.73 @@ -3384,7 +3387,7 @@
    1.74      cbuf.set_insts_mark();
    1.75      __ relocate(relocInfo::runtime_call_type);
    1.76  
    1.77 -    __ li48(T9, (long)$meth$$method);
    1.78 +    __ patchable_set48(T9, (long)$meth$$method);
    1.79      __ jalr(T9);
    1.80      __ nop();
    1.81      %}
    1.82 @@ -6503,13 +6506,13 @@
    1.83      	RelocationHolder rspec = metadata_Relocation::spec(klass_index);
    1.84      
    1.85      	__ relocate(rspec);
    1.86 -    	__ li48(dst, (long)value);
    1.87 +    	__ patchable_set48(dst, (long)value);
    1.88      }else if($src->constant_reloc() == relocInfo::oop_type){
    1.89      	int oop_index = __ oop_recorder()->find_index((jobject)value);
    1.90      	RelocationHolder rspec = oop_Relocation::spec(oop_index);
    1.91      
    1.92      	__ relocate(rspec);
    1.93 -    	__ li48(dst, (long)value);
    1.94 +    	__ patchable_set48(dst, (long)value);
    1.95      } else if ($src->constant_reloc() == relocInfo::none) {
    1.96          __ set64(dst, (long)value);
    1.97      }

     2.1 --- a/src/cpu/mips/vm/nativeInst_mips.cpp	Sun Mar 05 13:20:40 2017 -0500
     2.2 +++ b/src/cpu/mips/vm/nativeInst_mips.cpp	Sun Mar 05 16:29:58 2017 -0500
     2.3 @@ -976,6 +976,68 @@
     2.4           ((NativeInstruction *)this)->is_cond_jump(), "not a general jump instruction");
     2.5  }
     2.6  
     2.7 +void  NativeGeneralJump::patch_set48(address dest) {
     2.8 +  jlong value = (jlong) dest;
     2.9 +  int  rt_reg = (int_at(0) & (0x1f << 16));
    2.10 +  int  rs_reg = rt_reg << 5;
    2.11 +  int  rd_reg = rt_reg >> 5;
    2.12 +
    2.13 +  int hi = (int)(value >> 32);
    2.14 +  int lo = (int)(value & ~0);
    2.15 +
    2.16 +  int count = 0;
    2.17 +
    2.18 +  if (value == lo) {  // 32-bit integer
    2.19 +    if (Assembler::is_simm16(value)) {
    2.20 +      //daddiu(d, R0, value);
    2.21 +      set_int_at(count << 2, (Assembler::daddiu_op << 26) | rt_reg | Assembler::split_low(value));
    2.22 +      count += 1;
    2.23 +    } else {
    2.24 +      //lui(d, split_low(value >> 16));
    2.25 +      set_int_at(count << 2, (Assembler::lui_op << 26) | rt_reg | Assembler::split_low(value >> 16));
    2.26 +      count += 1;
    2.27 +      if (Assembler::split_low(value)) {
    2.28 +        //ori(d, d, split_low(value));
    2.29 +        set_int_at(count << 2, (Assembler::ori_op << 26) | rs_reg | rt_reg | Assembler::split_low(value));
    2.30 +        count += 1;
    2.31 +      }
    2.32 +    }
    2.33 +  } else if (hi == 0) {  // hardware zero-extends to upper 32
    2.34 +      //ori(d, R0, julong(value) >> 16);
    2.35 +      set_int_at(count << 2, (Assembler::ori_op << 26) | rt_reg | Assembler::split_low(julong(value) >> 16));
    2.36 +      count += 1;
    2.37 +      //dsll(d, d, 16);
    2.38 +      set_int_at(count << 2, (Assembler::dsll_op) | rt_reg | rd_reg | (16 << 6));
    2.39 +      count += 1;
    2.40 +      if (Assembler::split_low(value)) {
    2.41 +        //ori(d, d, split_low(value));
    2.42 +        set_int_at(count << 2, (Assembler::ori_op << 26) | rs_reg | rt_reg | Assembler::split_low(value));
    2.43 +        count += 1;
    2.44 +      }
    2.45 +  } else if ((value> 0) && Assembler::is_simm16(value >> 32)) {
    2.46 +    //lui(d, value >> 32);
    2.47 +    set_int_at(count << 2, (Assembler::lui_op << 26) | rt_reg | Assembler::split_low(value >> 32));
    2.48 +    count += 1;
    2.49 +    //ori(d, d, split_low(value >> 16));
    2.50 +    set_int_at(count << 2, (Assembler::ori_op << 26) | rs_reg | rt_reg | Assembler::split_low(value >> 16));
    2.51 +    count += 1;
    2.52 +    //dsll(d, d, 16);
    2.53 +    set_int_at(count << 2, (Assembler::dsll_op) | rt_reg | rd_reg | (16 << 6));
    2.54 +    count += 1;
    2.55 +    //ori(d, d, split_low(value));
    2.56 +    set_int_at(count << 2, (Assembler::ori_op << 26) | rs_reg | rt_reg | Assembler::split_low(value));
    2.57 +    count += 1;
    2.58 +  } else {
    2.59 +    tty->print_cr("dest = 0x%x", value);
    2.60 +    guarantee(false, "Not supported yet !");
    2.61 +  }
    2.62 +
    2.63 +  for (count; count < 4; count++) {
    2.64 +    //nop();
    2.65 +    set_int_at(count << 2, 0);
    2.66 +  }
    2.67 +}
    2.68 +
    2.69  
    2.70  void  NativeGeneralJump::set_jump_destination(address dest) {
    2.71  //tty->print_cr("NativeGeneralJump::set_jump_destination dest=%lx", dest);
    2.72 @@ -997,22 +1059,7 @@
    2.73      set_int_at(4, (int_at(4) & 0xffff0000) | (Assembler::split_low((intptr_t)dest) & 0xffff));
    2.74      ICache::invalidate_range(addr_at(0), 8);
    2.75  #else
    2.76 -  /* li64 or li48 */
    2.77 -  if (is_special_op(int_at(16), Assembler::dsll_op)) {
    2.78 -    set_int_at(0, (int_at(0) & 0xffff0000) | (Assembler::split_low((intptr_t)dest >> 48) & 0xffff));
    2.79 -    set_int_at(4, (int_at(4) & 0xffff0000) | (Assembler::split_low((intptr_t)dest >> 32) & 0xffff));
    2.80 -    set_int_at(12, (int_at(12) & 0xffff0000) | (Assembler::split_low((intptr_t)dest >> 16) & 0xffff));
    2.81 -    set_int_at(20, (int_at(20) & 0xffff0000) | (Assembler::split_low((intptr_t)dest) & 0xffff));
    2.82 -  } else {
    2.83 -    int jr_word = int_at(16);
    2.84 -    set_int_at(16, 0x1000fffb); /* .1: --; --; --; --; b .1; nop */
    2.85 -
    2.86 -    set_int_at(0, (int_at(0) & 0xffff0000) | (Assembler::split_low((intptr_t)dest >> 32) & 0xffff));
    2.87 -    set_int_at(4, (int_at(4) & 0xffff0000) | (Assembler::split_low((intptr_t)dest >> 16) & 0xffff));
    2.88 -    set_int_at(12, (int_at(12) & 0xffff0000) | (Assembler::split_low((intptr_t)dest) & 0xffff));
    2.89 -    set_int_at(16, jr_word);    /* .1: --; --; --; --; jr ; nop */
    2.90 -  }
    2.91 -
    2.92 +  patch_set48(dest);
    2.93    ICache::invalidate_range(addr_at(0), 24);
    2.94  #endif
    2.95    }
    2.96 @@ -1095,18 +1142,134 @@
    2.97      return target;
    2.98    }
    2.99  
   2.100 -  /* li64 or li48 */
   2.101 -  if (is_special_op(int_at(16), Assembler::dsll_op)) {
   2.102 -    return (address)Assembler::merge( (intptr_t)(int_at(20) & 0xffff), 
   2.103 -				      (intptr_t)(int_at(12) & 0xffff),
   2.104 -				      (intptr_t)(int_at(4) & 0xffff),
   2.105 -				      (intptr_t)(int_at(0) & 0xffff));
   2.106 -  } else {
   2.107 -    return (address)Assembler::merge( (intptr_t)(int_at(12) & 0xffff), 
   2.108 -				    (intptr_t)(int_at(4) & 0xffff),
   2.109 -				    (intptr_t)(int_at(0) & 0xffff),
   2.110 -				    ((int_at(0) & 0xffff) >= 0x8000) ? (intptr_t)0xffff : (intptr_t)0); /* sign-extended to 64-bit*/
   2.111 +  // li64
   2.112 +  if ( is_op(Assembler::lui_op) &&
   2.113 +        is_op(int_at(4), Assembler::ori_op) &&
   2.114 +        is_special_op(int_at(8), Assembler::dsll_op) &&
   2.115 +        is_op(int_at(12), Assembler::ori_op) &&
   2.116 +        is_special_op(int_at(16), Assembler::dsll_op) &&
   2.117 +        is_op(int_at(20), Assembler::ori_op) ) {
   2.118 +
   2.119 +      return (address)Assembler::merge( (intptr_t)(int_at(20) & 0xffff),
   2.120 +                               (intptr_t)(int_at(12) & 0xffff),
   2.121 +                               (intptr_t)(int_at(4) & 0xffff),
   2.122 +                               (intptr_t)(int_at(0) & 0xffff));
   2.123    }
   2.124 +
   2.125 +  //lui dst, imm16
   2.126 +  //ori dst, dst, imm16
   2.127 +  //dsll dst, dst, 16
   2.128 +  //ori dst, dst, imm16
   2.129 +  if (  is_op(Assembler::lui_op) &&
   2.130 +          is_op (int_at(4), Assembler::ori_op) &&
   2.131 +          is_special_op(int_at(8), Assembler::dsll_op) &&
   2.132 +          is_op (int_at(12), Assembler::ori_op) ) {
   2.133 +
   2.134 +      return (address)Assembler::merge( (intptr_t)(int_at(12) & 0xffff), 
   2.135 +		               (intptr_t)(int_at(4) & 0xffff),
   2.136 +			       (intptr_t)(int_at(0) & 0xffff),
   2.137 +			       (intptr_t)0);
   2.138 +  }
   2.139 +
   2.140 +  //ori dst, R0, imm16
   2.141 +  //dsll dst, dst, 16
   2.142 +  //ori dst, dst, imm16
   2.143 +  //nop
   2.144 +  if (  is_op(Assembler::ori_op) &&
   2.145 +          is_special_op(int_at(4), Assembler::dsll_op) &&
   2.146 +          is_op (int_at(8), Assembler::ori_op) &&
   2.147 +          nativeInstruction_at(addr_at(12))->is_nop()) {
   2.148 +
   2.149 +      return (address)Assembler::merge( (intptr_t)(int_at(8) & 0xffff),
   2.150 +                               (intptr_t)(int_at(0) & 0xffff),
   2.151 +                               (intptr_t)0,
   2.152 +                               (intptr_t)0);
   2.153 +  }
   2.154 +
   2.155 +  //ori dst, R0, imm16
   2.156 +  //dsll dst, dst, 16
   2.157 +  //nop
   2.158 +  //nop
   2.159 +  if (  is_op(Assembler::ori_op) &&
   2.160 +          is_special_op(int_at(4), Assembler::dsll_op) &&
   2.161 +          nativeInstruction_at(addr_at(8))->is_nop()   &&
   2.162 +          nativeInstruction_at(addr_at(12))->is_nop()) {
   2.163 +
   2.164 +      return (address)Assembler::merge( (intptr_t)(0),
   2.165 +                               (intptr_t)(int_at(0) & 0xffff),
   2.166 +                               (intptr_t)0,
   2.167 +                               (intptr_t)0);
   2.168 +  }
   2.169 +
   2.170 +  //daddiu dst, R0, imm16
   2.171 +  //nop
   2.172 +  //nop
   2.173 +  //nop
   2.174 +  if (  is_op(Assembler::daddiu_op) &&
   2.175 +          nativeInstruction_at(addr_at(4))->is_nop() &&
   2.176 +          nativeInstruction_at(addr_at(8))->is_nop() &&
   2.177 +          nativeInstruction_at(addr_at(12))->is_nop() ) {
   2.178 +
   2.179 +      int sign = int_at(0) & 0x8000;
   2.180 +      if (sign == 0) {
   2.181 +         return (address)Assembler::merge( (intptr_t)(int_at(0) & 0xffff),
   2.182 +                                  (intptr_t)0,
   2.183 +                                  (intptr_t)0,
   2.184 +                                  (intptr_t)0);
   2.185 +      } else {
   2.186 +         return (address)Assembler::merge( (intptr_t)(int_at(0) & 0xffff),
   2.187 +                                  (intptr_t)(0xffff),
   2.188 +                                  (intptr_t)(0xffff),
   2.189 +                                  (intptr_t)(0xffff));
   2.190 +      }
   2.191 +  }
   2.192 +
   2.193 +  //lui dst, imm16
   2.194 +  //ori dst, dst, imm16
   2.195 +  //nop
   2.196 +  //nop
   2.197 +  if (  is_op(Assembler::lui_op) &&
   2.198 +          is_op (int_at(4), Assembler::ori_op) &&
   2.199 +          nativeInstruction_at(addr_at(8))->is_nop() &&
   2.200 +          nativeInstruction_at(addr_at(12))->is_nop() ) {
   2.201 +
   2.202 +      int sign = int_at(0) & 0x8000;
   2.203 +      if (sign == 0) {
   2.204 +         return (address)Assembler::merge( (intptr_t)(int_at(4) & 0xffff),
   2.205 +                                  (intptr_t)(int_at(0) & 0xffff),
   2.206 +                                  (intptr_t)0,
   2.207 +                                  (intptr_t)0);
   2.208 +      } else {
   2.209 +         return (address)Assembler::merge( (intptr_t)(int_at(4) & 0xffff),
   2.210 +                                  (intptr_t)(int_at(0) & 0xffff),
   2.211 +                                  (intptr_t)(0xffff),
   2.212 +                                  (intptr_t)(0xffff));
   2.213 +      }
   2.214 +  }
   2.215 +
   2.216 +  //lui dst, imm16
   2.217 +  //nop
   2.218 +  //nop
   2.219 +  //nop
   2.220 +  if (  is_op(Assembler::lui_op) &&
   2.221 +          nativeInstruction_at(addr_at(4))->is_nop() &&
   2.222 +          nativeInstruction_at(addr_at(8))->is_nop() &&
   2.223 +          nativeInstruction_at(addr_at(12))->is_nop() ) {
   2.224 +
   2.225 +      int sign = int_at(0) & 0x8000;
   2.226 +      if (sign == 0) {
   2.227 +         return (address)Assembler::merge( (intptr_t)0,
   2.228 +                                  (intptr_t)(int_at(0) & 0xffff),
   2.229 +                                  (intptr_t)0,
   2.230 +                                  (intptr_t)0);
   2.231 +      } else {
   2.232 +         return (address)Assembler::merge( (intptr_t)0,
   2.233 +                                  (intptr_t)(int_at(0) & 0xffff),
   2.234 +                                  (intptr_t)(0xffff),
   2.235 +                                  (intptr_t)(0xffff));
   2.236 +      }
   2.237 +  }
   2.238 +
   2.239  #endif
   2.240  }
   2.241  
   2.242 @@ -1188,6 +1351,62 @@
   2.243            is_special_op(int_at(8), Assembler::dsll_op) &&
   2.244            is_op(int_at(12), Assembler::ori_op)) 
   2.245      return true;
   2.246 +
   2.247 +  //ori dst, R0, imm16
   2.248 +  //dsll dst, dst, 16
   2.249 +  //ori dst, dst, imm16
   2.250 +  //nop
   2.251 +  if (  is_op(Assembler::ori_op) &&
   2.252 +	  is_special_op(int_at(4), Assembler::dsll_op) &&
   2.253 +	  is_op	(int_at(8), Assembler::ori_op) &&
   2.254 +          nativeInstruction_at(addr_at(12))->is_nop()) {
   2.255 +      return true;
   2.256 +  }
   2.257 +
   2.258 +  //ori dst, R0, imm16
   2.259 +  //dsll dst, dst, 16
   2.260 +  //nop
   2.261 +  //nop
   2.262 +  if (  is_op(Assembler::ori_op) &&
   2.263 +	  is_special_op(int_at(4), Assembler::dsll_op) &&
   2.264 +	  nativeInstruction_at(addr_at(8))->is_nop()   &&
   2.265 +          nativeInstruction_at(addr_at(12))->is_nop()) {
   2.266 +      return true;
   2.267 +  }
   2.268 +
   2.269 +  //daddiu dst, R0, imm16
   2.270 +  //nop
   2.271 +  //nop
   2.272 +  //nop
   2.273 +  if (  is_op(Assembler::daddiu_op) &&
   2.274 +	  nativeInstruction_at(addr_at(4))->is_nop() &&
   2.275 +	  nativeInstruction_at(addr_at(8))->is_nop() &&
   2.276 +	  nativeInstruction_at(addr_at(12))->is_nop() ) {
   2.277 +      return true;
   2.278 +  }
   2.279 +
   2.280 +  //lui dst, imm16
   2.281 +  //ori dst, dst, imm16
   2.282 +  //nop
   2.283 +  //nop
   2.284 +  if (  is_op(Assembler::lui_op) &&
   2.285 +	  is_op	(int_at(4), Assembler::ori_op) &&
   2.286 +	  nativeInstruction_at(addr_at(8))->is_nop() &&
   2.287 +	  nativeInstruction_at(addr_at(12))->is_nop() ) {
   2.288 +      return true;
   2.289 +  }
   2.290 +
   2.291 +  //lui dst, imm16
   2.292 +  //nop
   2.293 +  //nop
   2.294 +  //nop
   2.295 +  if (  is_op(Assembler::lui_op) &&
   2.296 +	  nativeInstruction_at(addr_at(4))->is_nop() &&
   2.297 +	  nativeInstruction_at(addr_at(8))->is_nop() &&
   2.298 +	  nativeInstruction_at(addr_at(12))->is_nop() ) {
   2.299 +      return true;
   2.300 +  }
   2.301 +
   2.302    return false;
   2.303  #endif
   2.304  }

     3.1 --- a/src/cpu/mips/vm/nativeInst_mips.hpp	Sun Mar 05 13:20:40 2017 -0500
     3.2 +++ b/src/cpu/mips/vm/nativeInst_mips.hpp	Sun Mar 05 16:29:58 2017 -0500
     3.3 @@ -407,6 +407,7 @@
     3.4    address instruction_address() const { return addr_at(instruction_offset); }
     3.5    address jump_destination();
     3.6  
     3.7 +  void  patch_set48(address dest);
     3.8    void  set_jump_destination(address dest);
     3.9  
    3.10  	// Creation
    3.11 @@ -512,24 +513,91 @@
    3.12           is_op(long_at(4), Assembler::addiu_op) &&
    3.13  	 is_special_op(long_at(8), Assembler::jalr_op);
    3.14  #else
    3.15 -  /* li64 or li48 */
    3.16 -  if (is_special_op(long_at(16), Assembler::dsll_op)) {
    3.17 -  /* li64 */
    3.18 -    return is_op(long_at(0), Assembler::lui_op) &&
    3.19 -           is_op(long_at(4), Assembler::ori_op) &&
    3.20 -           is_special_op(long_at(8), Assembler::dsll_op) &&
    3.21 -           is_op(long_at(12), Assembler::ori_op) &&
    3.22 -           is_special_op(long_at(16), Assembler::dsll_op) &&
    3.23 -           is_op(long_at(20), Assembler::ori_op) &&
    3.24 -	   is_special_op(long_at(24), Assembler::jalr_op);
    3.25 -  } else {
    3.26 -  /* li48 */
    3.27 -    return is_op(long_at(0), Assembler::lui_op) &&
    3.28 -           is_op(long_at(4), Assembler::ori_op) &&
    3.29 -           is_special_op(long_at(8), Assembler::dsll_op) &&
    3.30 -           is_op(long_at(12), Assembler::ori_op) &&
    3.31 -	   is_special_op(long_at(16), Assembler::jalr_op);
    3.32 +// li64
    3.33 +  if ( is_op(Assembler::lui_op) &&
    3.34 +	is_op(int_at(4), Assembler::ori_op) &&
    3.35 +	is_special_op(int_at(8), Assembler::dsll_op) &&
    3.36 +	is_op(int_at(12), Assembler::ori_op) &&
    3.37 +	is_special_op(int_at(16), Assembler::dsll_op) &&
    3.38 +	is_op(int_at(20), Assembler::ori_op) &&
    3.39 +        is_special_op(int_at(24), Assembler::jalr_op) ) {
    3.40 +      return true;
    3.41    }
    3.42 +
    3.43 +  //lui dst, imm16
    3.44 +  //ori dst, dst, imm16
    3.45 +  //dsll dst, dst, 16
    3.46 +  //ori dst, dst, imm16
    3.47 +  if (  is_op(Assembler::lui_op) &&
    3.48 +	  is_op	(int_at(4), Assembler::ori_op) &&
    3.49 +	  is_special_op(int_at(8), Assembler::dsll_op) &&
    3.50 +	  is_op	(int_at(12), Assembler::ori_op) &&
    3.51 +          is_special_op(int_at(16), Assembler::jalr_op) ) {
    3.52 +      return true;
    3.53 +  }
    3.54 +
    3.55 +  //ori dst, R0, imm16
    3.56 +  //dsll dst, dst, 16
    3.57 +  //ori dst, dst, imm16
    3.58 +  //nop
    3.59 +  if (  is_op(Assembler::ori_op) &&
    3.60 +	  is_special_op(int_at(4), Assembler::dsll_op) &&
    3.61 +	  is_op	(int_at(8), Assembler::ori_op) &&
    3.62 +          nativeInstruction_at(addr_at(12))->is_nop() &&
    3.63 +          is_special_op(int_at(16), Assembler::jalr_op) ) {
    3.64 +      return true;
    3.65 +  }
    3.66 +
    3.67 +  //ori dst, R0, imm16
    3.68 +  //dsll dst, dst, 16
    3.69 +  //nop
    3.70 +  //nop
    3.71 +  if (  is_op(Assembler::ori_op) &&
    3.72 +	  is_special_op(int_at(4), Assembler::dsll_op) &&
    3.73 +	  nativeInstruction_at(addr_at(8))->is_nop()   &&
    3.74 +          nativeInstruction_at(addr_at(12))->is_nop() &&
    3.75 +          is_special_op(int_at(16), Assembler::jalr_op) ) {
    3.76 +      return true;
    3.77 +  }
    3.78 +
    3.79 +  //daddiu dst, R0, imm16
    3.80 +  //nop
    3.81 +  //nop
    3.82 +  //nop
    3.83 +  if (  is_op(Assembler::daddiu_op) &&
    3.84 +	  nativeInstruction_at(addr_at(4))->is_nop() &&
    3.85 +	  nativeInstruction_at(addr_at(8))->is_nop() &&
    3.86 +	  nativeInstruction_at(addr_at(12))->is_nop() &&
    3.87 +          is_special_op(int_at(16), Assembler::jalr_op) ) {
    3.88 +      return true;
    3.89 +  }
    3.90 +
    3.91 +  //lui dst, imm16
    3.92 +  //ori dst, dst, imm16
    3.93 +  //nop
    3.94 +  //nop
    3.95 +  if (  is_op(Assembler::lui_op) &&
    3.96 +	  is_op	(int_at(4), Assembler::ori_op) &&
    3.97 +	  nativeInstruction_at(addr_at(8))->is_nop() &&
    3.98 +	  nativeInstruction_at(addr_at(12))->is_nop() && 
    3.99 +          is_special_op(int_at(16), Assembler::jalr_op) ) {
   3.100 +      return true;
   3.101 +  }
   3.102 +
   3.103 +  //lui dst, imm16
   3.104 +  //nop
   3.105 +  //nop
   3.106 +  //nop
   3.107 +  if (  is_op(Assembler::lui_op) &&
   3.108 +	  nativeInstruction_at(addr_at(4))->is_nop() &&
   3.109 +	  nativeInstruction_at(addr_at(8))->is_nop() &&
   3.110 +	  nativeInstruction_at(addr_at(12))->is_nop() && 
   3.111 +          is_special_op(int_at(16), Assembler::jalr_op) ) {
   3.112 +      return true;
   3.113 +  }
   3.114 +
   3.115 +  return false;
   3.116 +
   3.117  #endif
   3.118  }
   3.119  

     4.1 --- a/src/cpu/mips/vm/relocInfo_mips.cpp	Sun Mar 05 13:20:40 2017 -0500
     4.2 +++ b/src/cpu/mips/vm/relocInfo_mips.cpp	Sun Mar 05 16:29:58 2017 -0500
     4.3 @@ -87,6 +87,8 @@
     4.4    } else if (ni->is_cond_jump()) {
     4.5  		return nativeCondJump_at(addr())->jump_destination() +adj;
     4.6    } else {
     4.7 +    tty->print_cr("\nError!\ncall destination: 0x%lx", addr());
     4.8 +    Disassembler::decode(addr() - 10 * 4, addr() + 10 * 4, tty);
     4.9      ShouldNotReachHere();
    4.10      return NULL;
    4.11    }