1.1 --- a/src/cpu/mips/vm/mips_64.ad Wed Mar 22 10:12:55 2017 +0800
1.2 +++ b/src/cpu/mips/vm/mips_64.ad Sun Mar 05 13:20:40 2017 -0500
1.3 @@ -865,7 +865,7 @@
1.4 // The address of the call instruction needs to be 16-byte aligned to
1.5 // ensure that it does not span a cache line so that it can be patched.
1.6 int CallDynamicJavaDirectNode::compute_padding(int current_offset) const {
1.7 - //li64 <--- skip
1.8 + //loadIC <--- skip
1.9
1.10 //lui
1.11 //ori
1.12 @@ -875,7 +875,7 @@
1.13 //jalr
1.14 //nop
1.15
1.16 - current_offset += 4 * 6; // skip li64
1.17 + current_offset += 4 * 4;
1.18 return round_to(current_offset, alignment_required()) - current_offset;
1.19 }
1.20
1.21 @@ -961,9 +961,6 @@
1.22 }
1.23
1.24 int MachCallDynamicJavaNode::ret_addr_offset() {
1.25 - /* 2012/9/10 Jin: must be kept in sync with Java_Dynamic_Call */
1.26 -
1.27 - // return NativeCall::instruction_size;
1.28 assert(NativeCall::instruction_size == 24, "in MachCallDynamicJavaNode::ret_addr_offset");
1.29 //The value ought to be 4 + 16 bytes.
1.30 //lui IC_Klass,
1.31 @@ -976,8 +973,7 @@
1.32 //ori T9
1.33 //jalr T9
1.34 //nop
1.35 - return 6 * 4 + NativeCall::instruction_size;
1.36 -
1.37 + return 4 * 4 + NativeCall::instruction_size;
1.38 }
1.39
1.40 //=============================================================================
