Mon, 20 Feb 2017 22:04:56 +0800
[C2] Optimize sarL_Reg_imm for MIPS.
src/cpu/mips/vm/mips_64.ad | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/mips_64.ad Mon Feb 20 21:58:46 2017 +0800 1.2 +++ b/src/cpu/mips/vm/mips_64.ad Mon Feb 20 22:04:56 2017 +0800 1.3 @@ -10951,10 +10951,13 @@ 1.4 int shamt = ($shift$$constant & 0x3f); 1.5 if (__ is_simm(shamt, 5)) 1.6 __ dsra(dst_reg, src_reg, shamt); 1.7 - else 1.8 - { 1.9 - __ move(AT, shamt); 1.10 - __ dsrav(dst_reg, src_reg, AT); 1.11 + else { 1.12 + int sa = low(shamt, 6); 1.13 + if (sa < 32) { 1.14 + __ dsra(dst_reg, src_reg, sa); 1.15 + } else { 1.16 + __ dsra32(dst_reg, src_reg, sa - 32); 1.17 + } 1.18 } 1.19 %} 1.20 ins_pipe( ialu_regL_regL );