Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Thu Mar 02 07:17:36 2017 -0500
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Fri Feb 17 17:22:14 2017 +0800
     1.3 @@ -2534,27 +2534,59 @@
     1.4  	 assert(disp_reloc == relocInfo::none, "cannot have disp");
     1.5  
     1.6       if( index != 0 ) {
     1.7 -        if (scale == 0) {
     1.8 -           __ daddu(AT, as_Register(base), as_Register(index));
     1.9 -        } else {
    1.10 -           __ dsll(AT, as_Register(index), scale);
    1.11 -           __ daddu(AT, as_Register(base), AT);
    1.12 -        }
    1.13 -        if( Assembler::is_simm16(disp) ) { 
    1.14 -           __ ld(as_Register(dst), AT, disp);
    1.15 -        } else {
    1.16 -           __ li(T9, disp);
    1.17 -           __ daddu(AT, AT, T9);
    1.18 -           __ ld(as_Register(dst), AT, 0);
    1.19 -        }    
    1.20 +	if ( UseLoongsonISA ) {
    1.21 +	   if ( Assembler::is_simm(disp, 8) ) {
    1.22 +	      if ( scale != 0 ) {
    1.23 +                 __ dsll(AT, as_Register(index), scale);
    1.24 +	      } else {
    1.25 +                 __ move(AT, as_Register(index));
    1.26 +              }
    1.27 +	      __ gsldx(as_Register(dst), as_Register(base), AT, disp);
    1.28 + 	   } else {
    1.29 +              if ( scale != 0 ) {
    1.30 +                 __ dsll(AT, as_Register(index), scale);
    1.31 +                 __ move(T9, disp);
    1.32 +                 __ daddu(AT, AT, T9);
    1.33 +              } else {
    1.34 +                 __ move(T9, disp);
    1.35 +                 __ daddu(AT, as_Register(index), T9);
    1.36 +              }
    1.37 +              __ gsldx(as_Register(dst), as_Register(base), AT, 0);
    1.38 +           }
    1.39 +	} else { //not use loongson isa
    1.40 +	   if (scale == 0) {
    1.41 +              __ daddu(AT, as_Register(base), as_Register(index));
    1.42 +           } else {
    1.43 +              __ dsll(AT, as_Register(index), scale);
    1.44 +              __ daddu(AT, as_Register(base), AT);
    1.45 +           }     
    1.46 +           if( Assembler::is_simm16(disp) ) { 
    1.47 +              __ ld(as_Register(dst), AT, disp);
    1.48 +           } else {
    1.49 +              __ li(T9, disp);
    1.50 +              __ daddu(AT, AT, T9);
    1.51 +              __ ld(as_Register(dst), AT, 0);
    1.52 +           }  
    1.53 +	}    
    1.54       } else {
    1.55 -        if( Assembler::is_simm16(disp) ) { 
    1.56 -           __ ld(as_Register(dst), as_Register(base), disp);
    1.57 -        } else {
    1.58 -           __ li(T9, disp);   
    1.59 -           __ daddu(AT, as_Register(base), T9);
    1.60 -           __ ld(as_Register(dst), AT, 0);
    1.61 -        }    
    1.62 +	if ( UseLoongsonISA ) {
    1.63 +	   if( Assembler::is_simm(disp, 8) ) {
    1.64 +	      __ gsldx(as_Register(dst), as_Register(base), R0, disp);
    1.65 +	   } else if ( Assembler::is_simm16(disp) ){
    1.66 +	      __ ld(as_Register(dst), as_Register(base), disp);
    1.67 +	   } else {
    1.68 +	      __ li(T9, disp);
    1.69 + 	      __ gsldx(as_Register(dst), as_Register(base), T9, 0);
    1.70 +	   }
    1.71 +	} else { //not use loongson isa
    1.72 +	   if( Assembler::is_simm16(disp) ) { 
    1.73 +              __ ld(as_Register(dst), as_Register(base), disp);
    1.74 +           } else {
    1.75 +              __ li(T9, disp);   
    1.76 +              __ daddu(AT, as_Register(base), T9);
    1.77 +              __ ld(as_Register(dst), AT, 0);
    1.78 +           }
    1.79 +	}
    1.80       }
    1.81  //     if( disp_reloc != relocInfo::none) __ ld(as_Register(dst), as_Register(dst), 0);
    1.82    %}