1.1 --- a/src/cpu/mips/vm/mips_64.ad Tue Feb 28 10:29:54 2017 -0500
1.2 +++ b/src/cpu/mips/vm/mips_64.ad Tue Feb 28 11:35:32 2017 -0500
1.3 @@ -2613,58 +2613,62 @@
1.4 }
1.5 %}
1.6
1.7 - enc_class store_P_immP_enc (memory mem, immP31 src) %{
1.8 + enc_class store_P_immP0_enc (memory mem) %{
1.9 MacroAssembler _masm(&cbuf);
1.10 int base = $mem$$base;
1.11 int index = $mem$$index;
1.12 int scale = $mem$$scale;
1.13 int disp = $mem$$disp;
1.14 - long value = $src$$constant;
1.15
1.16 if( index != 0 ) {
1.17 if (scale == 0) {
1.18 - __ daddu(AT, as_Register(base), as_Register(index));
1.19 + if( Assembler::is_simm16(disp) ) {
1.20 + if (UseLoongsonISA && Assembler::is_simm(disp, 8)) {
1.21 + __ gssdx(R0, as_Register(base), as_Register(index), disp);
1.22 + } else {
1.23 + __ daddu(AT, as_Register(base), as_Register(index));
1.24 + __ sd(R0, AT, disp);
1.25 + }
1.26 + } else {
1.27 + __ daddu(AT, as_Register(base), as_Register(index));
1.28 + __ move(T9, disp);
1.29 + if(UseLoongsonISA) {
1.30 + __ gssdx(R0, AT, T9, 0);
1.31 + } else {
1.32 + __ daddu(AT, AT, T9);
1.33 + __ sd(R0, AT, 0);
1.34 + }
1.35 + }
1.36 } else {
1.37 __ dsll(AT, as_Register(index), scale);
1.38 - __ daddu(AT, as_Register(base), AT);
1.39 + if( Assembler::is_simm16(disp) ) {
1.40 + if (UseLoongsonISA && Assembler::is_simm(disp, 8)) {
1.41 + __ gssdx(R0, as_Register(base), AT, disp);
1.42 + } else {
1.43 + __ daddu(AT, as_Register(base), AT);
1.44 + __ sd(R0, AT, disp);
1.45 + }
1.46 + } else {
1.47 + __ daddu(AT, as_Register(base), AT);
1.48 + __ move(T9, disp);
1.49 + if (UseLoongsonISA) {
1.50 + __ gssdx(R0, AT, T9, 0);
1.51 + } else {
1.52 + __ daddu(AT, AT, T9);
1.53 + __ sd(R0, AT, 0);
1.54 + }
1.55 + }
1.56 }
1.57 - if( Assembler::is_simm16(disp) ) {
1.58 - if (value == 0) {
1.59 - __ sd(R0, AT, disp);
1.60 - } else {
1.61 - __ move(T9, value);
1.62 - __ sd(T9, AT, disp);
1.63 - }
1.64 - } else {
1.65 - if (value == 0) {
1.66 - __ move(T9, disp);
1.67 - __ daddu(AT, AT, T9);
1.68 - __ sd(R0, AT, 0);
1.69 - } else {
1.70 - __ move(T9, disp);
1.71 - __ daddu(AT, AT, T9);
1.72 - __ move(T9, value);
1.73 - __ sd(T9, AT, 0);
1.74 - }
1.75 - }
1.76 } else {
1.77 if( Assembler::is_simm16(disp) ) {
1.78 - if (value == 0) {
1.79 - __ sd(R0, as_Register(base), disp);
1.80 + __ sd(R0, as_Register(base), disp);
1.81 + } else {
1.82 + __ move(T9, disp);
1.83 + if (UseLoongsonISA) {
1.84 + __ gssdx(R0, as_Register(base), T9, 0);
1.85 } else {
1.86 - __ move(AT, value);
1.87 - __ sd(AT, as_Register(base), disp);
1.88 - }
1.89 - } else {
1.90 - if (value == 0) {
1.91 - __ move(T9, disp);
1.92 - __ daddu(AT, as_Register(base), T9);
1.93 - __ sd(R0, AT, 0);
1.94 - } else {
1.95 - __ move(T9, disp);
1.96 - __ daddu(AT, as_Register(base), T9);
1.97 - __ move(T9, value);
1.98 - __ sd(T9, AT, 0);
1.99 + __ daddu(AT, as_Register(base), T9);
1.100 + __ sd(R0, AT, 0);
1.101 }
1.102 }
1.103 }
1.104 @@ -3618,17 +3622,6 @@
1.105 interface(CONST_INTER);
1.106 %}
1.107
1.108 -operand immP31()
1.109 -%{
1.110 - predicate(n->as_Type()->type()->reloc() == relocInfo::none
1.111 - && (n->get_ptr() >> 31) == 0);
1.112 - match(ConP);
1.113 -
1.114 - op_cost(5);
1.115 - format %{ %}
1.116 - interface(CONST_INTER);
1.117 -%}
1.118 -
1.119 // NULL Pointer Immediate
1.120 operand immP0() %{
1.121 predicate( n->get_ptr() == 0 );
1.122 @@ -6002,29 +5995,13 @@
1.123 ins_pipe( ialu_storeI );
1.124 %}
1.125
1.126 -/*
1.127 -[Ref: loadConP]
1.128 -
1.129 -Error:
1.130 - 0x2d4b6d40: lui t9, 0x4f <--- handle
1.131 - 0x2d4b6d44: addiu t9, t9, 0xffff808c
1.132 - 0x2d4b6d48: sw t9, 0x4(s2)
1.133 -
1.134 -OK:
1.135 - 0x2cc5ed40: lui t9, 0x336a <--- klass
1.136 - 0x2cc5ed44: addiu t9, t9, 0x5a10
1.137 - 0x2cc5ed48: sw t9, 0x4(s2)
1.138 -*/
1.139 -// Store Pointer Immediate; null pointers or constant oops that do not
1.140 -// need card-mark barriers.
1.141 -
1.142 // Store NULL Pointer, mark word, or other simple pointer constant.
1.143 -instruct storeImmP(memory mem, immP31 src) %{
1.144 - match(Set mem (StoreP mem src));
1.145 -
1.146 - ins_cost(150);
1.147 - format %{ "mov $mem, $src #@storeImmP" %}
1.148 - ins_encode(store_P_immP_enc(mem, src));
1.149 +instruct storeImmP0(memory mem, immP0 zero) %{
1.150 + match(Set mem (StoreP mem zero));
1.151 +
1.152 + ins_cost(125);
1.153 + format %{ "mov $mem, $zero #@storeImmP0" %}
1.154 + ins_encode(store_P_immP0_enc(mem));
1.155 ins_pipe( ialu_storeI );
1.156 %}
1.157
