1.1 --- a/src/cpu/mips/vm/mips_64.ad Wed Feb 22 16:36:00 2017 -0500 1.2 +++ b/src/cpu/mips/vm/mips_64.ad Wed Feb 22 17:31:07 2017 -0500 1.3 @@ -6355,6 +6355,15 @@ 1.4 ins_pipe( ialu_storeI ); 1.5 %} 1.6 1.7 +instruct storeB_convL2I(memory mem, mRegL src) %{ 1.8 + match(Set mem (StoreB mem (ConvL2I src))); 1.9 + 1.10 + ins_cost(125); 1.11 + format %{ "sb $src, $mem #@storeB_convL2I" %} 1.12 + ins_encode(store_B_reg_enc(mem, src)); 1.13 + ins_pipe( ialu_storeI ); 1.14 +%} 1.15 + 1.16 // Load Byte (8bit signed) 1.17 instruct loadB(mRegI dst, memory mem) %{ 1.18 match(Set dst (LoadB mem));