1.1 --- a/src/cpu/mips/vm/mips_64.ad Mon Mar 06 05:13:05 2017 -0500
1.2 +++ b/src/cpu/mips/vm/mips_64.ad Mon Mar 06 11:06:07 2017 -0500
1.3 @@ -2705,7 +2705,7 @@
1.4 if( Assembler::is_simm16(disp) ) {
1.5 __ lwu(as_Register(dst), AT, disp);
1.6 } else {
1.7 - __ li(T9, disp);
1.8 + __ set64(T9, disp);
1.9 __ daddu(AT, AT, T9);
1.10 __ lwu(as_Register(dst), AT, 0);
1.11 }
1.12 @@ -2713,7 +2713,7 @@
1.13 if( Assembler::is_simm16(disp) ) {
1.14 __ lwu(as_Register(dst), as_Register(base), disp);
1.15 } else {
1.16 - __ li(T9, disp);
1.17 + __ set64(T9, disp);
1.18 __ daddu(AT, as_Register(base), T9);
1.19 __ lwu(as_Register(dst), AT, 0);
1.20 }
1.21 @@ -2770,7 +2770,7 @@
1.22 if( Assembler::is_simm16(disp) ) {
1.23 __ ld(as_Register(dst), AT, disp);
1.24 } else {
1.25 - __ li(T9, disp);
1.26 + __ set64(T9, disp);
1.27 __ daddu(AT, AT, T9);
1.28 __ ld(as_Register(dst), AT, 0);
1.29 }
1.30 @@ -2780,14 +2780,14 @@
1.31 if ( Assembler::is_simm16(disp) ){
1.32 __ ld(as_Register(dst), as_Register(base), disp);
1.33 } else {
1.34 - __ li(T9, disp);
1.35 + __ set64(T9, disp);
1.36 __ gsldx(as_Register(dst), as_Register(base), T9, 0);
1.37 }
1.38 } else { //not use loongson isa
1.39 if( Assembler::is_simm16(disp) ) {
1.40 __ ld(as_Register(dst), as_Register(base), disp);
1.41 } else {
1.42 - __ li(T9, disp);
1.43 + __ set64(T9, disp);
1.44 __ daddu(AT, as_Register(base), T9);
1.45 __ ld(as_Register(dst), AT, 0);
1.46 }
1.47 @@ -3406,7 +3406,7 @@
1.48 __ relocate(relocInfo::static_call_type);
1.49 }
1.50
1.51 - __ li(T9, $meth$$method);
1.52 + __ patchable_set48(T9, $meth$$method);
1.53 __ jalr(T9);
1.54 __ nop();
1.55 if( _method ) { // Emit stub for static call
1.56 @@ -6784,7 +6784,7 @@
1.57 cbuf.relocate(cbuf.insts_mark(), runtime_call_Relocation::spec());
1.58
1.59 // call OptoRuntime::rethrow_stub to get the exception handler in parent method
1.60 - __ li(T9, OptoRuntime::rethrow_stub());
1.61 + __ patchable_set48(T9, (jlong)OptoRuntime::rethrow_stub());
1.62 __ jr(T9);
1.63 __ nop();
1.64 %}
