[C2] Add instruct combine_i2l in mips_64.ad

Sun, 19 Feb 2017 17:43:11 -0500

author
fujie
date
Sun, 19 Feb 2017 17:43:11 -0500
changeset 326
82d0812bdc67
parent 325
6e68a953851f
child 327
0797c3ebbee4

[C2] Add instruct combine_i2l in mips_64.ad

src/cpu/mips/vm/mips_64.ad file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Thu Feb 23 09:08:41 2017 +0800
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Sun Feb 19 17:43:11 2017 -0500
     1.3 @@ -13093,6 +13093,29 @@
     1.4    ins_pipe(ialu_regI_regI);
     1.5  %}
     1.6  
     1.7 +instruct combine_i2l(mRegL dst, mRegI src1, immL_32bits mask, mRegI src2, immI_32 shift32)
     1.8 +%{
     1.9 +  match(Set dst (OrL (AndL (ConvI2L src1) mask) (LShiftL (ConvI2L src2) shift32)));
    1.10 +
    1.11 +  format %{ "combine_i2l    $dst, $src2(H), $src1(L) @ combine_i2l" %}
    1.12 +  ins_encode %{
    1.13 +    Register dst  = $dst$$Register;
    1.14 +    Register src1 = $src1$$Register;
    1.15 +    Register src2 = $src2$$Register;
    1.16 +
    1.17 +    if (src1 == dst) {
    1.18 +       __ dinsu(dst, src2, 32, 32);
    1.19 +    } else if (src2 == dst) {
    1.20 +       __ dsll32(dst, dst, 0); 
    1.21 +       __ dins(dst, src1, 0, 32);
    1.22 +    } else {
    1.23 +       __ dext(dst, src1, 0, 32);
    1.24 +       __ dinsu(dst, src2, 32, 32);
    1.25 +    }
    1.26 +  %}
    1.27 +  ins_pipe(ialu_regI_regI);
    1.28 +%}
    1.29 +
    1.30  // Zero-extend convert int to long
    1.31  instruct convI2L_reg_reg_zex(mRegL dst, mRegI src, immL_32bits mask)
    1.32  %{

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