[C2] Add instruct andL2I_Reg_imm_0_65535 in mips_64.ad

Wed, 22 Feb 2017 22:02:26 +0800

author
fujie
date
Wed, 22 Feb 2017 22:02:26 +0800
changeset 330
71b95a0448a7
parent 329
6ad65b8037b8
child 331
592fd7ca9efb

[C2] Add instruct andL2I_Reg_imm_0_65535 in mips_64.ad

src/cpu/mips/vm/mips_64.ad file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Wed Feb 22 17:31:07 2017 -0500
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Wed Feb 22 22:02:26 2017 +0800
     1.3 @@ -10588,6 +10588,21 @@
     1.4    ins_pipe( ialu_regI_regI );
     1.5  %}
     1.6  
     1.7 +instruct andL2I_Reg_imm_0_65535(mRegI dst, mRegL src1,  immL_0_65535 src2) %{
     1.8 +  match(Set dst (ConvL2I (AndL src1 src2)));
     1.9 +  ins_cost(60);
    1.10 +
    1.11 +  format %{ "and  $dst, $src1, $src2 #@andL2I_Reg_imm_0_65535" %}
    1.12 +  ins_encode %{
    1.13 +    Register dst = $dst$$Register;
    1.14 +    Register src = $src1$$Register;
    1.15 +    long     val = $src2$$constant;
    1.16 +    
    1.17 +       __ andi(dst, src, val);
    1.18 +  %}
    1.19 +  ins_pipe( ialu_regI_regI );
    1.20 +%}
    1.21 +
    1.22  /*
    1.23  instruct andnL_Reg_nReg(mRegL dst, mRegL src1,  mRegL src2, immL_M1 M1) %{
    1.24    match(Set dst (AndL src1 (XorL src2 M1)));

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