Mon, 13 Mar 2017 15:56:48 +0800
#5014 Use dins/dinsu instructions to replace DSP instructions on 3A1000/3B1500.
src/cpu/mips/vm/mips_64.ad | file | annotate | diff | comparison | revisions |
1.1 --- a/src/cpu/mips/vm/mips_64.ad Thu Mar 09 16:31:15 2017 +0800 1.2 +++ b/src/cpu/mips/vm/mips_64.ad Mon Mar 13 15:56:48 2017 +0800 1.3 @@ -13454,13 +13454,47 @@ 1.4 ins_pipe( fpu_storeF ); 1.5 %} 1.6 1.7 +instruct Repl8B_DSP(vecD dst, mRegI src) %{ 1.8 + predicate(n->as_Vector()->length() == 8 && Use3A2000); 1.9 + match(Set dst (ReplicateB src)); 1.10 + ins_cost(100); 1.11 + format %{ "replv_ob AT, $src\n\t" 1.12 + "dmtc1 AT, $dst\t! replicate8B" %} 1.13 + ins_encode %{ 1.14 + __ replv_ob(AT, $src$$Register); 1.15 + __ dmtc1(AT, $dst$$FloatRegister); 1.16 + %} 1.17 + ins_pipe( pipe_mtc1 ); 1.18 +%} 1.19 + 1.20 instruct Repl8B(vecD dst, mRegI src) %{ 1.21 predicate(n->as_Vector()->length() == 8); 1.22 match(Set dst (ReplicateB src)); 1.23 - format %{ "replv_ob AT, $src\n\t" 1.24 + ins_cost(140); 1.25 + format %{ "move AT, $src\n\t" 1.26 + "dins AT, AT, 8, 8\n\t" 1.27 + "dins AT, AT, 16, 16\n\t" 1.28 + "dinsu AT, AT, 32, 32\n\t" 1.29 "dmtc1 AT, $dst\t! replicate8B" %} 1.30 ins_encode %{ 1.31 - __ replv_ob(AT, $src$$Register); 1.32 + __ move(AT, $src$$Register); 1.33 + __ dins(AT, AT, 8, 8); 1.34 + __ dins(AT, AT, 16, 16); 1.35 + __ dinsu(AT, AT, 32, 32); 1.36 + __ dmtc1(AT, $dst$$FloatRegister); 1.37 + %} 1.38 + ins_pipe( pipe_mtc1 ); 1.39 +%} 1.40 + 1.41 +instruct Repl8B_imm_DSP(vecD dst, immI con) %{ 1.42 + predicate(n->as_Vector()->length() == 8 && Use3A2000); 1.43 + match(Set dst (ReplicateB con)); 1.44 + ins_cost(110); 1.45 + format %{ "repl_ob AT, [$con]\n\t" 1.46 + "dmtc1 AT, $dst,0x00\t! replicate8B($con)" %} 1.47 + ins_encode %{ 1.48 + int val = $con$$constant; 1.49 + __ repl_ob(AT, val); 1.50 __ dmtc1(AT, $dst$$FloatRegister); 1.51 %} 1.52 ins_pipe( pipe_mtc1 ); 1.53 @@ -13469,11 +13503,17 @@ 1.54 instruct Repl8B_imm(vecD dst, immI con) %{ 1.55 predicate(n->as_Vector()->length() == 8); 1.56 match(Set dst (ReplicateB con)); 1.57 - format %{ "repl_ob AT, [$con]\n\t" 1.58 + ins_cost(150); 1.59 + format %{ "move AT, [$con]\n\t" 1.60 + "dins AT, AT, 8, 8\n\t" 1.61 + "dins AT, AT, 16, 16\n\t" 1.62 + "dinsu AT, AT, 32, 32\n\t" 1.63 "dmtc1 AT, $dst,0x00\t! replicate8B($con)" %} 1.64 ins_encode %{ 1.65 - int val = $con$$constant; 1.66 - __ repl_ob(AT, val); 1.67 + __ move(AT, $con$$constant); 1.68 + __ dins(AT, AT, 8, 8); 1.69 + __ dins(AT, AT, 16, 16); 1.70 + __ dinsu(AT, AT, 32, 32); 1.71 __ dmtc1(AT, $dst$$FloatRegister); 1.72 %} 1.73 ins_pipe( pipe_mtc1 ); 1.74 @@ -13482,6 +13522,7 @@ 1.75 instruct Repl8B_zero(vecD dst, immI0 zero) %{ 1.76 predicate(n->as_Vector()->length() == 8); 1.77 match(Set dst (ReplicateB zero)); 1.78 + ins_cost(90); 1.79 format %{ "dmtc1 R0, $dst\t! replicate8B zero" %} 1.80 ins_encode %{ 1.81 __ dmtc1(R0, $dst$$FloatRegister); 1.82 @@ -13492,6 +13533,7 @@ 1.83 instruct Repl8B_M1(vecD dst, immI_M1 M1) %{ 1.84 predicate(n->as_Vector()->length() == 8); 1.85 match(Set dst (ReplicateB M1)); 1.86 + ins_cost(80); 1.87 format %{ "dmtc1 -1, $dst\t! replicate8B -1" %} 1.88 ins_encode %{ 1.89 __ nor(AT, R0, R0); 1.90 @@ -13500,21 +13542,40 @@ 1.91 ins_pipe( pipe_mtc1 ); 1.92 %} 1.93 1.94 +instruct Repl4S_DSP(vecD dst, mRegI src) %{ 1.95 + predicate(n->as_Vector()->length() == 4 && Use3A2000); 1.96 + match(Set dst (ReplicateS src)); 1.97 + ins_cost(100); 1.98 + format %{ "replv_qh AT, $src\n\t" 1.99 + "dmtc1 AT, $dst\t! replicate4S" %} 1.100 + ins_encode %{ 1.101 + __ replv_qh(AT, $src$$Register); 1.102 + __ dmtc1(AT, $dst$$FloatRegister); 1.103 + %} 1.104 + ins_pipe( pipe_mtc1 ); 1.105 +%} 1.106 + 1.107 instruct Repl4S(vecD dst, mRegI src) %{ 1.108 predicate(n->as_Vector()->length() == 4); 1.109 match(Set dst (ReplicateS src)); 1.110 - format %{ "replv_qh AT, $src\n\t" 1.111 + ins_cost(120); 1.112 + format %{ "move AT, $src \n\t" 1.113 + "dins AT, AT, 16, 16\n\t" 1.114 + "dinsu AT, AT, 32, 32\n\t" 1.115 "dmtc1 AT, $dst\t! replicate4S" %} 1.116 ins_encode %{ 1.117 - __ replv_qh(AT, $src$$Register); 1.118 + __ move(AT, $src$$Register); 1.119 + __ dins(AT, AT, 16, 16); 1.120 + __ dinsu(AT, AT, 32, 32); 1.121 __ dmtc1(AT, $dst$$FloatRegister); 1.122 %} 1.123 ins_pipe( pipe_mtc1 ); 1.124 %} 1.125 1.126 -instruct Repl4S_imm(vecD dst, immI con) %{ 1.127 - predicate(n->as_Vector()->length() == 4); 1.128 +instruct Repl4S_imm_DSP(vecD dst, immI con) %{ 1.129 + predicate(n->as_Vector()->length() == 4 && Use3A2000); 1.130 match(Set dst (ReplicateS con)); 1.131 + ins_cost(100); 1.132 format %{ "replv_qh AT, [$con]\n\t" 1.133 "dmtc1 AT, $dst\t! replicate4S($con)" %} 1.134 ins_encode %{ 1.135 @@ -13531,6 +13592,23 @@ 1.136 ins_pipe( pipe_mtc1 ); 1.137 %} 1.138 1.139 +instruct Repl4S_imm(vecD dst, immI con) %{ 1.140 + predicate(n->as_Vector()->length() == 4); 1.141 + match(Set dst (ReplicateS con)); 1.142 + ins_cost(110); 1.143 + format %{ "move AT, [$con]\n\t" 1.144 + "dins AT, AT, 16, 16\n\t" 1.145 + "dinsu AT, AT, 32, 32\n\t" 1.146 + "dmtc1 AT, $dst\t! replicate4S($con)" %} 1.147 + ins_encode %{ 1.148 + __ move(AT, $con$$constant); 1.149 + __ dins(AT, AT, 16, 16); 1.150 + __ dinsu(AT, AT, 32, 32); 1.151 + __ dmtc1(AT, $dst$$FloatRegister); 1.152 + %} 1.153 + ins_pipe( pipe_mtc1 ); 1.154 +%} 1.155 + 1.156 instruct Repl4S_zero(vecD dst, immI0 zero) %{ 1.157 predicate(n->as_Vector()->length() == 4); 1.158 match(Set dst (ReplicateS zero)); 1.159 @@ -13573,12 +13651,12 @@ 1.160 match(Set dst (ReplicateI con)); 1.161 effect(KILL tmp); 1.162 format %{ "li32 AT, [$con], 32\n\t" 1.163 - "replv_pw AT, AT\n\t" 1.164 + "dinsu AT, AT\n\t" 1.165 "dmtc1 AT, $dst\t! replicate2I($con)" %} 1.166 ins_encode %{ 1.167 int val = $con$$constant; 1.168 __ li32(AT, val); 1.169 - __ replv_pw(AT, AT); 1.170 + __ dinsu(AT, AT, 32, 32); 1.171 __ dmtc1(AT, $dst$$FloatRegister); 1.172 %} 1.173 ins_pipe( pipe_mtc1 );