Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp	Wed Mar 01 03:42:17 2017 -0500
     1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp	Wed Mar 01 07:47:24 2017 -0500
     1.3 @@ -4120,15 +4120,6 @@
     1.4    }
     1.5  }
     1.6  
     1.7 -/*
     1.8 -void  MacroAssembler::set_narrow_oop(Register dst, jobject obj) {
     1.9 -  assert(oop_recorder() != NULL, "this assembler needs an OopRecorder");
    1.10 -  int oop_index = oop_recorder()->find_index(obj);
    1.11 -  RelocationHolder rspec = oop_Relocation::spec(oop_index);
    1.12 -  mov_literal32(dst, oop_index, rspec, narrow_oop_operand);
    1.13 -}
    1.14 -*/
    1.15 -
    1.16  void MacroAssembler::incrementl(Register reg, int value) {
    1.17    if (value == min_jint) {
    1.18       move(AT, value);

     2.1 --- a/src/cpu/mips/vm/mips_64.ad	Wed Mar 01 03:42:17 2017 -0500
     2.2 +++ b/src/cpu/mips/vm/mips_64.ad	Wed Mar 01 07:47:24 2017 -0500
     2.3 @@ -581,35 +581,6 @@
     2.4  
     2.5  // Emit deopt handler code.
     2.6  int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf) {
     2.7 -/*
     2.8 -  // Note that the code buffer's insts_mark is always relative to insts.
     2.9 -  // That's why we must use the macroassembler to generate a handler.
    2.10 -  MacroAssembler _masm(&cbuf);
    2.11 -  address base = __ start_a_stub(size_deopt_handler());
    2.12 -  if (base == NULL)  return 0;  // CodeBuffer::expand failed
    2.13 -  int offset = __ offset();
    2.14 -
    2.15 -#ifdef _LP64
    2.16 -  address the_pc = (address) __ pc();
    2.17 -  Label next;
    2.18 -  // push a "the_pc" on the stack without destroying any registers
    2.19 -  // as they all may be live.
    2.20 -
    2.21 -  // push address of "next"
    2.22 -  __ call(next, relocInfo::none); // reloc none is fine since it is a disp32
    2.23 -  __ bind(next);
    2.24 -  // adjust it so it matches "the_pc"
    2.25 -  __ subptr(Address(rsp, 0), __ offset() - offset);
    2.26 -#else
    2.27 -  InternalAddress here(__ pc());
    2.28 -  __ pushptr(here.addr());
    2.29 -#endif
    2.30 -
    2.31 -  __ jump(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
    2.32 -  assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow");
    2.33 -  __ end_a_stub();
    2.34 -  return offset;
    2.35 -*/
    2.36    // Note that the code buffer's insts_mark is always relative to insts.
    2.37    // That's why we must use the macroassembler to generate a handler.
    2.38    MacroAssembler _masm(&cbuf);
    2.39 @@ -1009,20 +980,6 @@
    2.40  
    2.41  }
    2.42  
    2.43 -/*
    2.44 -// EMIT_OPCODE()
    2.45 -void emit_opcode(CodeBuffer &cbuf, int code) {
    2.46 -  *(cbuf.code_end()) = (unsigned char)code;
    2.47 -  cbuf.set_code_end(cbuf.code_end() + 1);
    2.48 -}
    2.49 -*/
    2.50 -
    2.51 -void emit_d32_reloc(CodeBuffer &cbuf, int d32, relocInfo::relocType reloc,
    2.52 -        int format) {
    2.53 -  cbuf.relocate(cbuf.insts_mark(), reloc, format);
    2.54 -  cbuf.insts()->emit_int32(d32);
    2.55 -}
    2.56 -
    2.57  //=============================================================================
    2.58  
    2.59  // Figure out which register class each belongs in: rc_int, rc_float, rc_stack
    2.60 @@ -3130,16 +3087,10 @@
    2.61  
    2.62      if ( !_method ) {
    2.63        __ relocate(relocInfo::runtime_call_type);
    2.64 -      //emit_d32_reloc(cbuf, ($meth$$method - (int)(cbuf.code_end()) - 4),
    2.65 -      //               runtime_call_Relocation::spec(), RELOC_IMM32 );
    2.66      } else if(_optimized_virtual) {
    2.67        __ relocate(relocInfo::opt_virtual_call_type);
    2.68 -      //emit_d32_reloc(cbuf, ($meth$$method - (int)(cbuf.code_end()) - 4),
    2.69 -      //               opt_virtual_call_Relocation::spec(), RELOC_IMM32 );
    2.70      } else {
    2.71        __ relocate(relocInfo::static_call_type);
    2.72 -      //emit_d32_reloc(cbuf, ($meth$$method - (int)(cbuf.code_end()) - 4),
    2.73 -      //               static_call_Relocation::spec(), RELOC_IMM32 );
    2.74      }
    2.75  
    2.76      __ li(T9, $meth$$method);
    2.77 @@ -6235,31 +6186,22 @@
    2.78  
    2.79    ins_encode %{
    2.80      Register dst = $dst$$Register;
    2.81 -	long* value = (long*)$src$$constant;
    2.82 -	bool is_need_reloc = $src->constant_reloc() != relocInfo::none;
    2.83 -
    2.84 -    /* During GC, klassOop may be moved to new position in the heap.
    2.85 -     * It must be relocated.
    2.86 -     * Refer: [c1_LIRAssembler_mips.cpp] jobject2reg()
    2.87 -     */
    2.88 -    if (is_need_reloc) {
    2.89 -		if($src->constant_reloc() == relocInfo::metadata_type){
    2.90 -			int klass_index = __ oop_recorder()->find_index((Klass*)value);
    2.91 -			RelocationHolder rspec = metadata_Relocation::spec(klass_index);
    2.92 -
    2.93 -			__ relocate(rspec);
    2.94 -			__ li48(dst, (long)value);
    2.95 -		}
    2.96 -
    2.97 -		if($src->constant_reloc() == relocInfo::oop_type){
    2.98 -			int oop_index = __ oop_recorder()->find_index((jobject)value);
    2.99 -			RelocationHolder rspec = oop_Relocation::spec(oop_index);
   2.100 -
   2.101 -			__ relocate(rspec);
   2.102 -			__ li48(dst, (long)value);
   2.103 -		}
   2.104 -    } else {
   2.105 -                __ set64(dst, (long)value);
   2.106 +    long* value = (long*)$src$$constant;
   2.107 +
   2.108 +    if($src->constant_reloc() == relocInfo::metadata_type){
   2.109 +    	int klass_index = __ oop_recorder()->find_index((Klass*)value);
   2.110 +    	RelocationHolder rspec = metadata_Relocation::spec(klass_index);
   2.111 +    
   2.112 +    	__ relocate(rspec);
   2.113 +    	__ li48(dst, (long)value);
   2.114 +    }else if($src->constant_reloc() == relocInfo::oop_type){
   2.115 +    	int oop_index = __ oop_recorder()->find_index((jobject)value);
   2.116 +    	RelocationHolder rspec = oop_Relocation::spec(oop_index);
   2.117 +    
   2.118 +    	__ relocate(rspec);
   2.119 +    	__ li48(dst, (long)value);
   2.120 +    } else if ($src->constant_reloc() == relocInfo::none) {
   2.121 +        __ set64(dst, (long)value);
   2.122      }
   2.123    %}
   2.124  

     3.1 --- a/src/cpu/mips/vm/nativeInst_mips.cpp	Wed Mar 01 03:42:17 2017 -0500
     3.2 +++ b/src/cpu/mips/vm/nativeInst_mips.cpp	Wed Mar 01 07:47:24 2017 -0500
     3.3 @@ -333,29 +333,6 @@
     3.4  }
     3.5  
     3.6  void NativeMovConstReg::set_data(intptr_t x) {
     3.7 -/*
     3.8 -#ifndef CORE
     3.9 -  // also store the value into an oop_Relocation cell, if any
    3.10 -  CodeBlob* cb = CodeCache::find_blob(instruction_address());
    3.11 -  nmethod*  nm = cb ? cb->as_nmethod_or_null() : NULL;
    3.12 -  if (nm != NULL) {
    3.13 -    RelocIterator iter(nm, instruction_address(), instruction_address() + 1); 
    3.14 -    oop* oop_addr = NULL;
    3.15 -    while (iter.next()) {
    3.16 -      if (iter.type() == relocInfo::oop_type) {
    3.17 -	oop_Relocation *r = iter.oop_reloc();
    3.18 -	if (oop_addr == NULL && r->oop_index()!=0) {
    3.19 -	  oop_addr = r->oop_addr();
    3.20 -	  *oop_addr = (oop)x;
    3.21 -	} else {
    3.22 -	  assert(oop_addr == r->oop_addr(), "must be only one set-oop here");
    3.23 -	}   
    3.24 -      }   
    3.25 -    }   
    3.26 -  }
    3.27 -#endif
    3.28 -*/
    3.29 -
    3.30  #ifndef _LP64
    3.31    set_int_at(0, (int_at(0) & 0xffff0000) | (Assembler::split_high(x) & 0xffff));
    3.32    set_int_at(4, (int_at(4) & 0xffff0000) | (Assembler::split_low(x) & 0xffff));

     4.1 --- a/src/cpu/mips/vm/nativeInst_mips.hpp	Wed Mar 01 03:42:17 2017 -0500
     4.2 +++ b/src/cpu/mips/vm/nativeInst_mips.hpp	Wed Mar 01 07:47:24 2017 -0500
     4.3 @@ -55,7 +55,7 @@
     4.4  
     4.5   public:
     4.6    enum mips_specific_constants {
     4.7 -    nop_instruction_code        =    0,	//sll zero, zero, zero
     4.8 +    nop_instruction_code        =    0,
     4.9      nop_instruction_size        =    4
    4.10    };
    4.11  
    4.12 @@ -68,12 +68,12 @@
    4.13    inline bool is_cond_jump();
    4.14    bool is_safepoint_poll();
    4.15    
    4.16 -	//mips has no instruction to generate a illegal instrucion exception
    4.17 -	//we define ours: break 11 
    4.18 -	static int illegal_instruction();
    4.19 +  //mips has no instruction to generate a illegal instrucion exception
    4.20 +  //we define ours: break 11 
    4.21 +  static int illegal_instruction();
    4.22    
    4.23 -	bool is_int_branch();
    4.24 -	bool is_float_branch();
    4.25 +  bool is_int_branch();
    4.26 +  bool is_float_branch();
    4.27  
    4.28  
    4.29   protected:
    4.30 @@ -217,12 +217,6 @@
    4.31    return call;
    4.32  }
    4.33  
    4.34 -// An interface for accessing/manipulating native mov reg, imm32 instructions.
    4.35 -// (used to manipulate inlined 32bit data dll calls, etc.)
    4.36 -//we use two instructions to implement this:
    4.37 -//		lui rd, imm16
    4.38 -//		addiu rd, immm16
    4.39 -//see MacroAssembler::move(Register, int)
    4.40  class NativeMovConstReg: public NativeInstruction {
    4.41   public:
    4.42    enum mips_specific_constants {