Thu, 13 Feb 2020 19:16:02 +0800 #11867 Backport of #11497 assert(false) failed: Should Not Reach Here, what is the cpu type? file | diff | annotate
Thu, 05 Sep 2019 13:07:31 +0800 #9372 Refactor VM_Version, removed UseLoongsonISA and Use3A3000, added UseLEXT1, UseLEXT2, UseLEXT3. file | diff | annotate
Wed, 19 Jun 2019 10:29:37 +0800 #9406 Backport of #9405 removed useless flag file | diff | annotate
Tue, 05 Mar 2019 17:00:17 +0800 #8573 Cleanup: x86 registers in comments; comment style; deadcode file | diff | annotate
Thu, 11 Oct 2018 09:53:13 +0800 #7569 update copyright time of files modified in 2017 and 2018 file | diff | annotate
Tue, 03 Jul 2018 16:04:06 +0800 #7214 removed the definition of UseBMI1Instructions on MIPS file | diff | annotate
Tue, 03 Jul 2018 15:57:58 +0800 #7215 UseCountLeadingZerosInstruction/UseCountTrailingZerosInstruction renamed UseCountLeadingZerosInstructionMIPS64/UseCountTrailingZerosInstructionMIPS64 file | diff | annotate
Tue, 12 Dec 2017 10:30:27 +0800 #6345 sync is controled by UseSyncLevel instead of Use3A2000 file | diff | annotate
Tue, 17 Oct 2017 12:58:25 +0800 merge file | diff | annotate
Thu, 07 Sep 2017 09:12:16 +0800 #5745 [Code Reorganization] code cleanup and code style fix file | diff | annotate
Fri, 01 Sep 2017 10:28:22 +0800 #6018 Delete the flags associated with RTM file | diff | annotate
Mon, 10 Apr 2017 14:48:12 -0400 [C2] Remove unnecessary nops for code alignment. file | diff | annotate
Tue, 28 Mar 2017 16:09:10 -0400 Add UseCodeCacheAllocOpt for MIPS. file | diff | annotate
Wed, 22 Mar 2017 04:54:35 -0400 Set the default value of UseSyncLevel as 1000. file | diff | annotate
Thu, 09 Mar 2017 15:11:22 +0800 #4784 [interpreter] Use array bounds check instructions to optimize array load and store bytecodes. file | diff | annotate
Sun, 12 Mar 2017 09:04:47 +0800 #4670 Detect LoongsonCPUs to adapt different platforms. file | diff | annotate
Fri, 24 Feb 2017 00:44:21 -0500 Import UseSyncLevel flag for Loongson CPUs. file | diff | annotate
Tue, 17 Jan 2017 19:57:30 -0500 ctz/dctz are only supported on 3A2000/3A3000 CPUs (Follows changeset:32b76f240db3). file | diff | annotate
Tue, 17 Jan 2017 21:53:02 -0500 Fix a SIGILL bug introduced by changeset 101daea92bb3. file | diff | annotate
Fri, 16 Dec 2016 11:39:00 +0800 [C2] Added Zeros Count Instructions support in mips_64.ad file | diff | annotate
Fri, 25 Nov 2016 12:52:49 +0800 removed useless flag file | diff | annotate
Tue, 15 Nov 2016 16:12:45 +0800 #4663 UseLoongsonISA and Use3A2000 were moved into globals_mips.hpp file | diff | annotate
Fri, 25 Nov 2016 12:50:45 +0800 Added flag SetFSFOFN to set FS/FO/FN in FCSR file | diff | annotate
Wed, 11 May 2016 09:32:14 -0400 [C2] InlineSmallCode=4000: xml.validation 14.57% up file | diff | annotate
Fri, 29 Apr 2016 00:06:10 +0800 Added MIPS 64-bit port. file | diff | annotate
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