src/cpu/mips/vm/globals_mips.hpp

changeset 389
76857a2c3534
parent 382
a0d5defa38f5
child 397
1e8b8bc62356
     1.1 --- a/src/cpu/mips/vm/globals_mips.hpp	Tue Mar 28 14:52:30 2017 -0400
     1.2 +++ b/src/cpu/mips/vm/globals_mips.hpp	Tue Mar 28 16:09:10 2017 -0400
     1.3 @@ -93,6 +93,9 @@
     1.4    product(bool, Use3A2000, false,                                            \
     1.5                  "Use Loongson 3A2000 CPU")                                  \
     1.6                                                                              \
     1.7 +  product(bool, UseCodeCacheAllocOpt, true,                                 \
     1.8 +                "Allocate code cache within 32-bit memory address space")   \
     1.9 +                                                                            \
    1.10    product(intx, UseSyncLevel, 1000,                                         \
    1.11                  "The sync level on Loongson CPUs"                           \
    1.12                  "for GS464E, UseSyncLevel >= 2000"                          \

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