#6345 sync is controled by UseSyncLevel instead of Use3A2000

Tue, 12 Dec 2017 10:30:27 +0800

author
aoqi
date
Tue, 12 Dec 2017 10:30:27 +0800
changeset 8019
3fb3ceb7398f
parent 8018
7763e0b50e20
child 8020
ed0d6e1dbcb2

#6345 sync is controled by UseSyncLevel instead of Use3A2000
Reviewed-by: fujie

src/cpu/mips/vm/globals_mips.hpp file | annotate | diff | comparison | revisions
src/cpu/mips/vm/macroAssembler_mips.cpp file | annotate | diff | comparison | revisions
src/cpu/mips/vm/mips_64.ad file | annotate | diff | comparison | revisions
src/cpu/mips/vm/vm_version_mips.cpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp file | annotate | diff | comparison | revisions
src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp file | annotate | diff | comparison | revisions
src/share/vm/memory/barrierSet.hpp file | annotate | diff | comparison | revisions
src/share/vm/memory/cardTableModRefBS.hpp file | annotate | diff | comparison | revisions
src/share/vm/memory/cardTableRS.cpp file | annotate | diff | comparison | revisions
src/share/vm/memory/cardTableRS.hpp file | annotate | diff | comparison | revisions
src/share/vm/oops/klass.hpp file | annotate | diff | comparison | revisions
src/share/vm/oops/oop.hpp file | annotate | diff | comparison | revisions
     1.1 --- a/src/cpu/mips/vm/globals_mips.hpp	Thu Dec 07 16:21:29 2017 +0800
     1.2 +++ b/src/cpu/mips/vm/globals_mips.hpp	Tue Dec 12 10:30:27 2017 +0800
     1.3 @@ -96,10 +96,11 @@
     1.4    product(bool, UseCodeCacheAllocOpt, true,                                 \
     1.5                  "Allocate code cache within 32-bit memory address space")   \
     1.6                                                                              \
     1.7 -  product(intx, UseSyncLevel, 1000,                                         \
     1.8 +  product(intx, UseSyncLevel, 3000,                                         \
     1.9                  "The sync level on Loongson CPUs"                           \
    1.10 -                "for GS464E, UseSyncLevel >= 2000"                          \
    1.11 -                "others, UseSyncLevel <= 1000")                             \
    1.12 +                "default: for all Loongson CPUs, UseSyncLevel == 3000, "    \
    1.13 +                "for GS464E, UseSyncLevel == 2000"                          \
    1.14 +                "for GS464, UseSyncLevel == 1000")                          \
    1.15                                                                              \
    1.16    develop(bool, UseBoundCheckInstruction, false,                            \
    1.17                  "Use bound check instruction")                              \
     2.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp	Thu Dec 07 16:21:29 2017 +0800
     2.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp	Tue Dec 12 10:30:27 2017 +0800
     2.3 @@ -413,7 +413,7 @@
     2.4  
     2.5    li(tmp_reg1, counter_addr);
     2.6    bind(again);
     2.7 -  if(!Use3A2000) sync();
     2.8 +  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
     2.9    ll(tmp_reg2, tmp_reg1, 0);
    2.10    addi(tmp_reg2, tmp_reg2, inc);
    2.11    sc(tmp_reg2, tmp_reg1, 0);
    2.12 @@ -2578,7 +2578,7 @@
    2.13  
    2.14    bind(again);
    2.15  
    2.16 -  if(!Use3A2000) sync();
    2.17 +  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.18    ll(AT, dest);
    2.19    bne(AT, c_reg, nequal);
    2.20    delayed()->nop();
    2.21 @@ -2604,11 +2604,10 @@
    2.22    Label done, again, nequal;
    2.23  
    2.24    bind(again);
    2.25 +  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.26  #ifdef _LP64
    2.27 -  if(!Use3A2000) sync();
    2.28    lld(AT, dest);
    2.29  #else
    2.30 -  if(!Use3A2000) sync();
    2.31    ll(AT, dest);
    2.32  #endif
    2.33    bne(AT, c_reg, nequal);
    2.34 @@ -2651,7 +2650,7 @@
    2.35  
    2.36    bind(again);
    2.37  
    2.38 -        if(!Use3A2000) sync();
    2.39 +  if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync();
    2.40    lld(AT, dest);
    2.41    bne(AT, c_reg, nequal);
    2.42    delayed()->nop();
     3.1 --- a/src/cpu/mips/vm/mips_64.ad	Thu Dec 07 16:21:29 2017 +0800
     3.2 +++ b/src/cpu/mips/vm/mips_64.ad	Tue Dec 12 10:30:27 2017 +0800
     3.3 @@ -13075,7 +13075,7 @@
     3.4        __ stop("in storeIConditional: index != 0");
     3.5      } else {
     3.6        __ bind(again);
     3.7 -      if(!Use3A2000) __ sync();
     3.8 +      if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) __ sync();
     3.9        __ ll(AT, addr);
    3.10        __ bne(AT, oldval, failure);
    3.11        __ delayed()->addu(AT, R0, R0);
     4.1 --- a/src/cpu/mips/vm/vm_version_mips.cpp	Thu Dec 07 16:21:29 2017 +0800
     4.2 +++ b/src/cpu/mips/vm/vm_version_mips.cpp	Tue Dec 12 10:30:27 2017 +0800
     4.3 @@ -141,6 +141,18 @@
     4.4      FLAG_SET_DEFAULT(Use3A2000, 0);
     4.5    }
     4.6  
     4.7 +  if (is_gs464()) {
     4.8 +    if (FLAG_IS_DEFAULT(UseSyncLevel)) {
     4.9 +      FLAG_SET_DEFAULT(UseSyncLevel, 1000);
    4.10 +    }
    4.11 +  }
    4.12 +
    4.13 +  if (is_gs464e()) {
    4.14 +    if (FLAG_IS_DEFAULT(UseSyncLevel)) {
    4.15 +      FLAG_SET_DEFAULT(UseSyncLevel, 2000);
    4.16 +    }
    4.17 +  }
    4.18 +
    4.19    if (TieredCompilation) {
    4.20      if (!FLAG_IS_DEFAULT(TieredCompilation))
    4.21        warning("TieredCompilation not supported");
     5.1 --- a/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp	Thu Dec 07 16:21:29 2017 +0800
     5.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/cardTableExtension.hpp	Tue Dec 12 10:30:27 2017 +0800
     5.3 @@ -87,7 +87,7 @@
     5.4      jbyte* byte = byte_for(field);
     5.5      *byte = youngergen_card;
     5.6  #ifdef MIPS64
     5.7 -      if (Use3A2000) OrderAccess::fence();
     5.8 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
     5.9  #endif
    5.10    }
    5.11  
     6.1 --- a/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp	Thu Dec 07 16:21:29 2017 +0800
     6.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/parMarkBitMap.cpp	Tue Dec 12 10:30:27 2017 +0800
     6.3 @@ -106,8 +106,8 @@
     6.4      DEBUG_ONLY(Atomic::inc_ptr(&mark_bitmap_count));
     6.5      DEBUG_ONLY(Atomic::add_ptr(size, &mark_bitmap_size));
     6.6  #ifdef MIPS64
     6.7 -    if (Use3A2000) OrderAccess::fence();
     6.8 -#endif 
     6.9 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
    6.10 +#endif
    6.11      return true;
    6.12    }
    6.13    return false;
     7.1 --- a/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp	Thu Dec 07 16:21:29 2017 +0800
     7.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/psCompactionManager.inline.hpp	Tue Dec 12 10:30:27 2017 +0800
     7.3 @@ -34,7 +34,7 @@
     7.4    assert(task.is_valid(), "bad ObjArrayTask");
     7.5    _objarray_stack.push(task);
     7.6  #ifdef MIPS64
     7.7 -  if (Use3A2000) OrderAccess::fence();
     7.8 +  if (UseSyncLevel >= 2000) OrderAccess::fence();
     7.9  #endif
    7.10  }
    7.11  
    7.12 @@ -48,7 +48,7 @@
    7.13  #endif
    7.14    region_stack()->push(index);
    7.15  #ifdef MIPS64
    7.16 -  if (Use3A2000) OrderAccess::fence();
    7.17 +  if (UseSyncLevel >= 2000) OrderAccess::fence();
    7.18  #endif
    7.19  }
    7.20  
     8.1 --- a/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp	Thu Dec 07 16:21:29 2017 +0800
     8.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.cpp	Tue Dec 12 10:30:27 2017 +0800
     8.3 @@ -497,7 +497,7 @@
     8.4      // All in one region.
     8.5      _region_data[beg_region].add_live_obj(len);
     8.6  #ifdef MIPS64
     8.7 -    if (Use3A2000) OrderAccess::fence();
     8.8 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
     8.9  #endif
    8.10      return;
    8.11    }
    8.12 @@ -518,7 +518,7 @@
    8.13    _region_data[end_region].set_partial_obj_size(end_ofs + 1);
    8.14    _region_data[end_region].set_partial_obj_addr(addr);
    8.15  #ifdef MIPS64
    8.16 -    if (Use3A2000) OrderAccess::fence();
    8.17 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
    8.18  #endif
    8.19  }
    8.20  
    8.21 @@ -3239,7 +3239,7 @@
    8.22        cur_block = new_block;
    8.23        sd.block(cur_block)->set_offset(bitmap->bits_to_words(live_bits));
    8.24  #ifdef MIPS64
    8.25 -      if (Use3A2000) OrderAccess::fence();
    8.26 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
    8.27  #endif
    8.28      }
    8.29  
     9.1 --- a/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp	Thu Dec 07 16:21:29 2017 +0800
     9.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/psParallelCompact.hpp	Tue Dec 12 10:30:27 2017 +0800
     9.3 @@ -1327,7 +1327,7 @@
     9.4    if (mark_bitmap()->mark_obj(obj, obj_size)) {
     9.5      _summary_data.add_obj(obj, obj_size);
     9.6  #ifdef MIPS64
     9.7 -    if (Use3A2000) OrderAccess::fence();
     9.8 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
     9.9  #endif
    9.10      return true;
    9.11    } else {
    9.12 @@ -1364,7 +1364,7 @@
    9.13      if (mark_bitmap()->is_unmarked(obj) && mark_obj(obj)) {
    9.14        cm->push(obj);
    9.15  #ifdef MIPS64
    9.16 -      if (Use3A2000) OrderAccess::fence();
    9.17 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
    9.18  #endif
    9.19      }
    9.20    }
    10.1 --- a/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp	Thu Dec 07 16:21:29 2017 +0800
    10.2 +++ b/src/share/vm/gc_implementation/parallelScavenge/psPromotionManager.inline.hpp	Tue Dec 12 10:30:27 2017 +0800
    10.3 @@ -76,7 +76,7 @@
    10.4    oop new_obj = NULL;
    10.5  
    10.6  #ifdef MIPS64
    10.7 -  if (Use3A2000) OrderAccess::fence();
    10.8 +  if (UseSyncLevel >= 2000) OrderAccess::fence();
    10.9  #endif
   10.10  
   10.11    // NOTE! We must be very careful with any methods that access the mark
   10.12 @@ -85,7 +85,7 @@
   10.13    markOop test_mark = o->mark();
   10.14  
   10.15  #ifdef MIPS64
   10.16 -  if (Use3A2000) OrderAccess::fence();
   10.17 +  if (UseSyncLevel >= 2000) OrderAccess::fence();
   10.18  #endif
   10.19  
   10.20    // The same test as "o->is_forwarded()"
   10.21 @@ -122,7 +122,7 @@
   10.22          }
   10.23  
   10.24  #ifdef MIPS64
   10.25 -        if (Use3A2000) OrderAccess::fence();
   10.26 +        if (UseSyncLevel >= 2000) OrderAccess::fence();
   10.27  #endif
   10.28        }
   10.29      }
   10.30 @@ -182,7 +182,7 @@
   10.31      // Copy obj
   10.32      Copy::aligned_disjoint_words((HeapWord*)o, (HeapWord*)new_obj, new_obj_size);
   10.33  #ifdef MIPS64
   10.34 -    if (Use3A2000) OrderAccess::fence();
   10.35 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
   10.36  #endif
   10.37  
   10.38      // Now we have to CAS in the header.
   10.39 @@ -233,7 +233,7 @@
   10.40      }
   10.41  
   10.42  #ifdef MIPS64
   10.43 -    if (Use3A2000) OrderAccess::fence();
   10.44 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
   10.45  #endif
   10.46    } else {
   10.47      assert(o->is_forwarded(), "Sanity");
    11.1 --- a/src/share/vm/memory/barrierSet.hpp	Thu Dec 07 16:21:29 2017 +0800
    11.2 +++ b/src/share/vm/memory/barrierSet.hpp	Tue Dec 12 10:30:27 2017 +0800
    11.3 @@ -98,12 +98,12 @@
    11.4  protected:
    11.5    virtual void write_ref_field_pre_work(      oop* field, oop new_val) {
    11.6  #ifdef MIPS64
    11.7 -      if (Use3A2000) OrderAccess::fence();
    11.8 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
    11.9  #endif
   11.10    };
   11.11    virtual void write_ref_field_pre_work(narrowOop* field, oop new_val) {
   11.12  #ifdef MIPS64
   11.13 -      if (Use3A2000) OrderAccess::fence();
   11.14 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
   11.15  #endif
   11.16    };
   11.17  public:
   11.18 @@ -143,13 +143,13 @@
   11.19    virtual void write_ref_array_pre(oop* dst, int length,
   11.20                                     bool dest_uninitialized = false) {
   11.21  #ifdef MIPS64
   11.22 -      if (Use3A2000) OrderAccess::fence();
   11.23 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
   11.24  #endif
   11.25    }
   11.26    virtual void write_ref_array_pre(narrowOop* dst, int length,
   11.27                                     bool dest_uninitialized = false) {
   11.28  #ifdef MIPS64
   11.29 -      if (Use3A2000) OrderAccess::fence();
   11.30 +      if (UseSyncLevel >= 2000) OrderAccess::fence();
   11.31  #endif
   11.32  }
   11.33    // Below count is the # array elements being written, starting
    12.1 --- a/src/share/vm/memory/cardTableModRefBS.hpp	Thu Dec 07 16:21:29 2017 +0800
    12.2 +++ b/src/share/vm/memory/cardTableModRefBS.hpp	Tue Dec 12 10:30:27 2017 +0800
    12.3 @@ -317,7 +317,7 @@
    12.4    inline void inline_write_ref_array(MemRegion mr) {
    12.5      dirty_MemRegion(mr);
    12.6  #ifdef MIPS64
    12.7 -    if (Use3A2000) OrderAccess::fence();
    12.8 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
    12.9  #endif
   12.10    }
   12.11  protected:
   12.12 @@ -334,7 +334,7 @@
   12.13  
   12.14    template <class T> inline void inline_write_ref_field_pre(T* field, oop newVal) {
   12.15  #ifdef MIPS64
   12.16 -    if (Use3A2000) OrderAccess::fence();
   12.17 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
   12.18  #endif
   12.19    }
   12.20  
   12.21 @@ -347,7 +347,7 @@
   12.22        *byte = dirty_card;
   12.23      }
   12.24  #ifdef MIPS64
   12.25 -    if (Use3A2000) OrderAccess::fence();
   12.26 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
   12.27  #endif
   12.28    }
   12.29  
    13.1 --- a/src/share/vm/memory/cardTableRS.cpp	Thu Dec 07 16:21:29 2017 +0800
    13.2 +++ b/src/share/vm/memory/cardTableRS.cpp	Tue Dec 12 10:30:27 2017 +0800
    13.3 @@ -253,7 +253,7 @@
    13.4  void CardTableRS::write_ref_field_gc_par(void* field, oop new_val) {
    13.5    jbyte* entry = ct_bs()->byte_for(field);
    13.6  #ifdef MIPS64
    13.7 -  if (Use3A2000) OrderAccess::fence();
    13.8 +  if (UseSyncLevel >= 2000) OrderAccess::fence();
    13.9  #endif
   13.10    do {
   13.11      jbyte entry_val = *entry;
   13.12 @@ -271,7 +271,7 @@
   13.13        // Did the CAS succeed?
   13.14        if (res == entry_val) {
   13.15        #ifdef MIPS64
   13.16 -         if (Use3A2000) OrderAccess::fence();
   13.17 +         if (UseSyncLevel >= 2000) OrderAccess::fence();
   13.18        #endif
   13.19           return;
   13.20        }
    14.1 --- a/src/share/vm/memory/cardTableRS.hpp	Thu Dec 07 16:21:29 2017 +0800
    14.2 +++ b/src/share/vm/memory/cardTableRS.hpp	Tue Dec 12 10:30:27 2017 +0800
    14.3 @@ -122,11 +122,11 @@
    14.4    void inline_write_ref_field_gc(void* field, oop new_val) {
    14.5      jbyte* byte = _ct_bs->byte_for(field);
    14.6  #ifdef MIPS64
    14.7 -    if (Use3A2000) OrderAccess::fence();
    14.8 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
    14.9  #endif
   14.10     *byte = youngergen_card;
   14.11  #ifdef MIPS64
   14.12 -   if (Use3A2000) OrderAccess::fence();
   14.13 +   if (UseSyncLevel >= 2000) OrderAccess::fence();
   14.14  #endif
   14.15  
   14.16    }
    15.1 --- a/src/share/vm/oops/klass.hpp	Thu Dec 07 16:21:29 2017 +0800
    15.2 +++ b/src/share/vm/oops/klass.hpp	Tue Dec 12 10:30:27 2017 +0800
    15.3 @@ -287,17 +287,17 @@
    15.4    // The Klasses are not placed in the Heap, so the Card Table or
    15.5    // the Mod Union Table can't be used to mark when klasses have modified oops.
    15.6    // The CT and MUT bits saves this information for the individual Klasses.
    15.7 -  void record_modified_oops()            { 
    15.8 -    _modified_oops = 1; 
    15.9 +  void record_modified_oops()            {
   15.10 +    _modified_oops = 1;
   15.11  #ifdef MIPS64
   15.12 -    if (Use3A2000) OrderAccess::fence();    
   15.13 -#endif 
   15.14 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
   15.15 +#endif
   15.16    }
   15.17 -  void clear_modified_oops()             { 
   15.18 -    _modified_oops = 0; 
   15.19 +  void clear_modified_oops()             {
   15.20 +    _modified_oops = 0;
   15.21  #ifdef MIPS64
   15.22 -    if (Use3A2000) OrderAccess::fence();    
   15.23 -#endif 
   15.24 +    if (UseSyncLevel >= 2000) OrderAccess::fence();
   15.25 +#endif
   15.26    }
   15.27    bool has_modified_oops()               { return _modified_oops == 1; }
   15.28  
    16.1 --- a/src/share/vm/oops/oop.hpp	Thu Dec 07 16:21:29 2017 +0800
    16.2 +++ b/src/share/vm/oops/oop.hpp	Tue Dec 12 10:30:27 2017 +0800
    16.3 @@ -72,12 +72,12 @@
    16.4    markOop  mark() const         { return _mark; }
    16.5    markOop* mark_addr() const    { return (markOop*) &_mark; }
    16.6  
    16.7 -  void set_mark(volatile markOop m)      { 
    16.8 +  void set_mark(volatile markOop m)      {
    16.9  #ifdef MIPS64
   16.10 -    if (Use3A2000) release_set_mark(m);
   16.11 +    if (UseSyncLevel >= 2000) release_set_mark(m);
   16.12      else
   16.13  #endif
   16.14 -    _mark = m;   
   16.15 +    _mark = m;
   16.16    }
   16.17  
   16.18    void    release_set_mark(markOop m);

mercurial