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changeset

Fix a SIGILL bug introduced by changeset 101daea92bb3.

Tue, 17 Jan 2017 21:53:02 -0500

author

fujie

date

Tue, 17 Jan 2017 21:53:02 -0500

changeset 212

a511e4b27f56

parent 211

fd1b0e71255a

child 213

45cd2837a395

Fix a SIGILL bug introduced by changeset 101daea92bb3.

When testing the SPECjvm2000 On 3B1500 with
java -jar SPECjvm2008.jar -ikv -coe -ict -bt 8 compiler.compiler
changeset 101daea92bb3 introduced a SIGILL bug like the follwing:
---------------------------SIGILL begin-----------------------------------
Iteration 1 (240s) begins: Fri Jan 13 04:42:42 EST 2017
#
# A fatal error has been detected by the Java Runtime Environment:
#
# SIGILL (0x4) at pc=0x000000ffde134fc4, pid=21475, tid=1098320638480
#
# JRE version: OpenJDK Runtime Environment (8.0) (build
# 1.8.0_25-fujie_2016_12_05_04_00-b00)
# Java VM: OpenJDK 64-Bit Server VM (25.25-b02 mixed mode linux-mips64
# compressed oops)
# Problematic frame:
# J 1770 C2
# spec.benchmarks.compiler.SpecFileManager.generateKey(Ljavax/tools/JavaFileManager$Location;Ljava/lang/String;Ljava/util/Set;Z)Ljava/lang/String;
# (136 bytes) @ 0x000000ffde134fc4 [0x000000ffde133ac0+0x1504]
---------------------------SIGILL end-----------------------------------

     1.1 --- a/src/cpu/mips/vm/globals_mips.hpp	Wed Dec 21 15:56:19 2016 +0800
     1.2 +++ b/src/cpu/mips/vm/globals_mips.hpp	Tue Jan 17 21:53:02 2017 -0500
     1.3 @@ -141,7 +141,8 @@
     1.4    product(bool, Use486InstrsOnly, false,                                    \
     1.5            "Use 80486 Compliant instruction subset")                         \
     1.6                                                                              \
     1.7 -  product(bool, UseCountLeadingZerosInstruction, true,                     \
     1.8 +  /* Turn on this flag may cause SIGILL on 3B1500 */                        \
     1.9 +  product(bool, UseCountLeadingZerosInstruction, false,                     \
    1.10            "Use count leading zeros instruction")                            \
    1.11                                                                              \
    1.12    /* Use Restricted Transactional Memory for lock eliding */                \

     2.1 --- a/src/cpu/mips/vm/vm_version_mips.cpp	Wed Dec 21 15:56:19 2016 +0800
     2.2 +++ b/src/cpu/mips/vm/vm_version_mips.cpp	Tue Jan 17 21:53:02 2017 -0500
     2.3 @@ -104,7 +104,7 @@
     2.4      }
     2.5    }
     2.6    if (UseLoongsonISA)
     2.7 -    UseCountTrailingZerosInstruction = true;
     2.8 +    UseCountTrailingZerosInstruction = false;  // Turn on this flag may cause SIGILL on 3B1500
     2.9  #endif
    2.10    UseSSE = 0; // Only on x86 and x64
    2.11