Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp	Tue Mar 28 14:52:30 2017 -0400
     1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp	Tue Mar 28 16:09:10 2017 -0400
     1.3 @@ -773,7 +773,7 @@
     1.4  
     1.5    li(tmp_reg1, counter_addr);
     1.6    bind(again);
     1.7 -  if(UseSyncLevel <= 1000) sync();
     1.8 +  if(!Use3A2000) sync();
     1.9    ll(tmp_reg2, tmp_reg1, 0);
    1.10    addi(tmp_reg2, tmp_reg2, inc);
    1.11    sc(tmp_reg2, tmp_reg1, 0);
    1.12 @@ -2991,7 +2991,7 @@
    1.13  
    1.14    bind(again);
    1.15  
    1.16 -  if(UseSyncLevel <= 1000) sync();
    1.17 +  if(!Use3A2000) sync();
    1.18    ll(AT, dest);
    1.19    bne(AT, c_reg, nequal);
    1.20    delayed()->nop(); 
    1.21 @@ -3019,10 +3019,10 @@
    1.22  
    1.23    bind(again);
    1.24  #ifdef _LP64
    1.25 -  if(UseSyncLevel <= 1000) sync();
    1.26 +  if(!Use3A2000) sync();
    1.27    lld(AT, dest);
    1.28  #else
    1.29 -  if(UseSyncLevel <= 1000) sync();
    1.30 +  if(!Use3A2000) sync();
    1.31    ll(AT, dest);
    1.32  #endif
    1.33    bne(AT, c_reg, nequal);
    1.34 @@ -3065,7 +3065,7 @@
    1.35  
    1.36  	bind(again);
    1.37  
    1.38 -        if(UseSyncLevel <= 1000) sync();
    1.39 +        if(!Use3A2000) sync();
    1.40  	lld(AT, dest);
    1.41  	bne(AT, c_reg, nequal);
    1.42  	delayed()->nop(); 

     2.1 --- a/src/cpu/mips/vm/globals_mips.hpp	Tue Mar 28 14:52:30 2017 -0400
     2.2 +++ b/src/cpu/mips/vm/globals_mips.hpp	Tue Mar 28 16:09:10 2017 -0400
     2.3 @@ -93,6 +93,9 @@
     2.4    product(bool, Use3A2000, false,                                            \
     2.5                  "Use Loongson 3A2000 CPU")                                  \
     2.6                                                                              \
     2.7 +  product(bool, UseCodeCacheAllocOpt, true,                                 \
     2.8 +                "Allocate code cache within 32-bit memory address space")   \
     2.9 +                                                                            \
    2.10    product(intx, UseSyncLevel, 1000,                                         \
    2.11                  "The sync level on Loongson CPUs"                           \
    2.12                  "for GS464E, UseSyncLevel >= 2000"                          \

     3.1 --- a/src/cpu/mips/vm/mips_64.ad	Tue Mar 28 14:52:30 2017 -0400
     3.2 +++ b/src/cpu/mips/vm/mips_64.ad	Tue Mar 28 16:09:10 2017 -0400
     3.3 @@ -11373,7 +11373,7 @@
     3.4         __ stop("in storeIConditional: index != 0");
     3.5      } else {
     3.6         __ bind(again);
     3.7 -       if(UseSyncLevel <= 1000) __ sync();
     3.8 +       if(!Use3A2000) __ sync();
     3.9         __ ll(AT, addr);
    3.10         __ bne(AT, oldval, failure);
    3.11         __ delayed()->addu(AT, R0, R0);

     4.1 --- a/src/share/vm/runtime/virtualspace.cpp	Tue Mar 28 14:52:30 2017 -0400
     4.2 +++ b/src/share/vm/runtime/virtualspace.cpp	Tue Mar 28 16:09:10 2017 -0400
     4.3 @@ -139,7 +139,7 @@
     4.4  
     4.5  #ifdef MIPS64
     4.6    static int code_cache_init_flag = 1;
     4.7 -  if (code_cache_init_flag && executable) {
     4.8 +  if (UseCodeCacheAllocOpt && code_cache_init_flag && executable) {
     4.9      code_cache_init_flag = 0;
    4.10      requested_address = (char*) (5 * os::Linux::page_size());
    4.11    }