Thu, 18 Aug 2016 13:51:09 +0800 Enable gssdxc1 in store_D_reg_enc for Loongson processors. file | diff | annotate
Thu, 18 Aug 2016 13:38:41 +0800 Enable gsldxc1 in load_D_enc for Loongson processors. file | diff | annotate
Thu, 18 Aug 2016 11:50:18 +0800 Enable gsswxc1 for Loongson Processors. file | diff | annotate
Thu, 18 Aug 2016 11:41:31 +0800 Enable gslwxc1 in load_F_enc for Loongson processors. file | diff | annotate
Thu, 18 Aug 2016 11:16:54 +0800 Add addL_RegI2L_Reg and addL_Reg_RegI2L in mips_64.ad file | diff | annotate
Thu, 18 Aug 2016 11:12:52 +0800 Add subL_Reg_RegI2L and subL_RegI2L_Reg in mips_64.ad file | diff | annotate
Thu, 18 Aug 2016 10:16:47 +0800 Add operand baseIndexOffset8_convI2L in mips_64.add. file | diff | annotate
Thu, 18 Aug 2016 09:58:51 +0800 Enable gsshx in store_C_reg_enc for Loongson processors. file | diff | annotate
Thu, 18 Aug 2016 09:46:58 +0800 Enable gslbx in load_B_enc for Loongson processors. file | diff | annotate
Wed, 17 Aug 2016 17:20:44 +0800 Performance of integer array operation is about 8% up. file | diff | annotate
Wed, 17 Aug 2016 15:26:28 +0800 Matching for baseIndexOffset8 is OK. file | diff | annotate
Thu, 11 Aug 2016 17:13:32 +0800 Add memory operand baseIndexOffset8 in mips_64.ad for memory address pattern (base + index + offset). file | diff | annotate
Thu, 11 Aug 2016 15:21:41 +0800 index(0x0) means no index register instead of index(0x4) in mips_64.ad file | diff | annotate
Thu, 11 Aug 2016 09:27:28 +0800 Performance of mod operation for long type is 100% up. file | diff | annotate
Wed, 10 Aug 2016 17:54:14 +0800 Performance of long integer multiplication is 35% up. file | diff | annotate
Wed, 10 Aug 2016 17:37:16 +0800 Add gsmod in JIT. Experiments show that gsmod is slower that div+mfhi so just disable it. file | diff | annotate
Wed, 10 Aug 2016 15:46:08 +0800 Performance of long integer division is 100% up. file | diff | annotate
Wed, 10 Aug 2016 14:32:49 +0800 Performance of integer division is 120% up. file | diff | annotate
Wed, 03 Aug 2016 01:02:20 +0800 instruction scheduling optimization. file | diff | annotate
Tue, 02 Aug 2016 21:48:39 +0800 Add madd in the C2 compiler and the pipeline should be adjusted before enabling it. file | diff | annotate
Mon, 01 Aug 2016 21:29:45 +0800 Enable conditional instructions(movt and movf) in MIPS C2 compiler. file | diff | annotate
Fri, 29 Jul 2016 22:45:45 +0800 Refine the implementation of MaxI and MinI for MIPS. file | diff | annotate
Tue, 26 Jul 2016 17:29:00 +0800 Performance of integer multiplication is more than 70% up. file | diff | annotate
Tue, 26 Jul 2016 11:33:17 +0800 Enable conditional instructions(movz and movn) in MIPS C2 compiler. file | diff | annotate
Fri, 29 Apr 2016 11:06:40 -0400 Fix the concurrency issue for 3A2000-1way. file | diff | annotate
Tue, 28 Jun 2016 16:34:47 +0800 [Code Reorganization] Moved fast_lock and fast_unlock from mips_64.ad to MacroAssembler. file | diff | annotate
Tue, 28 Jun 2016 15:59:50 +0800 Added flag PrintBiasedLockingStatistics support. file | diff | annotate
Tue, 14 Jun 2016 20:04:50 +0800 [C2] Fixed Fast_Unlock. file | diff | annotate
Fri, 29 Apr 2016 00:06:10 +0800 Added MIPS 64-bit port. file | diff | annotate
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