Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/mips/vm/mips_64.ad	Fri Jul 22 16:53:17 2016 +0800
     1.2 +++ b/src/cpu/mips/vm/mips_64.ad	Tue Jul 26 11:33:17 2016 +0800
     1.3 @@ -6665,10 +6665,8 @@
     1.4  //----------Conditional Move---------------------------------------------------
     1.5  // Conditional move
     1.6  instruct cmovI_cmpI_reg_reg(mRegI dst, mRegI src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
     1.7 -  //predicate(VM_Version::supports_cmov() );
     1.8 -  //predicate(false );
     1.9    match(Set dst (CMoveI (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
    1.10 -  ins_cost(200);
    1.11 +  ins_cost(80);
    1.12    format %{
    1.13               "CMP$cop  $tmp1, $tmp2\t  @cmovI_cmpI_reg_reg\n"
    1.14               "\tCMOV  $dst,$src \t @cmovI_cmpI_reg_reg"
    1.15 @@ -6680,50 +6678,39 @@
    1.16      Register dst = $dst$$Register;
    1.17      Register src = $src$$Register;
    1.18      int     flag = $cop$$cmpcode;
    1.19 -    Label      L; 
    1.20  
    1.21      switch(flag)
    1.22      {
    1.23        case 0x01: //equal
    1.24 -       	__ bne(op1, op2, L); 
    1.25 -        __ nop();
    1.26 -        __ move(dst, src);
    1.27 -        __ bind(L);
    1.28 -        break;
    1.29 +        __ subu32(AT, op1, op2);
    1.30 +        __ movz(dst, src, AT);
    1.31 +        break;
    1.32 +
    1.33        case 0x02: //not_equal
    1.34 -       	__ beq(op1, op2, L); 
    1.35 -        __ nop();
    1.36 -        __ move(dst, src);
    1.37 -        __ bind(L);
    1.38 -        break;
    1.39 +        __ subu32(AT, op1, op2);
    1.40 +        __ movn(dst, src, AT);
    1.41 +        break;
    1.42 +
    1.43        case 0x03: //great
    1.44          __ slt(AT, op2, op1);
    1.45 -       	__ beq(AT, R0, L);
    1.46 -        __ nop();
    1.47 -        __ move(dst, src);
    1.48 -        __ bind(L);
    1.49 -        break;
    1.50 +        __ movn(dst, src, AT);
    1.51 +        break;
    1.52 +
    1.53        case 0x04: //great_equal
    1.54          __ slt(AT, op1, op2);
    1.55 -        __ bne(AT, R0, L); 
    1.56 -        __ nop();
    1.57 -        __ move(dst, src);
    1.58 -        __ bind(L);
    1.59 -        break;
    1.60 +        __ movz(dst, src, AT);
    1.61 +        break;
    1.62 +
    1.63        case 0x05: //less
    1.64          __ slt(AT, op1, op2);
    1.65 -       	__ beq(AT, R0, L);
    1.66 -        __ nop();
    1.67 -        __ move(dst, src);
    1.68 -        __ bind(L);
    1.69 -        break;
    1.70 +        __ movn(dst, src, AT);
    1.71 +        break;
    1.72 +
    1.73        case 0x06: //less_equal
    1.74          __ slt(AT, op2, op1);
    1.75 -       	__ bne(AT, R0, L); 
    1.76 -        __ nop();
    1.77 -        __ move(dst, src);
    1.78 -        __ bind(L);
    1.79 +        __ movz(dst, src, AT);
    1.80         break;
    1.81 +
    1.82        default:
    1.83            Unimplemented();
    1.84      }  
    1.85 @@ -6733,10 +6720,8 @@
    1.86  %}
    1.87  
    1.88  instruct cmovI_cmpP_reg_reg(mRegI dst, mRegI src, mRegP tmp1, mRegP tmp2, cmpOpU cop ) %{
    1.89 -  //predicate(VM_Version::supports_cmov() );
    1.90 -  //predicate(false );
    1.91    match(Set dst (CMoveI (Binary cop (CmpP tmp1 tmp2)) (Binary dst src)));
    1.92 -  ins_cost(200);
    1.93 +  ins_cost(80);
    1.94    format %{
    1.95               "CMPU$cop $tmp1,$tmp2\t @cmovI_cmpP_reg_reg\n\t"
    1.96               "CMOV $dst,$src\t @cmovI_cmpP_reg_reg"
    1.97 @@ -6747,50 +6732,39 @@
    1.98      Register dst = $dst$$Register;
    1.99      Register src = $src$$Register;
   1.100      int     flag = $cop$$cmpcode;
   1.101 -    Label      L; 
   1.102  
   1.103      switch(flag)
   1.104      {
   1.105        case 0x01: //equal
   1.106 -       	__ bne(op1, op2, L); 
   1.107 -        __ nop();
   1.108 -        __ move(dst, src);
   1.109 -        __ bind(L);
   1.110 -        break;
   1.111 +        __ subu(AT, op1, op2);
   1.112 +        __ movz(dst, src, AT);
   1.113 +        break;
   1.114 +
   1.115        case 0x02: //not_equal
   1.116 -       	__ beq(op1, op2, L); 
   1.117 -        __ nop();
   1.118 -        __ move(dst, src);
   1.119 -        __ bind(L);
   1.120 -        break;
   1.121 +        __ subu(AT, op1, op2);
   1.122 +        __ movn(dst, src, AT);
   1.123 +        break;
   1.124 +
   1.125        case 0x03: //above
   1.126          __ sltu(AT, op2, op1);
   1.127 -       	__ beq(AT, R0, L);
   1.128 -        __ nop();
   1.129 -        __ move(dst, src);
   1.130 -        __ bind(L);
   1.131 -        break;
   1.132 +        __ movn(dst, src, AT);
   1.133 +        break;
   1.134 +
   1.135        case 0x04: //above_equal
   1.136          __ sltu(AT, op1, op2);
   1.137 -        __ bne(R0, AT, L); 
   1.138 -        __ nop();
   1.139 -        __ move(dst, src);
   1.140 -        __ bind(L);
   1.141 -        break;
   1.142 +        __ movz(dst, src, AT);
   1.143 +        break;
   1.144 +
   1.145        case 0x05: //below
   1.146          __ sltu(AT, op1, op2);
   1.147 -       	__ beq(AT, R0, L);
   1.148 -        __ nop();
   1.149 -        __ move(dst, src);
   1.150 -        __ bind(L);
   1.151 -        break;
   1.152 +        __ movn(dst, src, AT);
   1.153 +        break;
   1.154 +
   1.155        case 0x06: //below_equal
   1.156          __ sltu(AT, op2, op1);
   1.157 -       	__ bne(R0, AT, L); 
   1.158 -        __ nop();
   1.159 -        __ move(dst, src);
   1.160 -        __ bind(L);
   1.161 +        __ movz(dst, src, AT);
   1.162         break;
   1.163 +
   1.164        default:
   1.165            Unimplemented();
   1.166      }  
   1.167 @@ -6800,10 +6774,8 @@
   1.168  %}
   1.169  
   1.170  instruct cmovI_cmpN_reg_reg(mRegI dst, mRegI src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
   1.171 -  //predicate(VM_Version::supports_cmov() );
   1.172 -  //predicate(false );
   1.173    match(Set dst (CMoveI (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
   1.174 -  ins_cost(200);
   1.175 +  ins_cost(80);
   1.176    format %{
   1.177               "CMPU$cop $tmp1,$tmp2\t @cmovI_cmpN_reg_reg\n\t"
   1.178               "CMOV $dst,$src\t @cmovI_cmpN_reg_reg"
   1.179 @@ -6814,50 +6786,39 @@
   1.180      Register dst = $dst$$Register;
   1.181      Register src = $src$$Register;
   1.182      int     flag = $cop$$cmpcode;
   1.183 -    Label      L; 
   1.184  
   1.185      switch(flag)
   1.186      {
   1.187        case 0x01: //equal
   1.188 -       	__ bne(op1, op2, L); 
   1.189 -        __ nop();
   1.190 -        __ move(dst, src);
   1.191 -        __ bind(L);
   1.192 -        break;
   1.193 +        __ subu32(AT, op1, op2);
   1.194 +        __ movz(dst, src, AT);
   1.195 +        break;
   1.196 +
   1.197        case 0x02: //not_equal
   1.198 -       	__ beq(op1, op2, L); 
   1.199 -        __ nop();
   1.200 -        __ move(dst, src);
   1.201 -        __ bind(L);
   1.202 -        break;
   1.203 +        __ subu32(AT, op1, op2);
   1.204 +        __ movn(dst, src, AT);
   1.205 +        break;
   1.206 +
   1.207        case 0x03: //above
   1.208          __ sltu(AT, op2, op1);
   1.209 -       	__ beq(AT, R0, L);
   1.210 -        __ nop();
   1.211 -        __ move(dst, src);
   1.212 -        __ bind(L);
   1.213 -        break;
   1.214 +        __ movn(dst, src, AT);
   1.215 +        break;
   1.216 +
   1.217        case 0x04: //above_equal
   1.218          __ sltu(AT, op1, op2);
   1.219 -        __ bne(R0, AT, L); 
   1.220 -        __ nop();
   1.221 -        __ move(dst, src);
   1.222 -        __ bind(L);
   1.223 -        break;
   1.224 +        __ movz(dst, src, AT);
   1.225 +        break;
   1.226 +
   1.227        case 0x05: //below
   1.228          __ sltu(AT, op1, op2);
   1.229 -       	__ beq(AT, R0, L);
   1.230 -        __ nop();
   1.231 -        __ move(dst, src);
   1.232 -        __ bind(L);
   1.233 -        break;
   1.234 +        __ movn(dst, src, AT);
   1.235 +        break;
   1.236 +
   1.237        case 0x06: //below_equal
   1.238          __ sltu(AT, op2, op1);
   1.239 -       	__ bne(R0, AT, L); 
   1.240 -        __ nop();
   1.241 -        __ move(dst, src);
   1.242 -        __ bind(L);
   1.243 +        __ movz(dst, src, AT);
   1.244         break;
   1.245 +
   1.246        default:
   1.247            Unimplemented();
   1.248      }  
   1.249 @@ -6867,10 +6828,8 @@
   1.250  %}
   1.251  
   1.252  instruct cmovP_cmpN_reg_reg(mRegP dst, mRegP src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
   1.253 -  //predicate(VM_Version::supports_cmov() );
   1.254 -  //predicate(false );
   1.255    match(Set dst (CMoveP (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
   1.256 -  ins_cost(200);
   1.257 +  ins_cost(80);
   1.258    format %{
   1.259               "CMPU$cop $tmp1,$tmp2\t @cmovP_cmpN_reg_reg\n\t"
   1.260               "CMOV $dst,$src\t @cmovP_cmpN_reg_reg"
   1.261 @@ -6881,50 +6840,39 @@
   1.262      Register dst = $dst$$Register;
   1.263      Register src = $src$$Register;
   1.264      int     flag = $cop$$cmpcode;
   1.265 -    Label      L; 
   1.266  
   1.267      switch(flag)
   1.268      {
   1.269        case 0x01: //equal
   1.270 -       	__ bne(op1, op2, L); 
   1.271 -        __ nop();
   1.272 -        __ move(dst, src);
   1.273 -        __ bind(L);
   1.274 -        break;
   1.275 +        __ subu32(AT, op1, op2);
   1.276 +        __ movz(dst, src, AT);
   1.277 +        break;
   1.278 +
   1.279        case 0x02: //not_equal
   1.280 -       	__ beq(op1, op2, L); 
   1.281 -        __ nop();
   1.282 -        __ move(dst, src);
   1.283 -        __ bind(L);
   1.284 -        break;
   1.285 +        __ subu32(AT, op1, op2);
   1.286 +        __ movn(dst, src, AT);
   1.287 +        break;
   1.288 +
   1.289        case 0x03: //above
   1.290          __ sltu(AT, op2, op1);
   1.291 -       	__ beq(AT, R0, L);
   1.292 -        __ nop();
   1.293 -        __ move(dst, src);
   1.294 -        __ bind(L);
   1.295 -        break;
   1.296 +        __ movn(dst, src, AT);
   1.297 +        break;
   1.298 +
   1.299        case 0x04: //above_equal
   1.300          __ sltu(AT, op1, op2);
   1.301 -        __ bne(R0, AT, L); 
   1.302 -        __ nop();
   1.303 -        __ move(dst, src);
   1.304 -        __ bind(L);
   1.305 -        break;
   1.306 +        __ movz(dst, src, AT);
   1.307 +        break;
   1.308 +
   1.309        case 0x05: //below
   1.310          __ sltu(AT, op1, op2);
   1.311 -       	__ beq(AT, R0, L);
   1.312 -        __ nop();
   1.313 -        __ move(dst, src);
   1.314 -        __ bind(L);
   1.315 -        break;
   1.316 +        __ movn(dst, src, AT);
   1.317 +        break;
   1.318 +
   1.319        case 0x06: //below_equal
   1.320          __ sltu(AT, op2, op1);
   1.321 -       	__ bne(R0, AT, L); 
   1.322 -        __ nop();
   1.323 -        __ move(dst, src);
   1.324 -        __ bind(L);
   1.325 +        __ movz(dst, src, AT);
   1.326         break;
   1.327 +
   1.328        default:
   1.329            Unimplemented();
   1.330      }  
   1.331 @@ -6934,10 +6882,8 @@
   1.332  %}
   1.333  
   1.334  instruct cmovN_cmpP_reg_reg(mRegN dst, mRegN src, mRegP tmp1, mRegP tmp2, cmpOpU cop ) %{
   1.335 -  //predicate(VM_Version::supports_cmov() );
   1.336 -  //predicate(false );
   1.337    match(Set dst (CMoveN (Binary cop (CmpP tmp1 tmp2)) (Binary dst src)));
   1.338 -  ins_cost(200);
   1.339 +  ins_cost(80);
   1.340    format %{
   1.341               "CMPU$cop $tmp1,$tmp2\t @cmovN_cmpP_reg_reg\n\t"
   1.342               "CMOV $dst,$src\t @cmovN_cmpP_reg_reg"
   1.343 @@ -6948,50 +6894,39 @@
   1.344      Register dst = $dst$$Register;
   1.345      Register src = $src$$Register;
   1.346      int     flag = $cop$$cmpcode;
   1.347 -    Label      L; 
   1.348  
   1.349      switch(flag)
   1.350      {
   1.351        case 0x01: //equal
   1.352 -       	__ bne(op1, op2, L); 
   1.353 -        __ nop();
   1.354 -        __ move(dst, src);
   1.355 -        __ bind(L);
   1.356 -        break;
   1.357 +        __ subu(AT, op1, op2);
   1.358 +        __ movz(dst, src, AT);
   1.359 +        break;
   1.360 +
   1.361        case 0x02: //not_equal
   1.362 -       	__ beq(op1, op2, L); 
   1.363 -        __ nop();
   1.364 -        __ move(dst, src);
   1.365 -        __ bind(L);
   1.366 -        break;
   1.367 +        __ subu(AT, op1, op2);
   1.368 +        __ movn(dst, src, AT);
   1.369 +        break;
   1.370 +
   1.371        case 0x03: //above
   1.372          __ sltu(AT, op2, op1);
   1.373 -       	__ beq(AT, R0, L);
   1.374 -        __ nop();
   1.375 -        __ move(dst, src);
   1.376 -        __ bind(L);
   1.377 -        break;
   1.378 +        __ movn(dst, src, AT);
   1.379 +        break;
   1.380 +
   1.381        case 0x04: //above_equal
   1.382          __ sltu(AT, op1, op2);
   1.383 -        __ bne(R0, AT, L); 
   1.384 -        __ nop();
   1.385 -        __ move(dst, src);
   1.386 -        __ bind(L);
   1.387 -        break;
   1.388 +        __ movz(dst, src, AT);
   1.389 +        break;
   1.390 +
   1.391        case 0x05: //below
   1.392          __ sltu(AT, op1, op2);
   1.393 -       	__ beq(AT, R0, L);
   1.394 -        __ nop();
   1.395 -        __ move(dst, src);
   1.396 -        __ bind(L);
   1.397 -        break;
   1.398 +        __ movn(dst, src, AT);
   1.399 +        break;
   1.400 +
   1.401        case 0x06: //below_equal
   1.402          __ sltu(AT, op2, op1);
   1.403 -       	__ bne(R0, AT, L); 
   1.404 -        __ nop();
   1.405 -        __ move(dst, src);
   1.406 -        __ bind(L);
   1.407 +        __ movz(dst, src, AT);
   1.408         break;
   1.409 +
   1.410        default:
   1.411            Unimplemented();
   1.412      }  
   1.413 @@ -7071,10 +7006,8 @@
   1.414  
   1.415  
   1.416  instruct cmovN_cmpN_reg_reg(mRegN dst, mRegN src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
   1.417 -  //predicate(VM_Version::supports_cmov() );
   1.418 -  //predicate(false );
   1.419    match(Set dst (CMoveN (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
   1.420 -  ins_cost(200);
   1.421 +  ins_cost(80);
   1.422    format %{
   1.423               "CMPU$cop $tmp1,$tmp2\t @cmovN_cmpN_reg_reg\n\t"
   1.424               "CMOV $dst,$src\t @cmovN_cmpN_reg_reg"
   1.425 @@ -7085,50 +7018,39 @@
   1.426      Register dst = $dst$$Register;
   1.427      Register src = $src$$Register;
   1.428      int     flag = $cop$$cmpcode;
   1.429 -    Label      L; 
   1.430  
   1.431      switch(flag)
   1.432      {
   1.433        case 0x01: //equal
   1.434 -       	__ bne(op1, op2, L); 
   1.435 -        __ nop();
   1.436 -        __ move(dst, src);
   1.437 -        __ bind(L);
   1.438 -        break;
   1.439 +        __ subu32(AT, op1, op2);
   1.440 +        __ movz(dst, src, AT);
   1.441 +        break;
   1.442 +
   1.443        case 0x02: //not_equal
   1.444 -       	__ beq(op1, op2, L); 
   1.445 -        __ nop();
   1.446 -        __ move(dst, src);
   1.447 -        __ bind(L);
   1.448 -        break;
   1.449 +        __ subu32(AT, op1, op2);
   1.450 +        __ movn(dst, src, AT);
   1.451 +        break;
   1.452 +
   1.453        case 0x03: //above
   1.454          __ sltu(AT, op2, op1);
   1.455 -       	__ beq(AT, R0, L);
   1.456 -        __ nop();
   1.457 -        __ move(dst, src);
   1.458 -        __ bind(L);
   1.459 -        break;
   1.460 +        __ movn(dst, src, AT);
   1.461 +        break;
   1.462 +
   1.463        case 0x04: //above_equal
   1.464          __ sltu(AT, op1, op2);
   1.465 -        __ bne(R0, AT, L); 
   1.466 -        __ nop();
   1.467 -        __ move(dst, src);
   1.468 -        __ bind(L);
   1.469 -        break;
   1.470 +        __ movz(dst, src, AT);
   1.471 +        break;
   1.472 +
   1.473        case 0x05: //below
   1.474          __ sltu(AT, op1, op2);
   1.475 -       	__ beq(AT, R0, L);
   1.476 -        __ nop();
   1.477 -        __ move(dst, src);
   1.478 -        __ bind(L);
   1.479 -        break;
   1.480 +        __ movn(dst, src, AT);
   1.481 +        break;
   1.482 +
   1.483        case 0x06: //below_equal
   1.484          __ sltu(AT, op2, op1);
   1.485 -       	__ bne(R0, AT, L); 
   1.486 -        __ nop();
   1.487 -        __ move(dst, src);
   1.488 -        __ bind(L);
   1.489 +        __ movz(dst, src, AT);
   1.490         break;
   1.491 +
   1.492        default:
   1.493            Unimplemented();
   1.494      }  
   1.495 @@ -7139,10 +7061,8 @@
   1.496  
   1.497  
   1.498  instruct cmovI_cmpU_reg_reg(mRegI dst, mRegI src, mRegI tmp1, mRegI tmp2, cmpOpU cop ) %{
   1.499 -  //predicate(VM_Version::supports_cmov() );
   1.500 -  //predicate(false );
   1.501    match(Set dst (CMoveI (Binary cop (CmpU tmp1 tmp2)) (Binary dst src)));
   1.502 -  ins_cost(200);
   1.503 +  ins_cost(80);
   1.504    format %{
   1.505               "CMPU$cop $tmp1,$tmp2\t @cmovI_cmpU_reg_reg\n\t"
   1.506               "CMOV $dst,$src\t @cmovI_cmpU_reg_reg"
   1.507 @@ -7153,50 +7073,39 @@
   1.508      Register dst = $dst$$Register;
   1.509      Register src = $src$$Register;
   1.510      int     flag = $cop$$cmpcode;
   1.511 -    Label      L; 
   1.512  
   1.513      switch(flag)
   1.514      {
   1.515        case 0x01: //equal
   1.516 -       	__ bne(op1, op2, L); 
   1.517 -        __ nop();
   1.518 -        __ move(dst, src);
   1.519 -        __ bind(L);
   1.520 -        break;
   1.521 +        __ subu(AT, op1, op2);
   1.522 +        __ movz(dst, src, AT);
   1.523 +        break;
   1.524 +
   1.525        case 0x02: //not_equal
   1.526 -       	__ beq(op1, op2, L); 
   1.527 -        __ nop();
   1.528 -        __ move(dst, src);
   1.529 -        __ bind(L);
   1.530 -        break;
   1.531 +        __ subu(AT, op1, op2);
   1.532 +        __ movn(dst, src, AT);
   1.533 +        break;
   1.534 +
   1.535        case 0x03: //above
   1.536          __ sltu(AT, op2, op1);
   1.537 -       	__ beq(AT, R0, L);
   1.538 -        __ nop();
   1.539 -        __ move(dst, src);
   1.540 -        __ bind(L);
   1.541 -        break;
   1.542 +        __ movn(dst, src, AT);
   1.543 +        break;
   1.544 +
   1.545        case 0x04: //above_equal
   1.546          __ sltu(AT, op1, op2);
   1.547 -        __ bne(R0, AT, L); 
   1.548 -        __ nop();
   1.549 -        __ move(dst, src);
   1.550 -        __ bind(L);
   1.551 -        break;
   1.552 +        __ movz(dst, src, AT);
   1.553 +        break;
   1.554 +
   1.555        case 0x05: //below
   1.556          __ sltu(AT, op1, op2);
   1.557 -       	__ beq(AT, R0, L);
   1.558 -        __ nop();
   1.559 -        __ move(dst, src);
   1.560 -        __ bind(L);
   1.561 -        break;
   1.562 +        __ movn(dst, src, AT);
   1.563 +        break;
   1.564 +
   1.565        case 0x06: //below_equal
   1.566          __ sltu(AT, op2, op1);
   1.567 -       	__ bne(R0, AT, L); 
   1.568 -        __ nop();
   1.569 -        __ move(dst, src);
   1.570 -        __ bind(L);
   1.571 +        __ movz(dst, src, AT);
   1.572         break;
   1.573 +
   1.574        default:
   1.575            Unimplemented();
   1.576      }  
   1.577 @@ -7207,7 +7116,7 @@
   1.578  
   1.579  instruct cmovI_cmpL_reg_reg(mRegI dst, mRegI src, mRegL tmp1, mRegL tmp2, cmpOp cop ) %{
   1.580    match(Set dst (CMoveI (Binary cop (CmpL tmp1 tmp2)) (Binary dst src)));
   1.581 -  ins_cost(200);
   1.582 +  ins_cost(80);
   1.583    format %{
   1.584               "CMP$cop  $tmp1, $tmp2\t  @cmovI_cmpL_reg_reg\n"
   1.585               "\tCMOV  $dst,$src \t @cmovI_cmpL_reg_reg"
   1.586 @@ -7217,63 +7126,39 @@
   1.587      Register opr2 = as_Register($tmp2$$reg);
   1.588      Register dst     = $dst$$Register;
   1.589      Register src     = $src$$Register;
   1.590 -
   1.591      int     flag = $cop$$cmpcode;
   1.592  
   1.593 -    Label L, L1;
   1.594 -
   1.595 -
   1.596      switch(flag)
   1.597      {
   1.598        case 0x01: //equal
   1.599 -        __ bne(opr1, opr2, L);
   1.600 -        __ delayed()->nop();
   1.601 -        __ move(dst, src);
   1.602 -        __ bind(L);
   1.603 +        __ subu(AT, opr1, opr2);
   1.604 +        __ movz(dst, src, AT);
   1.605          break;
   1.606  
   1.607        case 0x02: //not_equal
   1.608 -        __ beq(opr1, opr2, L);
   1.609 -        __ delayed()->nop();
   1.610 -        __ move(dst, src);
   1.611 -        __ bind(L);
   1.612 +        __ subu(AT, opr1, opr2);
   1.613 +        __ movn(dst, src, AT);
   1.614          break;
   1.615  
   1.616        case 0x03: //greater
   1.617 -		__ slt(AT, opr2, opr1);
   1.618 -		__ beq(AT, R0, L);
   1.619 -		__ delayed()->nop();
   1.620 -		__ move(dst, src);
   1.621 -		__ bind(L);
   1.622 -
   1.623 +	__ slt(AT, opr2, opr1);
   1.624 +        __ movn(dst, src, AT);
   1.625          break;
   1.626  
   1.627        case 0x04: //greater_equal
   1.628          __ slt(AT, opr1, opr2);
   1.629 -        __ bne(AT, R0, L);
   1.630 -        __ delayed()->nop();
   1.631 -        __ move(dst, src);
   1.632 -        __ bind(L);
   1.633 -
   1.634 +        __ movz(dst, src, AT);
   1.635          break;
   1.636  
   1.637        case 0x05: //less
   1.638          __ slt(AT, opr1, opr2);
   1.639 -        __ beq(AT, R0, L);
   1.640 -        __ delayed()->nop();
   1.641 -        __ move(dst, src);
   1.642 -        __ bind(L);
   1.643 -
   1.644 +        __ movn(dst, src, AT);
   1.645          break;
   1.646  
   1.647        case 0x06: //less_equal
   1.648 -       __ slt(AT, opr2, opr1);
   1.649 -       __ bne(AT, R0, L);
   1.650 -       __ delayed()->nop();
   1.651 -       __ move(dst, src);
   1.652 -       __ bind(L);
   1.653 -
   1.654 -       break;
   1.655 +        __ slt(AT, opr2, opr1);
   1.656 +        __ movz(dst, src, AT);
   1.657 +        break;
   1.658  
   1.659        default:
   1.660            Unimplemented();
   1.661 @@ -7285,7 +7170,7 @@
   1.662  
   1.663  instruct cmovP_cmpL_reg_reg(mRegP dst, mRegP src, mRegL tmp1, mRegL tmp2, cmpOp cop ) %{
   1.664    match(Set dst (CMoveP (Binary cop (CmpL tmp1 tmp2)) (Binary dst src)));
   1.665 -  ins_cost(200);
   1.666 +  ins_cost(80);
   1.667    format %{
   1.668               "CMP$cop  $tmp1, $tmp2\t  @cmovP_cmpL_reg_reg\n"
   1.669               "\tCMOV  $dst,$src \t @cmovP_cmpL_reg_reg"
   1.670 @@ -7295,57 +7180,38 @@
   1.671      Register opr2 = as_Register($tmp2$$reg);
   1.672      Register dst     = $dst$$Register;
   1.673      Register src     = $src$$Register;
   1.674 -
   1.675      int     flag = $cop$$cmpcode;
   1.676  
   1.677 -    Label L, L1;
   1.678 -
   1.679      switch(flag)
   1.680      {
   1.681        case 0x01: //equal
   1.682 -        __ bne(opr1, opr2, L);
   1.683 -        __ delayed()->nop();
   1.684 -        __ move(dst, src);
   1.685 -        __ bind(L);
   1.686 +        __ subu(AT, opr1, opr2);
   1.687 +        __ movz(dst, src, AT);
   1.688          break;
   1.689  
   1.690        case 0x02: //not_equal
   1.691 -        __ beq(opr1, opr2, L);
   1.692 -        __ delayed()->nop();
   1.693 -        __ move(dst, src);
   1.694 -        __ bind(L);
   1.695 +        __ subu(AT, opr1, opr2);
   1.696 +        __ movn(dst, src, AT);
   1.697          break;
   1.698  
   1.699        case 0x03: //greater
   1.700          __ slt(AT, opr2, opr1);
   1.701 -        __ beq(AT, R0, L);
   1.702 -        __ delayed()->nop();
   1.703 -        __ move(dst, src);
   1.704 -        __ bind(L);
   1.705 +        __ movn(dst, src, AT);
   1.706          break;
   1.707  
   1.708        case 0x04: //greater_equal
   1.709          __ slt(AT, opr1, opr2);
   1.710 -        __ bne(AT, R0, L);
   1.711 -        __ delayed()->nop();
   1.712 -        __ move(dst, src);
   1.713 -        __ bind(L);
   1.714 +        __ movz(dst, src, AT);
   1.715          break;
   1.716  
   1.717        case 0x05: //less
   1.718          __ slt(AT, opr1, opr2);
   1.719 -        __ beq(AT, R0, L);
   1.720 -        __ delayed()->nop();
   1.721 -        __ move(dst, src);
   1.722 -        __ bind(L);
   1.723 +        __ movn(dst, src, AT);
   1.724          break;
   1.725  
   1.726        case 0x06: //less_equal
   1.727          __ slt(AT, opr2, opr1);
   1.728 -       	__ bne(AT, R0, L); 
   1.729 -        __ nop();
   1.730 -        __ move(dst, src);
   1.731 -        __ bind(L);
   1.732 +        __ movz(dst, src, AT);
   1.733          break;
   1.734  
   1.735        default:
   1.736 @@ -7428,10 +7294,8 @@
   1.737  
   1.738  
   1.739  instruct cmovP_cmpP_reg_reg(mRegP dst, mRegP src, mRegP tmp1, mRegP tmp2, cmpOpU cop ) %{
   1.740 -  //predicate(VM_Version::supports_cmov() );
   1.741 -  //predicate(false );
   1.742    match(Set dst (CMoveP (Binary cop (CmpP tmp1 tmp2)) (Binary dst src)));
   1.743 -  ins_cost(200);
   1.744 +  ins_cost(80);
   1.745    format %{
   1.746               "CMPU$cop $tmp1,$tmp2\t @cmovP_cmpP_reg_reg\n\t"
   1.747               "CMOV $dst,$src\t @cmovP_cmpP_reg_reg"
   1.748 @@ -7442,50 +7306,39 @@
   1.749      Register dst = $dst$$Register;
   1.750      Register src = $src$$Register;
   1.751      int     flag = $cop$$cmpcode;
   1.752 -    Label      L; 
   1.753  
   1.754      switch(flag)
   1.755      {
   1.756        case 0x01: //equal
   1.757 -       	__ bne(op1, op2, L); 
   1.758 -        __ nop();
   1.759 -        __ move(dst, src);
   1.760 -        __ bind(L);
   1.761 -        break;
   1.762 +        __ subu(AT, op1, op2);
   1.763 +        __ movz(dst, src, AT);
   1.764 +        break;
   1.765 +
   1.766        case 0x02: //not_equal
   1.767 -       	__ beq(op1, op2, L); 
   1.768 -        __ nop();
   1.769 -        __ move(dst, src);
   1.770 -        __ bind(L);
   1.771 -        break;
   1.772 +        __ subu(AT, op1, op2);
   1.773 +        __ movn(dst, src, AT);
   1.774 +        break;
   1.775 +
   1.776        case 0x03: //above
   1.777          __ sltu(AT, op2, op1);
   1.778 -       	__ beq(AT, R0, L);
   1.779 -        __ nop();
   1.780 -        __ move(dst, src);
   1.781 -        __ bind(L);
   1.782 -        break;
   1.783 +        __ movn(dst, src, AT);
   1.784 +        break;
   1.785 +
   1.786        case 0x04: //above_equal
   1.787          __ sltu(AT, op1, op2);
   1.788 -        __ bne(AT, R0, L); 
   1.789 -        __ nop();
   1.790 -        __ move(dst, src);
   1.791 -        __ bind(L);
   1.792 -        break;
   1.793 +        __ movz(dst, src, AT);
   1.794 +        break;
   1.795 +
   1.796        case 0x05: //below
   1.797          __ sltu(AT, op1, op2);
   1.798 -       	__ beq(R0, AT, L);
   1.799 -        __ nop();
   1.800 -        __ move(dst, src);
   1.801 -        __ bind(L);
   1.802 -        break;
   1.803 +        __ movn(dst, src, AT);
   1.804 +        break;
   1.805 +
   1.806        case 0x06: //below_equal
   1.807          __ sltu(AT, op2, op1);
   1.808 -       	__ bne(AT, R0, L); 
   1.809 -        __ nop();
   1.810 -        __ move(dst, src);
   1.811 -        __ bind(L);
   1.812 +        __ movz(dst, src, AT);
   1.813         break;
   1.814 +
   1.815        default:
   1.816            Unimplemented();
   1.817      }  
   1.818 @@ -7495,10 +7348,8 @@
   1.819  %}
   1.820  
   1.821  instruct cmovP_cmpI_reg_reg(mRegP dst, mRegP src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
   1.822 -  //predicate(VM_Version::supports_cmov() );
   1.823 -  //predicate(false );
   1.824    match(Set dst (CMoveP (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
   1.825 -  ins_cost(200);
   1.826 +  ins_cost(80);
   1.827    format %{
   1.828               "CMP$cop $tmp1,$tmp2\t @cmovP_cmpI_reg_reg\n\t"
   1.829               "CMOV $dst,$src\t @cmovP_cmpI_reg_reg"
   1.830 @@ -7509,50 +7360,39 @@
   1.831      Register dst = $dst$$Register;
   1.832      Register src = $src$$Register;
   1.833      int     flag = $cop$$cmpcode;
   1.834 -    Label      L; 
   1.835  
   1.836      switch(flag)
   1.837      {
   1.838        case 0x01: //equal
   1.839 -       	__ bne(op1, op2, L); 
   1.840 -        __ nop();
   1.841 -        __ move(dst, src);
   1.842 -        __ bind(L);
   1.843 -        break;
   1.844 +        __ subu32(AT, op1, op2);
   1.845 +        __ movz(dst, src, AT);
   1.846 +        break;
   1.847 +
   1.848        case 0x02: //not_equal
   1.849 -       	__ beq(op1, op2, L); 
   1.850 -        __ nop();
   1.851 -        __ move(dst, src);
   1.852 -        __ bind(L);
   1.853 -        break;
   1.854 +        __ subu32(AT, op1, op2);
   1.855 +        __ movn(dst, src, AT);
   1.856 +        break;
   1.857 +
   1.858        case 0x03: //above
   1.859          __ slt(AT, op2, op1);
   1.860 -       	__ beq(AT, R0, L);
   1.861 -        __ nop();
   1.862 -        __ move(dst, src);
   1.863 -        __ bind(L);
   1.864 -        break;
   1.865 +        __ movn(dst, src, AT);
   1.866 +        break;
   1.867 +
   1.868        case 0x04: //above_equal
   1.869          __ slt(AT, op1, op2);
   1.870 -        __ bne(AT, R0, L); 
   1.871 -        __ nop();
   1.872 -        __ move(dst, src);
   1.873 -        __ bind(L);
   1.874 -        break;
   1.875 +        __ movz(dst, src, AT);
   1.876 +        break;
   1.877 +
   1.878        case 0x05: //below
   1.879          __ slt(AT, op1, op2);
   1.880 -       	__ beq(R0, AT, L);
   1.881 -        __ nop();
   1.882 -        __ move(dst, src);
   1.883 -        __ bind(L);
   1.884 -        break;
   1.885 +        __ movn(dst, src, AT);
   1.886 +        break;
   1.887 +
   1.888        case 0x06: //below_equal
   1.889          __ slt(AT, op2, op1);
   1.890 -       	__ bne(AT, R0, L); 
   1.891 -        __ nop();
   1.892 -        __ move(dst, src);
   1.893 -        __ bind(L);
   1.894 +        __ movz(dst, src, AT);
   1.895         break;
   1.896 +
   1.897        default:
   1.898            Unimplemented();
   1.899      }  
   1.900 @@ -7562,10 +7402,8 @@
   1.901  %}
   1.902  
   1.903  instruct cmovN_cmpI_reg_reg(mRegN dst, mRegN src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
   1.904 -  //predicate(VM_Version::supports_cmov() );
   1.905 -  //predicate(false );
   1.906    match(Set dst (CMoveN (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
   1.907 -  ins_cost(200);
   1.908 +  ins_cost(80);
   1.909    format %{
   1.910               "CMP$cop $tmp1,$tmp2\t @cmovN_cmpI_reg_reg\n\t"
   1.911               "CMOV $dst,$src\t @cmovN_cmpI_reg_reg"
   1.912 @@ -7576,50 +7414,39 @@
   1.913      Register dst = $dst$$Register;
   1.914      Register src = $src$$Register;
   1.915      int     flag = $cop$$cmpcode;
   1.916 -    Label      L; 
   1.917  
   1.918      switch(flag)
   1.919      {
   1.920        case 0x01: //equal
   1.921 -       	__ bne(op1, op2, L); 
   1.922 -        __ nop();
   1.923 -        __ move(dst, src);
   1.924 -        __ bind(L);
   1.925 -        break;
   1.926 +        __ subu32(AT, op1, op2);
   1.927 +        __ movz(dst, src, AT);
   1.928 +        break;
   1.929 +
   1.930        case 0x02: //not_equal
   1.931 -       	__ beq(op1, op2, L); 
   1.932 -        __ nop();
   1.933 -        __ move(dst, src);
   1.934 -        __ bind(L);
   1.935 -        break;
   1.936 +        __ subu32(AT, op1, op2);
   1.937 +        __ movn(dst, src, AT);
   1.938 +        break;
   1.939 +
   1.940        case 0x03: //above
   1.941          __ slt(AT, op2, op1);
   1.942 -       	__ beq(AT, R0, L);
   1.943 -        __ nop();
   1.944 -        __ move(dst, src);
   1.945 -        __ bind(L);
   1.946 -        break;
   1.947 +        __ movn(dst, src, AT);
   1.948 +        break;
   1.949 +
   1.950        case 0x04: //above_equal
   1.951          __ slt(AT, op1, op2);
   1.952 -        __ bne(AT, R0, L); 
   1.953 -        __ nop();
   1.954 -        __ move(dst, src);
   1.955 -        __ bind(L);
   1.956 -        break;
   1.957 +        __ movz(dst, src, AT);
   1.958 +        break;
   1.959 +
   1.960        case 0x05: //below
   1.961          __ slt(AT, op1, op2);
   1.962 -       	__ beq(R0, AT, L);
   1.963 -        __ nop();
   1.964 -        __ move(dst, src);
   1.965 -        __ bind(L);
   1.966 -        break;
   1.967 +        __ movn(dst, src, AT);
   1.968 +        break;
   1.969 +
   1.970        case 0x06: //below_equal
   1.971          __ slt(AT, op2, op1);
   1.972 -       	__ bne(AT, R0, L); 
   1.973 -        __ nop();
   1.974 -        __ move(dst, src);
   1.975 -        __ bind(L);
   1.976 +        __ movz(dst, src, AT);
   1.977         break;
   1.978 +
   1.979        default:
   1.980            Unimplemented();
   1.981      }  
   1.982 @@ -7631,7 +7458,7 @@
   1.983  
   1.984  instruct cmovL_cmpI_reg_reg(mRegL dst, mRegL src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
   1.985    match(Set dst (CMoveL (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
   1.986 -  ins_cost(200);
   1.987 +  ins_cost(80);
   1.988    format %{
   1.989               "CMP$cop  $tmp1, $tmp2\t  @cmovL_cmpI_reg_reg\n"
   1.990               "\tCMOV  $dst,$src \t @cmovL_cmpI_reg_reg"
   1.991 @@ -7643,50 +7470,39 @@
   1.992      Register dst = as_Register($dst$$reg);
   1.993      Register src = as_Register($src$$reg);
   1.994      int     flag = $cop$$cmpcode;
   1.995 -    Label      L; 
   1.996  
   1.997      switch(flag)
   1.998      {
   1.999        case 0x01: //equal
  1.1000 -       	__ bne(op1, op2, L); 
  1.1001 -        __ nop();
  1.1002 -        __ move(dst, src);
  1.1003 -        __ bind(L);
  1.1004 -        break;
  1.1005 +        __ subu32(AT, op1, op2);
  1.1006 +        __ movz(dst, src, AT);
  1.1007 +        break;
  1.1008 +
  1.1009        case 0x02: //not_equal
  1.1010 -       	__ beq(op1, op2, L); 
  1.1011 -        __ nop();
  1.1012 -        __ move(dst, src);
  1.1013 -        __ bind(L);
  1.1014 -        break;
  1.1015 +        __ subu32(AT, op1, op2);
  1.1016 +        __ movn(dst, src, AT);
  1.1017 +        break;
  1.1018 +
  1.1019        case 0x03: //great
  1.1020          __ slt(AT, op2, op1);
  1.1021 -       	__ beq(AT, R0, L);
  1.1022 -        __ nop();
  1.1023 -        __ move(dst, src);
  1.1024 -        __ bind(L);
  1.1025 -        break;
  1.1026 +        __ movn(dst, src, AT);
  1.1027 +        break;
  1.1028 +
  1.1029        case 0x04: //great_equal
  1.1030          __ slt(AT, op1, op2);
  1.1031 -        __ bne(AT, R0, L); 
  1.1032 -        __ nop();
  1.1033 -        __ move(dst, src);
  1.1034 -        __ bind(L);
  1.1035 -        break;
  1.1036 +        __ movz(dst, src, AT);
  1.1037 +        break;
  1.1038 +
  1.1039        case 0x05: //less
  1.1040          __ slt(AT, op1, op2);
  1.1041 -       	__ beq(AT, R0, L);
  1.1042 -        __ nop();
  1.1043 -        __ move(dst, src);
  1.1044 -        __ bind(L);
  1.1045 -        break;
  1.1046 +        __ movn(dst, src, AT);
  1.1047 +        break;
  1.1048 +
  1.1049        case 0x06: //less_equal
  1.1050          __ slt(AT, op2, op1);
  1.1051 -       	__ bne(AT, R0, L); 
  1.1052 -        __ nop();
  1.1053 -        __ move(dst, src);
  1.1054 -        __ bind(L);
  1.1055 +        __ movz(dst, src, AT);
  1.1056         break;
  1.1057 +
  1.1058        default:
  1.1059            Unimplemented();
  1.1060      }  
  1.1061 @@ -7697,7 +7513,7 @@
  1.1062  
  1.1063  instruct cmovL_cmpL_reg_reg(mRegL dst, mRegL src, mRegL tmp1, mRegL tmp2, cmpOp cop ) %{
  1.1064    match(Set dst (CMoveL (Binary cop (CmpL tmp1 tmp2)) (Binary dst src)));
  1.1065 -  ins_cost(200);
  1.1066 +  ins_cost(80);
  1.1067    format %{
  1.1068               "CMP$cop  $tmp1, $tmp2\t  @cmovL_cmpL_reg_reg\n"
  1.1069               "\tCMOV  $dst,$src \t @cmovL_cmpL_reg_reg"
  1.1070 @@ -7707,57 +7523,38 @@
  1.1071      Register opr2 = as_Register($tmp2$$reg);
  1.1072      Register dst  = as_Register($dst$$reg);
  1.1073      Register src  = as_Register($src$$reg);
  1.1074 -
  1.1075      int     flag = $cop$$cmpcode;
  1.1076  
  1.1077 -    Label L;
  1.1078 -
  1.1079      switch(flag)
  1.1080      {
  1.1081        case 0x01: //equal
  1.1082 -        __ bne(opr1, opr2, L);
  1.1083 -        __ delayed()->nop();
  1.1084 -        __ move(dst, src);
  1.1085 -        __ bind(L);
  1.1086 +        __ subu(AT, opr1, opr2);
  1.1087 +        __ movz(dst, src, AT);
  1.1088          break;
  1.1089  
  1.1090        case 0x02: //not_equal
  1.1091 -        __ beq(opr1, opr2, L);
  1.1092 -        __ delayed()->nop();
  1.1093 -        __ move(dst, src);
  1.1094 -        __ bind(L);
  1.1095 +        __ subu(AT, opr1, opr2);
  1.1096 +        __ movn(dst, src, AT);
  1.1097          break;
  1.1098  
  1.1099        case 0x03: //greater
  1.1100          __ slt(AT, opr2, opr1);
  1.1101 -        __ beq(AT, R0, L);
  1.1102 -        __ nop();
  1.1103 -        __ move(dst, src);
  1.1104 -        __ bind(L);
  1.1105 +        __ movn(dst, src, AT);
  1.1106          break;
  1.1107  
  1.1108        case 0x04: //greater_equal
  1.1109          __ slt(AT, opr1, opr2);
  1.1110 -        __ bne(AT, R0, L);
  1.1111 -        __ nop();
  1.1112 -        __ move(dst, src);
  1.1113 -        __ bind(L);
  1.1114 +        __ movz(dst, src, AT);
  1.1115          break;
  1.1116  
  1.1117        case 0x05: //less
  1.1118          __ slt(AT, opr1, opr2);
  1.1119 -        __ beq(AT, R0, L);
  1.1120 -        __ nop();
  1.1121 -        __ move(dst, src);
  1.1122 -        __ bind(L);
  1.1123 +        __ movn(dst, src, AT);
  1.1124          break;
  1.1125  
  1.1126        case 0x06: //less_equal
  1.1127         __ slt(AT, opr2, opr1);
  1.1128 -       __ bne(AT, R0, L);
  1.1129 -       __ nop();
  1.1130 -       __ move(dst, src);
  1.1131 -       __ bind(L);
  1.1132 +       __ movz(dst, src, AT);
  1.1133         break;
  1.1134  
  1.1135        default:
  1.1136 @@ -7769,10 +7566,8 @@
  1.1137  %}
  1.1138  
  1.1139  instruct cmovL_cmpN_reg_reg(mRegL dst, mRegL src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
  1.1140 -  //predicate(VM_Version::supports_cmov() );
  1.1141 -  //predicate(false );
  1.1142    match(Set dst (CMoveL (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
  1.1143 -  ins_cost(200);
  1.1144 +  ins_cost(80);
  1.1145    format %{
  1.1146               "CMPU$cop $tmp1,$tmp2\t @cmovL_cmpN_reg_reg\n\t"
  1.1147               "CMOV $dst,$src\t @cmovL_cmpN_reg_reg"
  1.1148 @@ -7783,50 +7578,39 @@
  1.1149      Register dst = $dst$$Register;
  1.1150      Register src = $src$$Register;
  1.1151      int     flag = $cop$$cmpcode;
  1.1152 -    Label      L; 
  1.1153  
  1.1154      switch(flag)
  1.1155      {
  1.1156        case 0x01: //equal
  1.1157 -       	__ bne(op1, op2, L); 
  1.1158 -        __ nop();
  1.1159 -        __ move(dst, src);
  1.1160 -        __ bind(L);
  1.1161 -        break;
  1.1162 +        __ subu32(AT, op1, op2);
  1.1163 +        __ movz(dst, src, AT);
  1.1164 +        break;
  1.1165 +
  1.1166        case 0x02: //not_equal
  1.1167 -       	__ beq(op1, op2, L); 
  1.1168 -        __ nop();
  1.1169 -        __ move(dst, src);
  1.1170 -        __ bind(L);
  1.1171 -        break;
  1.1172 +        __ subu32(AT, op1, op2);
  1.1173 +        __ movn(dst, src, AT);
  1.1174 +        break;
  1.1175 +
  1.1176        case 0x03: //above
  1.1177          __ sltu(AT, op2, op1);
  1.1178 -       	__ beq(AT, R0, L);
  1.1179 -        __ nop();
  1.1180 -        __ move(dst, src);
  1.1181 -        __ bind(L);
  1.1182 -        break;
  1.1183 +        __ movn(dst, src, AT);
  1.1184 +        break;
  1.1185 +
  1.1186        case 0x04: //above_equal
  1.1187          __ sltu(AT, op1, op2);
  1.1188 -        __ bne(R0, AT, L); 
  1.1189 -        __ nop();
  1.1190 -        __ move(dst, src);
  1.1191 -        __ bind(L);
  1.1192 -        break;
  1.1193 +        __ movz(dst, src, AT);
  1.1194 +        break;
  1.1195 +
  1.1196        case 0x05: //below
  1.1197          __ sltu(AT, op1, op2);
  1.1198 -       	__ beq(AT, R0, L);
  1.1199 -        __ nop();
  1.1200 -        __ move(dst, src);
  1.1201 -        __ bind(L);
  1.1202 -        break;
  1.1203 +        __ movn(dst, src, AT);
  1.1204 +        break;
  1.1205 +
  1.1206        case 0x06: //below_equal
  1.1207          __ sltu(AT, op2, op1);
  1.1208 -       	__ bne(R0, AT, L); 
  1.1209 -        __ nop();
  1.1210 -        __ move(dst, src);
  1.1211 -        __ bind(L);
  1.1212 -       break;
  1.1213 +        __ movz(dst, src, AT);
  1.1214 +        break;
  1.1215 +
  1.1216        default:
  1.1217            Unimplemented();
  1.1218      }