Mercurial > jdk8-mips64-public > hotspot / file comparison
comparison: src/cpu/mips/vm/mips_64.ad
src/cpu/mips/vm/mips_64.ad
- changeset 81
- d8e0aa0ab460
- parent 80
- 61c429e80c96
- child 82
- b571b3a6b5e6
equal
deleted
inserted
replaced
| 80:61c429e80c96 | 81:d8e0aa0ab460 |
|---|---|
| 2802 if( Assembler::is_simm16(disp) ) { | 2802 if( Assembler::is_simm16(disp) ) { |
| 2803 __ ldc1(dst_reg, as_Register(base), disp); | 2803 __ ldc1(dst_reg, as_Register(base), disp); |
| 2804 } else { | 2804 } else { |
| 2805 __ move(T9, disp); | 2805 __ move(T9, disp); |
| 2806 if( UseLoongsonISA ) { | 2806 if( UseLoongsonISA ) { |
| 2807 gsldxc1(dst_reg, as_Register(base), T9, 0); | 2807 __ gsldxc1(dst_reg, as_Register(base), T9, 0); |
| 2808 } else { | 2808 } else { |
| 2809 __ addu(AT, as_Register(base), T9); | 2809 __ addu(AT, as_Register(base), T9); |
| 2810 __ ldc1(dst_reg, AT, 0); | 2810 __ ldc1(dst_reg, AT, 0); |
| 2811 } | 2811 } |
| 2812 } | 2812 } |
| 2822 FloatRegister src_reg = as_FloatRegister($src$$reg); | 2822 FloatRegister src_reg = as_FloatRegister($src$$reg); |
| 2823 | 2823 |
| 2824 guarantee(scale == 0, "scale is not zero !"); | 2824 guarantee(scale == 0, "scale is not zero !"); |
| 2825 | 2825 |
| 2826 if( index != 0 ) { | 2826 if( index != 0 ) { |
| 2827 __ daddu(AT, as_Register(base), as_Register(index)); | |
| 2828 if( Assembler::is_simm16(disp) ) { | 2827 if( Assembler::is_simm16(disp) ) { |
| 2829 __ sdc1(src_reg, AT, disp); | 2828 if( UseLoongsonISA && Assembler::is_simm(disp, 8) ) { |
| 2829 __ gssdxc1(src_reg, as_Register(base), as_Register(index), disp); | |
| 2830 } else { | |
| 2831 __ daddu(AT, as_Register(base), as_Register(index)); | |
| 2832 __ sdc1(src_reg, AT, disp); | |
| 2833 } | |
| 2830 } else { | 2834 } else { |
| 2835 __ daddu(AT, as_Register(base), as_Register(index)); | |
| 2831 __ move(T9, disp); | 2836 __ move(T9, disp); |
| 2832 __ addu(AT, AT, T9); | 2837 if( UseLoongsonISA ) { |
| 2833 __ sdc1(src_reg, AT, 0); | 2838 __ gssdxc1(src_reg, AT, T9, 0); |
| 2839 } else { | |
| 2840 __ addu(AT, AT, T9); | |
| 2841 __ sdc1(src_reg, AT, 0); | |
| 2842 } | |
| 2834 } | 2843 } |
| 2835 } else { | 2844 } else { |
| 2836 if( Assembler::is_simm16(disp) ) { | 2845 if( Assembler::is_simm16(disp) ) { |
| 2837 __ sdc1(src_reg, as_Register(base), disp); | 2846 __ sdc1(src_reg, as_Register(base), disp); |
| 2838 } else { | 2847 } else { |
| 2839 __ move(T9, disp); | 2848 __ move(T9, disp); |
| 2840 __ addu(AT, as_Register(base), T9); | 2849 if( UseLoongsonISA ) { |
| 2841 __ sdc1(src_reg, AT, 0); | 2850 __ gssdxc1(src_reg, as_Register(base), T9, 0); |
| 2851 } else { | |
| 2852 __ addu(AT, as_Register(base), T9); | |
| 2853 __ sdc1(src_reg, AT, 0); | |
| 2854 } | |
| 2842 } | 2855 } |
| 2843 } | 2856 } |
| 2844 %} | 2857 %} |
| 2845 | 2858 |
| 2846 enc_class Java_To_Runtime (method meth) %{ // CALL Java_To_Runtime, Java_To_Runtime_Leaf | 2859 enc_class Java_To_Runtime (method meth) %{ // CALL Java_To_Runtime, Java_To_Runtime_Leaf |
