Tue, 28 Mar 2017 16:09:10 -0400 |
Add UseCodeCacheAllocOpt for MIPS. |
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Wed, 22 Mar 2017 04:54:35 -0400 |
Set the default value of UseSyncLevel as 1000. |
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Thu, 09 Mar 2017 15:11:22 +0800 |
#4784 [interpreter] Use array bounds check instructions to optimize array load and store bytecodes. |
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Sun, 12 Mar 2017 09:04:47 +0800 |
#4670 Detect LoongsonCPUs to adapt different platforms. |
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Fri, 24 Feb 2017 00:44:21 -0500 |
Import UseSyncLevel flag for Loongson CPUs. |
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Tue, 17 Jan 2017 19:57:30 -0500 |
ctz/dctz are only supported on 3A2000/3A3000 CPUs (Follows changeset:32b76f240db3). |
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Tue, 17 Jan 2017 21:53:02 -0500 |
Fix a SIGILL bug introduced by changeset 101daea92bb3. |
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Fri, 16 Dec 2016 11:39:00 +0800 |
[C2] Added Zeros Count Instructions support in mips_64.ad |
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Fri, 25 Nov 2016 12:52:49 +0800 |
removed useless flag |
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Tue, 15 Nov 2016 16:12:45 +0800 |
#4663 UseLoongsonISA and Use3A2000 were moved into globals_mips.hpp |
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Fri, 25 Nov 2016 12:50:45 +0800 |
Added flag SetFSFOFN to set FS/FO/FN in FCSR |
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Wed, 11 May 2016 09:32:14 -0400 |
[C2] InlineSmallCode=4000: xml.validation 14.57% up |
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Fri, 29 Apr 2016 00:06:10 +0800 |
Added MIPS 64-bit port. |
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