Mercurial > jdk8-mips64-public > hotspot / changeset
changeset
some C1 fix
Thu, 24 May 2018 19:49:50 +0800
- author
- aoqi
- date
- Thu, 24 May 2018 19:49:50 +0800
- changeset 8865
- ffcdff41a92f
- parent 8864
- e4aeef458496
- child 8866
- 67d25ceaf28b
some C1 fix
Contributed-by: chenhaoxuan, zhaixiang, aoqi
1.1 --- a/src/cpu/mips/vm/c1_CodeStubs_mips.cpp Sat Jan 06 16:30:58 2018 +0800 1.2 +++ b/src/cpu/mips/vm/c1_CodeStubs_mips.cpp Thu May 24 19:49:50 2018 +0800 1.3 @@ -51,6 +51,7 @@ 1.4 #ifdef TIERED 1.5 void CounterOverflowStub::emit_code(LIR_Assembler* ce) { 1.6 __ bind(_entry); 1.7 + ce->store_parameter(_method->as_register(), 1); 1.8 ce->store_parameter(_bci, 0); 1.9 __ call(Runtime1::entry_for(Runtime1::counter_overflow_id), relocInfo::runtime_call_type); 1.10 __ delayed()->nop(); 1.11 @@ -198,22 +199,16 @@ 1.12 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) { 1.13 assert(__ sp_offset() == 0, "frame size should be fixed"); 1.14 __ bind(_entry); 1.15 - //assert(_length->as_register() == rbx, "length must in rbx,"); 1.16 - //assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); 1.17 - //__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id))); 1.18 assert(_length->as_register() == T2, "length must in ebx"); 1.19 #ifndef _LP64 1.20 assert(_klass_reg->as_register() == T4, "klass_reg must in T4"); 1.21 #else 1.22 - //FIXME. in A4? aoqi 1.23 assert(_klass_reg->as_register() == A4, "klass_reg must in A4"); 1.24 #endif 1.25 __ call(Runtime1::entry_for(Runtime1::new_object_array_id), relocInfo::runtime_call_type); 1.26 __ delayed()->nop(); 1.27 ce->add_call_info_here(_info); 1.28 ce->verify_oop_map(_info); 1.29 - //assert(_result->as_register() == rax, "result must in rax,"); 1.30 - //__ jmp(_continuation); 1.31 assert(_result->as_register() == V0, "result must in eax"); 1.32 __ b_far(_continuation); 1.33 __ delayed()->nop(); 1.34 @@ -234,20 +229,14 @@ 1.35 __ bind(_entry); 1.36 ce->store_parameter(_obj_reg->as_register(), 1); 1.37 ce->store_parameter(_lock_reg->is_single_cpu()? _lock_reg->as_register() : _lock_reg->as_register_lo(), 0); 1.38 - /* 1.39 - Runtime1::StubID enter_id; 1.40 - if (ce->compilation()->has_fpu_code()) { 1.41 - enter_id = Runtime1::monitorenter_id; 1.42 - } else { 1.43 - enter_id = Runtime1::monitorenter_nofpu_id; 1.44 - } 1.45 - __ call(RuntimeAddress(Runtime1::entry_for(enter_id))); 1.46 - */ 1.47 + Runtime1::StubID enter_id; 1.48 if (ce->compilation()->has_fpu_code()) { 1.49 - __ call(Runtime1::entry_for(Runtime1::monitorenter_id), relocInfo::runtime_call_type); 1.50 + enter_id = Runtime1::monitorenter_id; 1.51 } else { 1.52 - __ call(Runtime1::entry_for(Runtime1::monitorenter_nofpu_id), relocInfo::runtime_call_type); 1.53 + enter_id = Runtime1::monitorenter_nofpu_id; 1.54 } 1.55 + //__ call(RuntimeAddress(Runtime1::entry_for(enter_id))); 1.56 + __ call(Runtime1::entry_for(enter_id), relocInfo::runtime_call_type); 1.57 __ delayed()->nop(); 1.58 ce->add_call_info_here(_info); 1.59 ce->verify_oop_map(_info); 1.60 @@ -264,24 +253,16 @@ 1.61 } 1.62 ce->store_parameter(_lock_reg->as_register(), 0); 1.63 // note: non-blocking leaf routine => no call info needed 1.64 - /* 1.65 - Runtime1::StubID exit_id; 1.66 - if (ce->compilation()->has_fpu_code()) { 1.67 - exit_id = Runtime1::monitorexit_id; 1.68 - } else { 1.69 - exit_id = Runtime1::monitorexit_nofpu_id; 1.70 - } 1.71 - __ call(RuntimeAddress(Runtime1::entry_for(exit_id))); 1.72 - __ jmp(_continuation); 1.73 - */ 1.74 + Runtime1::StubID exit_id; 1.75 if (ce->compilation()->has_fpu_code()) { 1.76 - __ call(Runtime1::entry_for(Runtime1::monitorexit_id), relocInfo::runtime_call_type); 1.77 + exit_id = Runtime1::monitorexit_id; 1.78 } else { 1.79 - __ call(Runtime1::entry_for(Runtime1::monitorexit_nofpu_id), relocInfo::runtime_call_type); 1.80 + exit_id = Runtime1::monitorexit_nofpu_id; 1.81 } 1.82 + //__ call(RuntimeAddress(Runtime1::entry_for(exit_id))); 1.83 + __ call(Runtime1::entry_for(exit_id), relocInfo::runtime_call_type); 1.84 __ delayed()->nop(); 1.85 1.86 - //__ jmp(_continuation); 1.87 __ b_far(_continuation); 1.88 __ delayed()->nop(); 1.89 } 1.90 @@ -308,7 +289,8 @@ 1.91 // doesn't span a cache line. 1.92 1.93 // the NativeJump is not finished, i am not sure what to do here. FIXME 1.94 - //masm->align(round_to(NativeGeneralJump::instruction_size, wordSize)); 1.95 + // masm->align(round_to(NativeGeneralJump::instruction_size, wordSize)); 1.96 + //tty->print_cr("align_patch_site has not finished yet!!!"); 1.97 } 1.98 1.99 void PatchingStub::emit_code(LIR_Assembler* ce) { 1.100 @@ -327,19 +309,31 @@ 1.101 } 1.102 if (_id == load_klass_id) { 1.103 // produce a copy of the load klass instruction for use by the being initialized case 1.104 +//#ifdef ASSERT 1.105 address start = __ pc(); 1.106 +//#endif 1.107 + Metadata* o = NULL; 1.108 + RelocationHolder rspec = metadata_Relocation::spec(_index); 1.109 + __ relocate(rspec); 1.110 + __ li48(_obj, (long)o); 1.111 + while ((intx)__ pc() - (intx)start < NativeCall::instruction_size) { 1.112 + __ nop(); 1.113 + } 1.114 +#ifdef ASSERT 1.115 + for (int i = 0; i < _bytes_to_copy; i++) { 1.116 + address ptr = (address)(_pc_start + i); 1.117 + int a_byte = (*ptr) & 0xFF; 1.118 + assert(a_byte == *start++, "should be the same code"); 1.119 + } 1.120 +#endif 1.121 + } else if (_id == load_mirror_id || _id == load_appendix_id) { 1.122 +//#ifdef ASSERT 1.123 + address start = __ pc(); 1.124 +//#endif 1.125 jobject o = NULL; 1.126 - int oop_index = __ oop_recorder()->allocate_oop_index(o); 1.127 - RelocationHolder rspec = oop_Relocation::spec(oop_index); 1.128 + RelocationHolder rspec = oop_Relocation::spec(_index); 1.129 __ relocate(rspec); 1.130 -#ifndef _LP64 1.131 - //by_css 1.132 - __ lui(_obj, Assembler::split_high((int)o)); 1.133 - __ addiu(_obj, _obj, Assembler::split_low((int)o)); 1.134 -#else 1.135 - //This should be same as jobject2reg_with_patching. 1.136 __ li48(_obj, (long)o); 1.137 -#endif 1.138 while ((intx)__ pc() - (intx)start < NativeCall::instruction_size) { 1.139 __ nop(); 1.140 } 1.141 @@ -366,21 +360,18 @@ 1.142 1.143 address end_of_patch = __ pc(); 1.144 int bytes_to_skip = 0; 1.145 - if (_id == load_klass_id) { 1.146 + if (_id == load_mirror_id) { 1.147 int offset = __ offset(); 1.148 if (CommentedAssembly) { 1.149 __ block_comment(" being_initialized check"); 1.150 } 1.151 assert(_obj != NOREG, "must be a valid register"); 1.152 -#ifndef OPT_THREAD 1.153 - //FIXME, T8 need be saved ? 1.154 - Register thread = T8; 1.155 - __ get_thread(thread); 1.156 -#else 1.157 - Register thread = TREG; 1.158 -#endif 1.159 - __ ld(AT, _obj, in_bytes(InstanceKlass::init_thread_offset())); 1.160 - __ bne(thread, AT, call_patch); 1.161 + Register tmp = AT; 1.162 + Register tmp2 = T9; 1.163 + __ ld_ptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes())); 1.164 + __ get_thread(tmp); 1.165 + __ ld_ptr(tmp2, Address(tmp2, InstanceKlass::init_thread_offset())); 1.166 + __ bne(tmp, tmp2, call_patch); 1.167 __ delayed()->nop(); 1.168 1.169 // access_field patches may execute the patched code before it's 1.170 @@ -402,23 +393,8 @@ 1.171 bytes_to_skip += sizeof_patch_record; 1.172 1.173 // emit the offsets needed to find the code to patch 1.174 - int being_initialized_entry_offset = __ pc() - being_initialized_entry + patch_info_size; 1.175 + int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record; 1.176 1.177 -#ifdef _LP64 1.178 - /* Jin: In MIPS64, byte_skip is much larger than that in X86. It can not be contained in a byte: 1.179 - * - bytes_to_skip = 0x190; 1.180 - * - _bytes_to_copy = 0x20; 1.181 - * - being_initialized_entry_offset = 0x1b0; 1.182 - * 1.183 - * To minimize the modification of share codes, the values are decreased 4 times when generated, 1.184 - * thus can be packed into a long type. 1.185 - * 1.186 - * See [share/vm/c1/c1_Runtime1.cpp 918] Runtime1::patch_code() 1.187 - */ 1.188 - being_initialized_entry_offset /= 4; 1.189 - _bytes_to_copy /= 4; 1.190 - bytes_to_skip /= 4; 1.191 -#endif 1.192 // patch_info_pc offset | size of b instruction(8)| patched code size 1.193 assert((char)being_initialized_entry_offset==being_initialized_entry_offset, "just check"); 1.194 assert((char)bytes_to_skip==bytes_to_skip, "just check"); 1.195 @@ -426,18 +402,17 @@ 1.196 __ emit_int32(being_initialized_entry_offset<<8 | (bytes_to_skip<<16) | (_bytes_to_copy<<24) ); 1.197 1.198 address patch_info_pc = __ pc(); 1.199 -#ifdef _LP64 1.200 - assert(patch_info_pc - end_of_patch == bytes_to_skip * 4, "incorrect patch info"); 1.201 -#else 1.202 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info"); 1.203 -#endif 1.204 1.205 address entry = __ pc(); 1.206 NativeGeneralJump::insert_unconditional((address)_pc_start, entry); 1.207 address target = NULL; 1.208 + relocInfo::relocType reloc_type = relocInfo::none; 1.209 switch (_id) { 1.210 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break; 1.211 - case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break; 1.212 + case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break; 1.213 + case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break; 1.214 + case load_appendix_id: target = Runtime1::entry_for(Runtime1::load_appendix_patching_id); reloc_type = relocInfo::oop_type; break; 1.215 default: ShouldNotReachHere(); 1.216 } 1.217 __ bind(call_patch); 1.218 @@ -446,12 +421,7 @@ 1.219 if (CommentedAssembly) { 1.220 __ block_comment("patch entry point"); 1.221 } 1.222 -#ifndef _LP64 1.223 - __ lui(T9, Assembler::split_high((int)target)); 1.224 - __ addiu(T9, T9, Assembler::split_low((int)target)); 1.225 -#else 1.226 __ li48(T9, (long)target); 1.227 -#endif 1.228 __ jalr(T9); 1.229 __ delayed()->nop(); 1.230 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change"); 1.231 @@ -464,15 +434,23 @@ 1.232 for (int j = __ offset(); j < jmp_off + NativeCall::instruction_size; j += 4 ) { 1.233 __ nop(); 1.234 } 1.235 - if (_id == load_klass_id) { 1.236 + if (_id == load_klass_id || _id == load_mirror_id || _id == load_appendix_id) { 1.237 CodeSection* cs = __ code_section(); 1.238 address pc = (address)_pc_start; 1.239 RelocIterator iter(cs, pc, pc + 1); 1.240 - relocInfo::change_reloc_info_for_address(&iter, pc, relocInfo::oop_type, relocInfo::none); 1.241 + relocInfo::change_reloc_info_for_address(&iter, pc, reloc_type, relocInfo::none); 1.242 } 1.243 } 1.244 1.245 1.246 +void DeoptimizeStub::emit_code(LIR_Assembler* ce) { 1.247 + __ bind(_entry); 1.248 + __ call(Runtime1::entry_for(Runtime1::deoptimize_id), relocInfo::runtime_call_type); 1.249 + ce->add_call_info_here(_info); 1.250 + DEBUG_ONLY(__ should_not_reach_here()); 1.251 +} 1.252 + 1.253 + 1.254 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) { 1.255 ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); 1.256 __ bind(_entry);
2.1 --- a/src/cpu/mips/vm/c1_FrameMap_mips.cpp Sat Jan 06 16:30:58 2018 +0800 2.2 +++ b/src/cpu/mips/vm/c1_FrameMap_mips.cpp Thu May 24 19:49:50 2018 +0800 2.3 @@ -162,6 +162,31 @@ 2.4 LIR_Opr FrameMap::_s6_oop_opr; 2.5 LIR_Opr FrameMap::_s7_oop_opr; 2.6 2.7 +//add metadata_opr 2.8 +LIR_Opr FrameMap::_v0_metadata_opr; 2.9 +LIR_Opr FrameMap::_v1_metadata_opr; 2.10 +LIR_Opr FrameMap::_a0_metadata_opr; 2.11 +LIR_Opr FrameMap::_a1_metadata_opr; 2.12 +LIR_Opr FrameMap::_a2_metadata_opr; 2.13 +LIR_Opr FrameMap::_a3_metadata_opr; 2.14 +LIR_Opr FrameMap::_t0_metadata_opr; 2.15 +LIR_Opr FrameMap::_t1_metadata_opr; 2.16 +LIR_Opr FrameMap::_t2_metadata_opr; 2.17 +LIR_Opr FrameMap::_t3_metadata_opr; 2.18 +LIR_Opr FrameMap::_a4_metadata_opr; 2.19 +LIR_Opr FrameMap::_a5_metadata_opr; 2.20 +LIR_Opr FrameMap::_a6_metadata_opr; 2.21 +LIR_Opr FrameMap::_a7_metadata_opr; 2.22 +LIR_Opr FrameMap::_t8_metadata_opr; 2.23 +LIR_Opr FrameMap::_t9_metadata_opr; 2.24 +LIR_Opr FrameMap::_s0_metadata_opr; 2.25 +LIR_Opr FrameMap::_s1_metadata_opr; 2.26 +LIR_Opr FrameMap::_s2_metadata_opr; 2.27 +LIR_Opr FrameMap::_s3_metadata_opr; 2.28 +LIR_Opr FrameMap::_s4_metadata_opr; 2.29 +LIR_Opr FrameMap::_s5_metadata_opr; 2.30 +LIR_Opr FrameMap::_s6_metadata_opr; 2.31 +LIR_Opr FrameMap::_s7_metadata_opr; 2.32 2.33 LIR_Opr FrameMap::_a0_a1_long_opr; 2.34 LIR_Opr FrameMap::_a2_a3_long_opr; 2.35 @@ -220,15 +245,15 @@ 2.36 #else 2.37 _at_opr=LIR_OprFact::single_cpu(1); 2.38 #endif 2.39 - map_register(2,V0); _v0_opr=LIR_OprFact::single_cpu(2); _v0_oop_opr=LIR_OprFact::single_cpu_oop(2); 2.40 - map_register(3,V1); _v1_opr=LIR_OprFact::single_cpu(3); _v1_oop_opr=LIR_OprFact::single_cpu_oop(3); 2.41 - map_register(4,A0); _a0_opr=LIR_OprFact::single_cpu(4); _a0_oop_opr=LIR_OprFact::single_cpu_oop(4); 2.42 - map_register(5,A1); _a1_opr=LIR_OprFact::single_cpu(5); _a1_oop_opr=LIR_OprFact::single_cpu_oop(5); 2.43 - map_register(6,A2); _a2_opr=LIR_OprFact::single_cpu(6); _a2_oop_opr=LIR_OprFact::single_cpu_oop(6); 2.44 - map_register(7,A3); _a3_opr=LIR_OprFact::single_cpu(7); _a3_oop_opr=LIR_OprFact::single_cpu_oop(7); 2.45 + map_register(2,V0); _v0_opr=LIR_OprFact::single_cpu(2); _v0_oop_opr=LIR_OprFact::single_cpu_oop(2); _v0_metadata_opr=LIR_OprFact::single_cpu_metadata(2); 2.46 + map_register(3,V1); _v1_opr=LIR_OprFact::single_cpu(3); _v1_oop_opr=LIR_OprFact::single_cpu_oop(3); _v1_metadata_opr=LIR_OprFact::single_cpu_metadata(3); 2.47 + map_register(4,A0); _a0_opr=LIR_OprFact::single_cpu(4); _a0_oop_opr=LIR_OprFact::single_cpu_oop(4); _a0_metadata_opr=LIR_OprFact::single_cpu_metadata(4); 2.48 + map_register(5,A1); _a1_opr=LIR_OprFact::single_cpu(5); _a1_oop_opr=LIR_OprFact::single_cpu_oop(5); _a1_metadata_opr=LIR_OprFact::single_cpu_metadata(5); 2.49 + map_register(6,A2); _a2_opr=LIR_OprFact::single_cpu(6); _a2_oop_opr=LIR_OprFact::single_cpu_oop(6); _a2_metadata_opr=LIR_OprFact::single_cpu_metadata(6); 2.50 + map_register(7,A3); _a3_opr=LIR_OprFact::single_cpu(7); _a3_oop_opr=LIR_OprFact::single_cpu_oop(7); _a3_metadata_opr=LIR_OprFact::single_cpu_metadata(7); 2.51 #ifndef _LP64 2.52 - map_register(8,T0); _t0_opr=LIR_OprFact::single_cpu(8); _t0_oop_opr=LIR_OprFact::single_cpu_oop(8); 2.53 - map_register(9,T1); _t1_opr=LIR_OprFact::single_cpu(9); _t1_oop_opr=LIR_OprFact::single_cpu_oop(9); 2.54 + map_register(8,T0); _t0_opr=LIR_OprFact::single_cpu(8); _t0_oop_opr=LIR_OprFact::single_cpu_oop(8); 2.55 + map_register(9,T1); _t1_opr=LIR_OprFact::single_cpu(9); _t1_oop_opr=LIR_OprFact::single_cpu_oop(9); 2.56 map_register(10,T2); _t2_opr=LIR_OprFact::single_cpu(10); _t2_oop_opr=LIR_OprFact::single_cpu_oop(10); 2.57 map_register(11,T3); _t3_opr=LIR_OprFact::single_cpu(11); _t3_oop_opr=LIR_OprFact::single_cpu_oop(11); 2.58 map_register(12,T4); _t4_opr=LIR_OprFact::single_cpu(12); _t4_oop_opr=LIR_OprFact::single_cpu_oop(12); 2.59 @@ -236,23 +261,23 @@ 2.60 map_register(14,T6); _t6_opr=LIR_OprFact::single_cpu(14); _t6_oop_opr=LIR_OprFact::single_cpu_oop(14); 2.61 map_register(15,T7); _t7_opr=LIR_OprFact::single_cpu(15); _t7_oop_opr=LIR_OprFact::single_cpu_oop(15); 2.62 #else 2.63 - map_register(8,A4); _a4_opr=LIR_OprFact::single_cpu(8); _a4_oop_opr=LIR_OprFact::single_cpu_oop(8); 2.64 - map_register(9,A5); _a5_opr=LIR_OprFact::single_cpu(9); _a5_oop_opr=LIR_OprFact::single_cpu_oop(9); 2.65 - map_register(10,A6); _a6_opr=LIR_OprFact::single_cpu(10); _a6_oop_opr=LIR_OprFact::single_cpu_oop(10); 2.66 - map_register(11,A7); _a7_opr=LIR_OprFact::single_cpu(11); _a7_oop_opr=LIR_OprFact::single_cpu_oop(11); 2.67 - map_register(12,T0); _t0_opr=LIR_OprFact::single_cpu(12); _t0_oop_opr=LIR_OprFact::single_cpu_oop(12); 2.68 - map_register(13,T1); _t1_opr=LIR_OprFact::single_cpu(13); _t1_oop_opr=LIR_OprFact::single_cpu_oop(13); 2.69 - map_register(14,T2); _t2_opr=LIR_OprFact::single_cpu(14); _t2_oop_opr=LIR_OprFact::single_cpu_oop(14); 2.70 - map_register(15,T3); _t3_opr=LIR_OprFact::single_cpu(15); _t3_oop_opr=LIR_OprFact::single_cpu_oop(15); 2.71 + map_register(8,A4); _a4_opr=LIR_OprFact::single_cpu(8); _a4_oop_opr=LIR_OprFact::single_cpu_oop(8); _a4_metadata_opr=LIR_OprFact::single_cpu_metadata(8); 2.72 + map_register(9,A5); _a5_opr=LIR_OprFact::single_cpu(9); _a5_oop_opr=LIR_OprFact::single_cpu_oop(9); _a5_metadata_opr=LIR_OprFact::single_cpu_metadata(9); 2.73 + map_register(10,A6); _a6_opr=LIR_OprFact::single_cpu(10); _a6_oop_opr=LIR_OprFact::single_cpu_oop(10); _a6_metadata_opr=LIR_OprFact::single_cpu_metadata(10); 2.74 + map_register(11,A7); _a7_opr=LIR_OprFact::single_cpu(11); _a7_oop_opr=LIR_OprFact::single_cpu_oop(11); _a7_metadata_opr=LIR_OprFact::single_cpu_metadata(11); 2.75 + map_register(12,T0); _t0_opr=LIR_OprFact::single_cpu(12); _t0_oop_opr=LIR_OprFact::single_cpu_oop(12); _t0_metadata_opr=LIR_OprFact::single_cpu_metadata(12); 2.76 + map_register(13,T1); _t1_opr=LIR_OprFact::single_cpu(13); _t1_oop_opr=LIR_OprFact::single_cpu_oop(13); _t1_metadata_opr=LIR_OprFact::single_cpu_metadata(13); 2.77 + map_register(14,T2); _t2_opr=LIR_OprFact::single_cpu(14); _t2_oop_opr=LIR_OprFact::single_cpu_oop(14); _t2_metadata_opr=LIR_OprFact::single_cpu_metadata(14); 2.78 + map_register(15,T3); _t3_opr=LIR_OprFact::single_cpu(15); _t3_oop_opr=LIR_OprFact::single_cpu_oop(15); _t3_metadata_opr=LIR_OprFact::single_cpu_metadata(15); 2.79 #endif 2.80 - map_register(16,S0); _s0_opr=LIR_OprFact::single_cpu(16); _s0_oop_opr=LIR_OprFact::single_cpu_oop(16); 2.81 - map_register(17,S1); _s1_opr=LIR_OprFact::single_cpu(17); _s1_oop_opr=LIR_OprFact::single_cpu_oop(17); 2.82 - map_register(18,S2); _s2_opr=LIR_OprFact::single_cpu(18); _s2_oop_opr=LIR_OprFact::single_cpu_oop(18); 2.83 - map_register(19,S3); _s3_opr=LIR_OprFact::single_cpu(19); _s3_oop_opr=LIR_OprFact::single_cpu_oop(19); 2.84 - map_register(20,S4); _s4_opr=LIR_OprFact::single_cpu(20); _s4_oop_opr=LIR_OprFact::single_cpu_oop(20); 2.85 - map_register(21,S5); _s5_opr=LIR_OprFact::single_cpu(21); _s5_oop_opr=LIR_OprFact::single_cpu_oop(21); 2.86 - map_register(22,S6); _s6_opr=LIR_OprFact::single_cpu(22); _s6_oop_opr=LIR_OprFact::single_cpu_oop(22); 2.87 - map_register(23,S7); _s7_opr=LIR_OprFact::single_cpu(23); _s7_oop_opr=LIR_OprFact::single_cpu_oop(23); 2.88 + map_register(16,S0); _s0_opr=LIR_OprFact::single_cpu(16); _s0_oop_opr=LIR_OprFact::single_cpu_oop(16); _s0_metadata_opr=LIR_OprFact::single_cpu_metadata(16); 2.89 + map_register(17,S1); _s1_opr=LIR_OprFact::single_cpu(17); _s1_oop_opr=LIR_OprFact::single_cpu_oop(17); _s1_metadata_opr=LIR_OprFact::single_cpu_metadata(17); 2.90 + map_register(18,S2); _s2_opr=LIR_OprFact::single_cpu(18); _s2_oop_opr=LIR_OprFact::single_cpu_oop(18); _s2_metadata_opr=LIR_OprFact::single_cpu_metadata(18); 2.91 + map_register(19,S3); _s3_opr=LIR_OprFact::single_cpu(19); _s3_oop_opr=LIR_OprFact::single_cpu_oop(19); _s3_metadata_opr=LIR_OprFact::single_cpu_metadata(19); 2.92 + map_register(20,S4); _s4_opr=LIR_OprFact::single_cpu(20); _s4_oop_opr=LIR_OprFact::single_cpu_oop(20); _s4_metadata_opr=LIR_OprFact::single_cpu_metadata(20); 2.93 + map_register(21,S5); _s5_opr=LIR_OprFact::single_cpu(21); _s5_oop_opr=LIR_OprFact::single_cpu_oop(21); _s5_metadata_opr=LIR_OprFact::single_cpu_metadata(21); 2.94 + map_register(22,S6); _s6_opr=LIR_OprFact::single_cpu(22); _s6_oop_opr=LIR_OprFact::single_cpu_oop(22); _s6_metadata_opr=LIR_OprFact::single_cpu_metadata(22); 2.95 + map_register(23,S7); _s7_opr=LIR_OprFact::single_cpu(23); _s7_oop_opr=LIR_OprFact::single_cpu_oop(23); _s7_metadata_opr=LIR_OprFact::single_cpu_metadata(23); 2.96 map_register(24,T8); _t8_opr=LIR_OprFact::single_cpu(24); 2.97 map_register(25,T9); _t9_opr=LIR_OprFact::single_cpu(25); 2.98 map_register(26,K0); _k0_opr=LIR_OprFact::single_cpu(26);
3.1 --- a/src/cpu/mips/vm/c1_FrameMap_mips.hpp Sat Jan 06 16:30:58 2018 +0800 3.2 +++ b/src/cpu/mips/vm/c1_FrameMap_mips.hpp Thu May 24 19:49:50 2018 +0800 3.3 @@ -174,6 +174,51 @@ 3.4 static LIR_Opr _d14_double_opr; 3.5 3.6 3.7 + static LIR_Opr _zero_metadata_opr; 3.8 + static LIR_Opr _at_metadata_opr; 3.9 + static LIR_Opr _v0_metadata_opr; 3.10 + static LIR_Opr _v1_metadata_opr; 3.11 + static LIR_Opr _a0_metadata_opr; 3.12 + static LIR_Opr _a1_metadata_opr; 3.13 + static LIR_Opr _a2_metadata_opr; 3.14 + static LIR_Opr _a3_metadata_opr; 3.15 + static LIR_Opr _t0_metadata_opr; 3.16 + static LIR_Opr _t1_metadata_opr; 3.17 + static LIR_Opr _t2_metadata_opr; 3.18 + static LIR_Opr _t3_metadata_opr; 3.19 + static LIR_Opr _a4_metadata_opr; 3.20 + static LIR_Opr _a5_metadata_opr; 3.21 + static LIR_Opr _a6_metadata_opr; 3.22 + static LIR_Opr _a7_metadata_opr; 3.23 + static LIR_Opr _t8_metadata_opr; 3.24 + static LIR_Opr _t9_metadata_opr; 3.25 + static LIR_Opr _s0_metadata_opr; 3.26 + static LIR_Opr _s1_metadata_opr; 3.27 + static LIR_Opr _s2_metadata_opr; 3.28 + static LIR_Opr _s3_metadata_opr; 3.29 + static LIR_Opr _s4_metadata_opr; 3.30 + static LIR_Opr _s5_metadata_opr; 3.31 + static LIR_Opr _s6_metadata_opr; 3.32 + static LIR_Opr _s7_metadata_opr; 3.33 + static LIR_Opr _gp_metadata_opr; 3.34 + static LIR_Opr _fp_metadata_opr; 3.35 + static LIR_Opr _sp_metadata_opr; 3.36 + static LIR_Opr _ra_metadata_opr; 3.37 + static LIR_Opr _k0_metadata_opr; 3.38 + static LIR_Opr _k1_metadata_opr; 3.39 + 3.40 +//no implementation 3.41 + static LIR_Opr _f0_metadata_opr; 3.42 + static LIR_Opr _f12_metadata_opr; 3.43 + static LIR_Opr _f14_metadata_opr; 3.44 + static LIR_Opr _d0_metadata_opr; 3.45 + static LIR_Opr _d12_metadata_opr; 3.46 + static LIR_Opr _d14_metadata_opr; 3.47 + 3.48 + static LIR_Opr _a0_a1_metadata_opr; 3.49 + static LIR_Opr _a2_a3_metadata_opr; 3.50 + static LIR_Opr _v0_v1_metadata_opr; 3.51 + 3.52 static LIR_Opr as_long_opr(Register r, Register r2){ 3.53 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); 3.54 }
4.1 --- a/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp Sat Jan 06 16:30:58 2018 +0800 4.2 +++ b/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp Thu May 24 19:49:50 2018 +0800 4.3 @@ -316,8 +316,8 @@ 4.4 4.5 void LIR_Assembler::jobject2reg_with_patching(Register reg, CodeEmitInfo* info) { 4.6 jobject o = NULL; 4.7 - PatchingStub* patch = new PatchingStub(_masm, PatchingStub::load_klass_id); 4.8 int oop_index = __ oop_recorder()->allocate_oop_index(o); 4.9 + PatchingStub* patch = new PatchingStub(_masm, patching_id(info), oop_index); 4.10 RelocationHolder rspec = oop_Relocation::spec(oop_index); 4.11 __ relocate(rspec); 4.12 #ifndef _LP64 4.13 @@ -326,57 +326,21 @@ 4.14 __ addiu(reg, reg, Assembler::split_low((int)o)); 4.15 #else 4.16 //li may not pass NativeMovConstReg::verify. see nativeMovConstReg_at(pc_start()); in PatchingStub::install. by aoqi 4.17 +// __ li48(reg, (long)o); 4.18 __ li48(reg, (long)o); 4.19 #endif 4.20 // patching_epilog(patch, LIR_Op1::patch_normal, noreg, info); 4.21 patching_epilog(patch, lir_patch_normal, reg, info); 4.22 } 4.23 4.24 - 4.25 -void LIR_Assembler::monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register unused, int monitor_no, Register exception) { 4.26 - 4.27 - if (exception->is_valid()) { 4.28 - // preserve exception 4.29 - // note: the monitor_exit runtime call is a leaf routine 4.30 - // and cannot block => no GC can happen 4.31 - // The slow case (MonitorAccessStub) uses the first two stack slots 4.32 - // ([SP+0] and [SP+4]), therefore we store the exception at [esp+8] 4.33 - __ st_ptr(exception, SP, 2 * wordSize); 4.34 - } 4.35 - 4.36 - Register obj_reg = obj_opr->as_register(); 4.37 - Register lock_reg = lock_opr->as_register(); 4.38 - 4.39 - // compute pointer to BasicLock 4.40 - //Address lock_addr = frame_map()->address_for_monitor_lock_index(monitor_no); 4.41 - Address lock_addr = frame_map()->address_for_monitor_lock(monitor_no); 4.42 - __ lea(lock_reg, lock_addr); 4.43 - // unlock object 4.44 - MonitorAccessStub* slow_case = new MonitorExitStub(lock_opr, true, monitor_no); 4.45 - // temporary fix: must be created after exceptionhandler, therefore as call stub 4.46 - _slow_case_stubs->append(slow_case); 4.47 - if (UseFastLocking) { 4.48 - // try inlined fast unlocking first, revert to slow locking if it fails 4.49 - // note: lock_reg points to the displaced header since the displaced header offset is 0! 4.50 - assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); 4.51 - __ unlock_object(NOREG, obj_reg, lock_reg, *slow_case->entry()); 4.52 - } else { 4.53 - // always do slow unlocking 4.54 - // note: the slow unlocking code could be inlined here, however if we use 4.55 - // slow unlocking, speed doesn't matter anyway and this solution is 4.56 - // simpler and requires less duplicated code - additionally, the 4.57 - // slow unlocking code is the same in either case which simplifies 4.58 - // debugging 4.59 - __ b_far(*slow_case->entry()); 4.60 - __ delayed()->nop(); 4.61 - } 4.62 - // done 4.63 - __ bind(*slow_case->continuation()); 4.64 - 4.65 - if (exception->is_valid()) { 4.66 - // restore exception 4.67 - __ ld_ptr(exception, SP, 2 * wordSize); 4.68 - } 4.69 +void LIR_Assembler::klass2reg_with_patching(Register reg, CodeEmitInfo* info) { 4.70 + Metadata *o = NULL; 4.71 + int index = __ oop_recorder()->allocate_metadata_index(o); 4.72 + PatchingStub* patch = new PatchingStub(_masm, PatchingStub::load_klass_id, index); 4.73 + RelocationHolder rspec = metadata_Relocation::spec(index); 4.74 + __ relocate(rspec); 4.75 + __ li48(reg, (long)o); 4.76 + patching_epilog(patch, lir_patch_normal, reg, info); 4.77 } 4.78 4.79 // This specifies the esp decrement needed to build the frame 4.80 @@ -405,61 +369,28 @@ 4.81 // generate code for exception handler 4.82 address handler_base = __ start_a_stub(exception_handler_size); 4.83 if (handler_base == NULL) { 4.84 - //no enough space 4.85 + // no enough space 4.86 bailout("exception handler overflow"); 4.87 return -1; 4.88 } 4.89 4.90 - 4.91 - 4.92 - //compilation()->offsets()->set_value(CodeOffsets::Exceptions, code_offset()); 4.93 - // if the method does not have an exception handler, then there is 4.94 - // no reason to search for one 4.95 - //if (compilation()->has_exception_handlers() || JvmtiExport::can_post_exceptions()) { 4.96 - // the exception oop and pc are in V0 and V1 4.97 - // no other registers need to be preserved, so invalidate them 4.98 - // check that there is really an exception 4.99 -// __ verify_not_null_oop(V0); 4.100 - 4.101 - // search an exception handler (V0: exception oop, V1: throwing pc) 4.102 -// __ call(Runtime1::entry_for(Runtime1::handle_exception_nofpu_id), 4.103 -// relocInfo::runtime_call_type); 4.104 -// __ delayed()->nop(); 4.105 - // if the call returns here, then the exception handler for particular 4.106 - // exception doesn't exist -> unwind activation and forward exception to caller 4.107 - // } 4.108 - int offset = code_offset(); 4.109 - 4.110 - // the exception oop is in V0 4.111 + int offset = code_offset(); 4.112 + 4.113 + // the exception oop and pc are in V0, and V1 4.114 // no other registers need to be preserved, so invalidate them 4.115 + //__ invalidate_registers(false, true, true, false, true, true); 4.116 + 4.117 // check that there is really an exception 4.118 __ verify_not_null_oop(V0); 4.119 - //FIXME:wuhui?? 4.120 - //__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::handle_exception_from_callee_id))); 4.121 - //__ delayed()->nop(); 4.122 - __ should_not_reach_here(); 4.123 - guarantee(code_offset() - offset <= exception_handler_size, "overflow"); 4.124 - __ end_a_stub(); 4.125 - return offset; 4.126 - 4.127 - // unlock the receiver/klass if necessary 4.128 - // V0: exception 4.129 -// ciMethod* method = compilation()->method(); 4.130 -// if (method->is_synchronized() && GenerateSynchronizationCode) { 4.131 -//#ifndef _LP64 4.132 -//by_css 4.133 -// monitorexit(FrameMap::_t0_oop_opr, FrameMap::_t6_opr, NOREG, 0, V0); 4.134 -//#else 4.135 -// monitorexit(FrameMap::_t0_oop_opr, FrameMap::_a6_opr, NOREG, 0, V0); 4.136 -//#endif 4.137 -// } 4.138 - 4.139 - // unwind activation and forward exception to caller 4.140 - // V0: exception 4.141 -// __ jmp(Runtime1::entry_for(Runtime1::unwind_exception_id), 4.142 -// relocInfo::runtime_call_type); 4.143 -// __ delayed()->nop(); 4.144 -// __ end_a_stub(); 4.145 + 4.146 + // search an exception handler (V0: exception oop, V1: throwing pc) 4.147 + __ call(Runtime1::entry_for(Runtime1::handle_exception_from_callee_id)); 4.148 + __ delayed()->nop(); 4.149 + __ should_not_reach_here(); 4.150 + guarantee(code_offset() - offset <= exception_handler_size, "overflow"); 4.151 + __ end_a_stub(); 4.152 + 4.153 + return offset; 4.154 } 4.155 4.156 // Emit the code to remove the frame from the stack in the exception 4.157 @@ -472,46 +403,52 @@ 4.158 #endif 4.159 4.160 int offset = code_offset(); 4.161 - /* // Fetch the exception from TLS and clear out exception related thread state 4.162 - __ get_thread(rsi); 4.163 - __ movptr(rax, Address(rsi, JavaThread::exception_oop_offset())); 4.164 - __ movptr(Address(rsi, JavaThread::exception_oop_offset()), (intptr_t)NULL_WORD); 4.165 - __ movptr(Address(rsi, JavaThread::exception_pc_offset()), (intptr_t)NULL_WORD); 4.166 + // Fetch the exception from TLS and clear out exception related thread state 4.167 + Register thread = TREG; 4.168 +#ifndef OPT_THREAD 4.169 + __ get_thread(thread); 4.170 +#endif 4.171 + __ ld_ptr(V0, Address(thread, JavaThread::exception_oop_offset())); 4.172 + __ st_ptr(R0, Address(thread, JavaThread::exception_oop_offset())); 4.173 + __ st_ptr(R0, Address(thread, JavaThread::exception_pc_offset())); 4.174 4.175 __ bind(_unwind_handler_entry); 4.176 - __ verify_not_null_oop(rax); 4.177 + __ verify_not_null_oop(V0); 4.178 if (method()->is_synchronized() || compilation()->env()->dtrace_method_probes()) { 4.179 - __ mov(rsi, rax); // Preserve the exception 4.180 + __ move(S0, V0); // Preserve the exception (rbx is always callee-saved) 4.181 } 4.182 - // Preform needed unlocking 4.183 - MonitorExitStub* stub = NULL; 4.184 + 4.185 + // Preform needed unlocking 4.186 + MonitorExitStub* stub = NULL; 4.187 if (method()->is_synchronized()) { 4.188 - monitor_address(0, FrameMap::rax_opr); 4.189 - stub = new MonitorExitStub(FrameMap::rax_opr, true, 0); 4.190 - __ unlock_object(rdi, rbx, rax, *stub->entry()); 4.191 + monitor_address(0, FrameMap::_v0_opr); 4.192 + stub = new MonitorExitStub(FrameMap::_v0_opr, true, 0); 4.193 + __ unlock_object(A0, A1, V0, *stub->entry()); 4.194 __ bind(*stub->continuation()); 4.195 } 4.196 4.197 if (compilation()->env()->dtrace_method_probes()) { 4.198 - __ get_thread(rax); 4.199 - __ movptr(Address(rsp, 0), rax); 4.200 - __ mov_metadata(Address(rsp, sizeof(void*)), method()->constant_encoding()); 4.201 - __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit))); 4.202 + __ move(A0, thread); 4.203 + __ mov_metadata(A1, method()->constant_encoding()); 4.204 + __ patchable_call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit)); 4.205 } 4.206 4.207 if (method()->is_synchronized() || compilation()->env()->dtrace_method_probes()) { 4.208 - __ mov(rax, rsi); // Restore the exception 4.209 + __ move(V0, S0); // Restore the exception 4.210 } 4.211 4.212 // remove the activation and dispatch to the unwind handler 4.213 - __ remove_frame(initial_frame_size_in_bytes()); 4.214 - __ jump(RuntimeAddress(Runtime1::entry_for(Runtime1::unwind_exception_id))); 4.215 + // leave activation of nmethod 4.216 + __ remove_frame(initial_frame_size_in_bytes()); 4.217 + 4.218 + __ jmp(Runtime1::entry_for(Runtime1::unwind_exception_id)); 4.219 + __ delayed()->nop(); 4.220 4.221 // Emit the slow path assembly 4.222 - if (stub != NULL) { 4.223 + if (stub != NULL) { 4.224 stub->emit_code(this); 4.225 } 4.226 -*/ 4.227 + 4.228 return offset; 4.229 } 4.230 4.231 @@ -653,7 +590,7 @@ 4.232 void LIR_Assembler::return_op(LIR_Opr result) { 4.233 assert(result->is_illegal() || !result->is_single_cpu() || result->as_register() == V0, "word returns are in V0"); 4.234 // Pop the stack before the safepoint code 4.235 - __ leave(); 4.236 + __ remove_frame(initial_frame_size_in_bytes()); 4.237 #ifndef _LP64 4.238 //by aoqi 4.239 __ lui(AT, Assembler::split_high((intptr_t)os::get_polling_page() 4.240 @@ -674,6 +611,7 @@ 4.241 #endif 4.242 #endif 4.243 4.244 + __ pop(RA); 4.245 __ jr(RA); 4.246 __ delayed()->nop(); 4.247 } 4.248 @@ -724,16 +662,15 @@ 4.249 assert(dest->is_register(), "should not call otherwise"); 4.250 LIR_Const* c = src->as_constant_ptr(); 4.251 switch (c->type()) { 4.252 + case T_ADDRESS: { 4.253 + assert(patch_code == lir_patch_none, "no patching handled here"); 4.254 + __ move(dest->as_register(), c->as_jint()); // FIXME 4.255 + break; 4.256 + } 4.257 + 4.258 case T_INT: { 4.259 - jint con = c->as_jint(); 4.260 - if (dest->is_single_cpu()) { 4.261 - assert(patch_code == lir_patch_none, "no patching handled here"); 4.262 - __ move(dest->as_register(), con); 4.263 - } else { 4.264 - assert(dest->is_single_fpu(), "wrong register kind"); 4.265 - __ move(AT, con); 4.266 - __ mtc1(AT, dest->as_float_reg()); 4.267 - } 4.268 + assert(patch_code == lir_patch_none, "no patching handled here"); 4.269 + __ move(dest->as_register(), c->as_jint()); 4.270 break; 4.271 } 4.272 4.273 @@ -772,6 +709,15 @@ 4.274 break; 4.275 } 4.276 4.277 + case T_METADATA: { 4.278 + if (patch_code != lir_patch_none) { 4.279 + klass2reg_with_patching(dest->as_register(), info); 4.280 + } else { 4.281 + __ mov_metadata(dest->as_register(), c->as_metadata()); 4.282 + } 4.283 + break; 4.284 + } 4.285 + 4.286 case T_FLOAT: { 4.287 address const_addr = float_constant(c->as_jfloat()); 4.288 assert (const_addr != NULL, "must create float constant in the constant table"); 4.289 @@ -855,6 +801,11 @@ 4.290 __ sw(AT, frame_map()->address_for_slot(dest->single_stack_ix())); 4.291 break; 4.292 4.293 + case T_ADDRESS: 4.294 + __ move(AT, c->as_jint_bits()); 4.295 + __ st_ptr(AT, frame_map()->address_for_slot(dest->single_stack_ix())); 4.296 + break; 4.297 + 4.298 case T_OBJECT: 4.299 if (c->as_jobject() == NULL) { 4.300 __ st_ptr(R0, frame_map()->address_for_slot(dest->single_stack_ix())); 4.301 @@ -957,6 +908,10 @@ 4.302 } else 4.303 __ sw(R0, as_Address(addr)); 4.304 break; 4.305 + case T_ADDRESS: 4.306 + __ move(AT, c->as_jint_bits()); 4.307 + __ st_ptr(AT, as_Address(addr)); 4.308 + break; 4.309 case T_BOOLEAN: // fall through 4.310 case T_BYTE: 4.311 if(c->as_jint() != 0) { 4.312 @@ -1217,7 +1172,7 @@ 4.313 break; 4.314 4.315 case T_LONG: { 4.316 - Register from_lo = src->as_register_lo(); 4.317 + Register from_lo = src->as_register_lo(); 4.318 Register from_hi = src->as_register_hi(); 4.319 #ifdef _LP64 4.320 if (needs_patching) { 4.321 @@ -1535,42 +1490,55 @@ 4.322 case T_ARRAY: 4.323 if (UseCompressedOops && !wide) { 4.324 if (disp_reg == noreg) { 4.325 - __ lw(dest->as_register(), src_reg, disp_value); 4.326 + __ lwu(dest->as_register(), src_reg, disp_value); 4.327 } else if (needs_patching) { 4.328 - __ dadd(AT, src_reg, disp_reg); 4.329 - offset = code_offset(); 4.330 - __ lw(dest->as_register(), AT, 0); 4.331 + __ dadd(AT, src_reg, disp_reg); 4.332 + offset = code_offset(); 4.333 + __ lwu(dest->as_register(), AT, 0); 4.334 } else { 4.335 - __ dadd(AT, src_reg, disp_reg); 4.336 - offset = code_offset(); 4.337 - __ lw(dest->as_register(), AT, Assembler::split_low(disp_value)); 4.338 + __ dadd(AT, src_reg, disp_reg); 4.339 + offset = code_offset(); 4.340 + __ lwu(dest->as_register(), AT, Assembler::split_low(disp_value)); 4.341 } 4.342 - 4.343 } else { 4.344 if (disp_reg == noreg) { 4.345 - __ ld_ptr(dest->as_register(), src_reg, disp_value); 4.346 + __ ld_ptr(dest->as_register(), src_reg, disp_value); 4.347 } else if (needs_patching) { 4.348 - __ dadd(AT, src_reg, disp_reg); 4.349 - offset = code_offset(); 4.350 - __ ld_ptr(dest->as_register(), AT, 0); 4.351 + __ dadd(AT, src_reg, disp_reg); 4.352 + offset = code_offset(); 4.353 + __ ld_ptr(dest->as_register(), AT, 0); 4.354 } else { 4.355 - __ dadd(AT, src_reg, disp_reg); 4.356 - offset = code_offset(); 4.357 - __ ld_ptr(dest->as_register(), AT, Assembler::split_low(disp_value)); 4.358 + __ dadd(AT, src_reg, disp_reg); 4.359 + offset = code_offset(); 4.360 + __ ld_ptr(dest->as_register(), AT, Assembler::split_low(disp_value)); 4.361 } 4.362 } 4.363 break; 4.364 case T_ADDRESS: 4.365 - if (disp_reg == noreg) { 4.366 + if (UseCompressedClassPointers && addr->disp() == oopDesc::klass_offset_in_bytes()) { 4.367 + if (disp_reg == noreg) { 4.368 + __ lwu(dest->as_register(), src_reg, disp_value); 4.369 + } else if (needs_patching) { 4.370 + __ dadd(AT, src_reg, disp_reg); 4.371 + offset = code_offset(); 4.372 + __ lwu(dest->as_register(), AT, 0); 4.373 + } else { 4.374 + __ dadd(AT, src_reg, disp_reg); 4.375 + offset = code_offset(); 4.376 + __ lwu(dest->as_register(), AT, Assembler::split_low(disp_value)); 4.377 + } 4.378 + } else { 4.379 + if (disp_reg == noreg) { 4.380 __ ld_ptr(dest->as_register(), src_reg, disp_value); 4.381 - } else if (needs_patching) { 4.382 + } else if (needs_patching) { 4.383 __ dadd(AT, src_reg, disp_reg); 4.384 offset = code_offset(); 4.385 __ ld_ptr(dest->as_register(), AT, 0); 4.386 - } else { 4.387 + } else { 4.388 __ dadd(AT, src_reg, disp_reg); 4.389 offset = code_offset(); 4.390 __ ld_ptr(dest->as_register(), AT, Assembler::split_low(disp_value)); 4.391 + } 4.392 } 4.393 break; 4.394 case T_INT: { 4.395 @@ -1704,6 +1672,10 @@ 4.396 } 4.397 #endif 4.398 __ verify_oop(dest->as_register()); 4.399 + } else if (type == T_ADDRESS && addr->disp() == oopDesc::klass_offset_in_bytes()) { 4.400 + if (UseCompressedClassPointers) { 4.401 + __ decode_klass_not_null(dest->as_register()); 4.402 + } 4.403 } 4.404 if (info != NULL) add_debug_info_for_null_check(offset, info); 4.405 } 4.406 @@ -3088,11 +3060,197 @@ 4.407 __ bind(*op->stub()->continuation()); 4.408 } 4.409 4.410 +void LIR_Assembler::type_profile_helper(Register mdo, 4.411 + ciMethodData *md, ciProfileData *data, 4.412 + Register recv, Label* update_done) { 4.413 + for (uint i = 0; i < ReceiverTypeData::row_limit(); i++) { 4.414 + Label next_test; 4.415 + // See if the receiver is receiver[n]. 4.416 + __ ld_ptr(AT, Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i)))); 4.417 + __ bne(AT, recv, next_test); 4.418 + __ delayed()->nop(); 4.419 + Address data_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i))); 4.420 + __ ld_ptr(AT, data_addr); 4.421 + __ addi(AT, AT, DataLayout::counter_increment); 4.422 + __ st_ptr(AT, data_addr); 4.423 + __ b(*update_done); 4.424 + __ delayed()->nop(); 4.425 + __ bind(next_test); 4.426 + } 4.427 + 4.428 + // Didn't find receiver; find next empty slot and fill it in 4.429 + for (uint i = 0; i < ReceiverTypeData::row_limit(); i++) { 4.430 + Label next_test; 4.431 + Address recv_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i))); 4.432 + __ ld_ptr(AT, recv_addr); 4.433 + __ bne(AT, R0, next_test); 4.434 + __ delayed()->nop(); 4.435 + __ st_ptr(recv, recv_addr); 4.436 + __ move(AT, DataLayout::counter_increment); 4.437 + __ st_ptr(AT, Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)))); 4.438 + __ b(*update_done); 4.439 + __ delayed()->nop(); 4.440 + __ bind(next_test); 4.441 + } 4.442 +} 4.443 + 4.444 +void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null) { 4.445 + // we always need a stub for the failure case. 4.446 + CodeStub* stub = op->stub(); 4.447 + Register obj = op->object()->as_register(); 4.448 + Register k_RInfo = op->tmp1()->as_register(); 4.449 + Register klass_RInfo = op->tmp2()->as_register(); 4.450 + Register dst = op->result_opr()->as_register(); 4.451 + ciKlass* k = op->klass(); 4.452 + Register Rtmp1 = noreg; 4.453 + 4.454 + // check if it needs to be profiled 4.455 + ciMethodData* md; 4.456 + ciProfileData* data; 4.457 + 4.458 + if (op->should_profile()) { 4.459 + ciMethod* method = op->profiled_method(); 4.460 + assert(method != NULL, "Should have method"); 4.461 + int bci = op->profiled_bci(); 4.462 + md = method->method_data_or_null(); 4.463 + assert(md != NULL, "Sanity"); 4.464 + data = md->bci_to_data(bci); 4.465 + assert(data != NULL, "need data for type check"); 4.466 + assert(data->is_ReceiverTypeData(), "need ReceiverTypeData for type check"); 4.467 + } 4.468 + Label profile_cast_success, profile_cast_failure; 4.469 + Label *success_target = op->should_profile() ? &profile_cast_success : success; 4.470 + Label *failure_target = op->should_profile() ? &profile_cast_failure : failure; 4.471 + 4.472 + if (obj == k_RInfo) { 4.473 + k_RInfo = dst; 4.474 + } else if (obj == klass_RInfo) { 4.475 + klass_RInfo = dst; 4.476 + } 4.477 + if (k->is_loaded() && !UseCompressedClassPointers) { 4.478 + select_different_registers(obj, dst, k_RInfo, klass_RInfo); 4.479 + } else { 4.480 + Rtmp1 = op->tmp3()->as_register(); 4.481 + select_different_registers(obj, dst, k_RInfo, klass_RInfo, Rtmp1); 4.482 + } 4.483 + 4.484 + assert_different_registers(obj, k_RInfo, klass_RInfo); 4.485 + 4.486 + if (op->should_profile()) { 4.487 + Label not_null; 4.488 + __ bne(obj, R0, not_null); 4.489 + __ delayed()->nop(); 4.490 + // Object is null; update MDO and exit 4.491 + Register mdo = klass_RInfo; 4.492 + __ mov_metadata(mdo, md->constant_encoding()); 4.493 + Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset())); 4.494 + int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant()); 4.495 + __ lw(AT, data_addr); 4.496 + __ ori(AT, AT, header_bits); 4.497 + __ sw(AT,data_addr); 4.498 + __ b(*obj_is_null); 4.499 + __ delayed()->nop(); 4.500 + __ bind(not_null); 4.501 + } else { 4.502 + __ beq(obj, R0, *obj_is_null); 4.503 + __ delayed()->nop(); 4.504 + } 4.505 + 4.506 + if (!k->is_loaded()) { 4.507 + klass2reg_with_patching(k_RInfo, op->info_for_patch()); 4.508 + } else { 4.509 +#ifdef _LP64 4.510 + __ mov_metadata(k_RInfo, k->constant_encoding()); 4.511 +#endif // _LP64 4.512 + } 4.513 + __ verify_oop(obj); 4.514 + 4.515 + if (op->fast_check()) { 4.516 + // get object class 4.517 + // not a safepoint as obj null check happens earlier 4.518 + if (UseCompressedClassPointers) { 4.519 + __ load_klass(Rtmp1, obj); 4.520 + __ bne(k_RInfo, Rtmp1, *failure_target); 4.521 + __ delayed()->nop(); 4.522 + } else { 4.523 + __ ld(AT, Address(obj, oopDesc::klass_offset_in_bytes())); 4.524 + __ bne(k_RInfo, AT, *failure_target); 4.525 + __ delayed()->nop(); 4.526 + } 4.527 + // successful cast, fall through to profile or jump 4.528 + } else { 4.529 + // get object class 4.530 + // not a safepoint as obj null check happens earlier 4.531 + __ load_klass(klass_RInfo, obj); 4.532 + if (k->is_loaded()) { 4.533 + // See if we get an immediate positive hit 4.534 + __ ld(AT, Address(klass_RInfo, k->super_check_offset())); 4.535 + if ((juint)in_bytes(Klass::secondary_super_cache_offset()) != k->super_check_offset()) { 4.536 + __ bne(k_RInfo, AT, *failure_target); 4.537 + __ delayed()->nop(); 4.538 + // successful cast, fall through to profile or jump 4.539 + } else { 4.540 + // See if we get an immediate positive hit 4.541 + __ beq(k_RInfo, AT, *success_target); 4.542 + __ delayed()->nop(); 4.543 + // check for self 4.544 + __ beq(k_RInfo, klass_RInfo, *success_target); 4.545 + __ delayed()->nop(); 4.546 + 4.547 + __ push(klass_RInfo); 4.548 + __ push(k_RInfo); 4.549 + __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type); 4.550 + __ pop(klass_RInfo); 4.551 + __ pop(klass_RInfo); 4.552 + // result is a boolean 4.553 + __ beq(klass_RInfo, R0, *failure_target); 4.554 + __ delayed()->nop(); 4.555 + // successful cast, fall through to profile or jump 4.556 + } 4.557 + } else { 4.558 + // perform the fast part of the checking logic 4.559 + __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, success_target, failure_target, NULL); 4.560 + // call out-of-line instance of __ check_klass_subtype_slow_path(...): 4.561 + __ push(klass_RInfo); 4.562 + __ push(k_RInfo); 4.563 + __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type); 4.564 + __ pop(klass_RInfo); 4.565 + __ pop(k_RInfo); 4.566 + // result is a boolean 4.567 + __ beq(k_RInfo, R0, *failure_target); 4.568 + __ delayed()->nop(); 4.569 + // successful cast, fall through to profile or jump 4.570 + } 4.571 + } 4.572 + if (op->should_profile()) { 4.573 + Register mdo = klass_RInfo, recv = k_RInfo; 4.574 + __ bind(profile_cast_success); 4.575 + __ mov_metadata(mdo, md->constant_encoding()); 4.576 + __ load_klass(recv, obj); 4.577 + Label update_done; 4.578 + type_profile_helper(mdo, md, data, recv, success); 4.579 + __ b(*success); 4.580 + __ delayed()->nop(); 4.581 + 4.582 + __ bind(profile_cast_failure); 4.583 + __ mov_metadata(mdo, md->constant_encoding()); 4.584 + Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset())); 4.585 + __ ld_ptr(AT, counter_addr); 4.586 + __ addi(AT, AT, -DataLayout::counter_increment); 4.587 + __ st_ptr(AT, counter_addr); 4.588 + 4.589 + __ b(*failure); 4.590 + __ delayed()->nop(); 4.591 + } 4.592 + __ b(*success); 4.593 + __ delayed()->nop(); 4.594 +} 4.595 + 4.596 4.597 4.598 void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) { 4.599 LIR_Code code = op->code(); 4.600 -// if (code == lir_store_check) { 4.601 + if (code == lir_store_check) { 4.602 Register value = op->object()->as_register(); 4.603 Register array = op->array()->as_register(); 4.604 Register k_RInfo = op->tmp1()->as_register(); 4.605 @@ -3100,133 +3258,109 @@ 4.606 Register tmp = op->tmp3()->as_register(); 4.607 4.608 CodeStub* stub = op->stub(); 4.609 + 4.610 //check if it needs to be profiled 4.611 ciMethodData* md; 4.612 ciProfileData* data; 4.613 + 4.614 if (op->should_profile()) { 4.615 ciMethod* method = op->profiled_method(); 4.616 assert(method != NULL, "Should have method"); 4.617 - int bci = op->profiled_bci(); 4.618 + int bci = op->profiled_bci(); 4.619 md = method->method_data_or_null(); 4.620 assert(md != NULL, "Sanity"); 4.621 data = md->bci_to_data(bci); 4.622 - assert(data != NULL, "need data for type check"); 4.623 + assert(data != NULL, "need data for type check"); 4.624 assert(data->is_ReceiverTypeData(), "need ReceiverTypeData for type check"); 4.625 } 4.626 Label profile_cast_success, profile_cast_failure, done; 4.627 Label *success_target = op->should_profile() ? &profile_cast_success : &done; 4.628 - Label *failure_target = op->should_profile() ? &profile_cast_failure : &done; 4.629 - //__ cmpptr(value, (int32_t)NULL_WORD); 4.630 + Label *failure_target = op->should_profile() ? &profile_cast_failure : stub->entry(); 4.631 + 4.632 if(op->should_profile()) { 4.633 - Label not_null; 4.634 - __ bne(value, R0, not_null); 4.635 - __ delayed()->nop(); 4.636 - 4.637 - // __ jcc(Assembler::notEqual, profile_done); 4.638 - // __ bne(obj, R0, profile_done); 4.639 - //__ delayed()->nop(); 4.640 - 4.641 - // Object is null; update methodDataOop 4.642 - //ciMethodData* md = method->method_data(); 4.643 - //if (md == NULL) { 4.644 -// bailout("out of memory building methodDataOop"); 4.645 -// return; 4.646 - // } 4.647 - // ciProfileData* data = md->bci_to_data(bci); 4.648 - //assert(data != NULL, "need data for checkcast"); 4.649 - // assert(data->is_BitData(), "need BitData for checkcast"); 4.650 - Register mdo = klass_RInfo; 4.651 - int oop_index = __ oop_recorder()->find_index(md->constant_encoding()); 4.652 - RelocationHolder rspec = oop_Relocation::spec(oop_index); 4.653 - __ relocate(rspec); 4.654 -#ifndef _LP64 4.655 - //by_css 4.656 - __ lui(mdo, Assembler::split_high((int)md->constant_encoding())); 4.657 - __ addiu(mdo, mdo, Assembler::split_low((int)md->consant_encoding())); 4.658 -#else 4.659 - __ li48(mdo, (long)md->constant_encoding()); 4.660 -#endif 4.661 - 4.662 - Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset())); 4.663 - //FIXME, it very ineffictive to replace orl with 3 mips instruction @jerome, 12/27,06 4.664 - //__ orl(data_addr, BitData::null_flag_constant()); 4.665 - int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant()); 4.666 - __ lw(AT, data_addr); 4.667 - __ ori(AT, AT, header_bits); 4.668 - __ sw(AT,data_addr); 4.669 - __ b(done); 4.670 - __ delayed()->nop(); 4.671 - __ bind(not_null); 4.672 - } else { 4.673 - __ beq(value, R0, done); 4.674 - __ delayed()->nop(); 4.675 - } 4.676 - //__ verify_oop(obj); 4.677 + Label not_null; 4.678 + __ bne(value, R0, not_null); 4.679 + __ delayed()->nop(); 4.680 + 4.681 + Register mdo = klass_RInfo; 4.682 + __ mov_metadata(mdo, md->constant_encoding()); 4.683 + Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset())); 4.684 + int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant()); 4.685 + __ lw(AT, data_addr); 4.686 + __ ori(AT, AT, header_bits); 4.687 + __ sw(AT,data_addr); 4.688 + __ b(done); 4.689 + __ delayed()->nop(); 4.690 + __ bind(not_null); 4.691 + } else { 4.692 + __ beq(value, R0, done); 4.693 + __ delayed()->nop(); 4.694 + } 4.695 + 4.696 add_debug_info_for_null_check_here(op->info_for_exception()); 4.697 __ load_klass(k_RInfo, array); 4.698 __ load_klass(klass_RInfo, value); 4.699 - // get instance klass (it's already uncompressed) 4.700 - //__ movptr(k_RInfo, Address(k_RInfo, ObjArrayKlass::element_klass_offset())); 4.701 - __ daddi (k_RInfo, k_RInfo, in_bytes(ObjArrayKlass::element_klass_offset())); 4.702 - // perform the fast part of the checking logic 4.703 - //__ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, success_target, failure_target, NULL); 4.704 - // call out-of-line instance of __ check_klass_subtype_slow_path(...): 4.705 -//1899 __ push(klass_RInfo); 4.706 -//1900 __ push(k_RInfo); 4.707 -//1901 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id))); 4.708 -//1902 __ pop(klass_RInfo); 4.709 -//1903 __ pop(k_RInfo); 4.710 -//1904 // result is a boolean 4.711 -///1905 __ cmpl(k_RInfo, 0); 4.712 -//1906 __ jcc(Assembler::equal, *failure_target); 4.713 -//1907 // fall through to the success case 4.714 -//1908 4.715 -//1909 if (op->should_profile()) { 4.716 -//1910 Register mdo = klass_RInfo, recv = k_RInfo; 4.717 -//1911 __ bind(profile_cast_success); 4.718 -//1912 __ mov_metadata(mdo, md->constant_encoding()); 4.719 -//1913 __ load_klass(recv, value); 4.720 -//1914 Label update_done; 4.721 -//1915 type_profile_helper(mdo, md, data, recv, &done); 4.722 -//1916 __ jmpb(done); 4.723 -//1917 4.724 -//1918 __ bind(profile_cast_failure); 4.725 -//1919 __ mov_metadata(mdo, md->constant_encoding()); 4.726 -//1920 Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset())); 4.727 -//1921 __ subptr(counter_addr, DataLayout::counter_increment); 4.728 -//1922 __ jmp(*stub->entry()); 4.729 -//1923 } 4.730 -//1925 __ bind(done); 4.731 -//1926 } else 4.732 -//1927 if (code == lir_checkcast) { 4.733 -//1928 Register obj = op->object()->as_register(); 4.734 -//1929 Register dst = op->result_opr()->as_register(); 4.735 -//1930 Label success; 4.736 -//1931 emit_typecheck_helper(op, &success, op->stub()->entry(), &success); 4.737 -//1932 __ bind(success); 4.738 -//1933 if (dst != obj) { 4.739 -//1934 __ mov(dst, obj); 4.740 -//1935 } 4.741 -//1936 } else 4.742 -//1937 if (code == lir_instanceof) { 4.743 -//1938 Register obj = op->object()->as_register(); 4.744 -///1939 Register dst = op->result_opr()->as_register(); 4.745 -//1940 Label success, failure, done; 4.746 -//1941 emit_typecheck_helper(op, &success, &failure, &failure); 4.747 -///1942 __ bind(failure); 4.748 -//1943 __ xorptr(dst, dst); 4.749 -//1944 __ jmpb(done); 4.750 -//1945 __ bind(success); 4.751 -//1946 __ movptr(dst, 1); 4.752 -//1947 __ bind(done); 4.753 -//1948 } else { 4.754 -//1949 ShouldNotReachHere(); 4.755 -//1950 } 4.756 -//FIXME:wuhui. 4.757 - 4.758 + // get instance klass (it's already uncompressed) 4.759 + __ ld_ptr(k_RInfo, Address(k_RInfo, ObjArrayKlass::element_klass_offset())); 4.760 + // perform the fast part of the checking logic 4.761 + __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, tmp, success_target, failure_target, NULL); 4.762 + __ push(klass_RInfo); 4.763 + __ push(k_RInfo); 4.764 + __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type); 4.765 + __ pop(klass_RInfo); 4.766 + __ pop(k_RInfo); 4.767 + // result is a boolean 4.768 + __ beq(k_RInfo, R0, *failure_target); 4.769 + __ delayed()->nop(); 4.770 + // fall through to the success case 4.771 + 4.772 + if (op->should_profile()) { 4.773 + Register mdo = klass_RInfo, recv = k_RInfo; 4.774 + __ bind(profile_cast_success); 4.775 + __ mov_metadata(mdo, md->constant_encoding()); 4.776 + __ load_klass(recv, value); 4.777 + Label update_done; 4.778 + type_profile_helper(mdo, md, data, recv, &done); 4.779 + __ b(done); 4.780 + __ delayed()->nop(); 4.781 + 4.782 + __ bind(profile_cast_failure); 4.783 + __ mov_metadata(mdo, md->constant_encoding()); 4.784 + Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset())); 4.785 + __ ld_ptr(AT, counter_addr); 4.786 + __ addi(AT, AT, -DataLayout::counter_increment); 4.787 + __ st_ptr(AT, counter_addr); 4.788 + __ b(*stub->entry()); 4.789 + __ delayed()->nop(); 4.790 + } 4.791 + 4.792 + __ bind(done); 4.793 + } else if (code == lir_checkcast) { 4.794 + Register obj = op->object()->as_register(); 4.795 + Register dst = op->result_opr()->as_register(); 4.796 + Label success; 4.797 + emit_typecheck_helper(op, &success, op->stub()->entry(), &success); 4.798 + __ bind(success); 4.799 + if (dst != obj) { 4.800 + __ move(dst, obj); 4.801 + } 4.802 + } else if (code == lir_instanceof) { 4.803 + Register obj = op->object()->as_register(); 4.804 + Register dst = op->result_opr()->as_register(); 4.805 + Label success, failure, done; 4.806 + emit_typecheck_helper(op, &success, &failure, &failure); 4.807 + __ bind(failure); 4.808 + __ move(dst, R0); 4.809 + __ b(done); 4.810 + __ delayed()->nop(); 4.811 + __ bind(success); 4.812 + __ addi(dst, R0, 1); 4.813 + __ bind(done); 4.814 + } else { 4.815 + ShouldNotReachHere(); 4.816 + } 4.817 } 4.818 4.819 - 4.820 void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) { 4.821 if (op->code() == lir_cas_long) { 4.822 #ifdef _LP64 4.823 @@ -3370,8 +3504,18 @@ 4.824 Unimplemented(); 4.825 } else if (right->is_constant()) { 4.826 // cpu register - constant 4.827 - Register res = dest->as_register(); 4.828 - jint c = right->as_constant_ptr()->as_jint(); 4.829 + Register res; 4.830 + if (dest->is_double_cpu()) { 4.831 + res = dest->as_register_lo(); 4.832 + } else { 4.833 + res = dest->as_register(); 4.834 + } 4.835 + jint c; 4.836 + if (right->type() == T_INT) { 4.837 + c = right->as_constant_ptr()->as_jint(); 4.838 + } else { 4.839 + c = right->as_constant_ptr()->as_jlong(); 4.840 + } 4.841 4.842 switch (code) { 4.843 case lir_mul_strictfp: 4.844 @@ -3763,43 +3907,43 @@ 4.845 int val = right->as_constant_ptr()->as_jint(); 4.846 __ move(AT, val); 4.847 switch (code) { 4.848 - case lir_logic_and: 4.849 - __ andr (dstreg, reg, AT); 4.850 - break; 4.851 - case lir_logic_or: 4.852 - __ orr(dstreg, reg, AT); 4.853 - break; 4.854 - case lir_logic_xor: 4.855 - __ xorr(dstreg, reg, AT); 4.856 - break; 4.857 - default: ShouldNotReachHere(); 4.858 + case lir_logic_and: 4.859 + __ andr (dstreg, reg, AT); 4.860 + break; 4.861 + case lir_logic_or: 4.862 + __ orr(dstreg, reg, AT); 4.863 + break; 4.864 + case lir_logic_xor: 4.865 + __ xorr(dstreg, reg, AT); 4.866 + break; 4.867 + default: ShouldNotReachHere(); 4.868 } 4.869 } else if (right->is_stack()) { 4.870 // added support for stack operands 4.871 Address raddr = frame_map()->address_for_slot(right->single_stack_ix()); 4.872 switch (code) { 4.873 - case lir_logic_and: 4.874 - //FIXME. lw or ld_ptr? 4.875 - __ lw(AT, raddr); 4.876 - __ andr(reg, reg,AT); 4.877 - break; 4.878 - case lir_logic_or: 4.879 - __ lw(AT, raddr); 4.880 - __ orr(reg, reg, AT); 4.881 - break; 4.882 - case lir_logic_xor: 4.883 - __ lw(AT, raddr); 4.884 - __ xorr(reg, reg, AT); 4.885 - break; 4.886 - default: ShouldNotReachHere(); 4.887 + case lir_logic_and: 4.888 + //FIXME. lw or ld_ptr? 4.889 + __ lw(AT, raddr); 4.890 + __ andr(reg, reg,AT); 4.891 + break; 4.892 + case lir_logic_or: 4.893 + __ lw(AT, raddr); 4.894 + __ orr(reg, reg, AT); 4.895 + break; 4.896 + case lir_logic_xor: 4.897 + __ lw(AT, raddr); 4.898 + __ xorr(reg, reg, AT); 4.899 + break; 4.900 + default: ShouldNotReachHere(); 4.901 } 4.902 } else { 4.903 Register rright = right->as_register(); 4.904 switch (code) { 4.905 - case lir_logic_and: __ andr (dstreg, reg, rright); break; 4.906 - case lir_logic_or : __ orr (dstreg, reg, rright); break; 4.907 - case lir_logic_xor: __ xorr (dstreg, reg, rright); break; 4.908 - default: ShouldNotReachHere(); 4.909 + case lir_logic_and: __ andr (dstreg, reg, rright); break; 4.910 + case lir_logic_or : __ orr (dstreg, reg, rright); break; 4.911 + case lir_logic_xor: __ xorr (dstreg, reg, rright); break; 4.912 + default: ShouldNotReachHere(); 4.913 } 4.914 } 4.915 } else { 4.916 @@ -3817,46 +3961,46 @@ 4.917 int r_hi = right->as_constant_ptr()->as_jint_hi(); 4.918 4.919 switch (code) { 4.920 - case lir_logic_and: 4.921 - __ move(AT, r_lo); 4.922 - __ andr(dst_lo, l_lo, AT); 4.923 - __ move(AT, r_hi); 4.924 - __ andr(dst_hi, l_hi, AT); 4.925 - break; 4.926 - 4.927 - case lir_logic_or: 4.928 - __ move(AT, r_lo); 4.929 - __ orr(dst_lo, l_lo, AT); 4.930 - __ move(AT, r_hi); 4.931 - __ orr(dst_hi, l_hi, AT); 4.932 - break; 4.933 - 4.934 - case lir_logic_xor: 4.935 - __ move(AT, r_lo); 4.936 - __ xorr(dst_lo, l_lo, AT); 4.937 - __ move(AT, r_hi); 4.938 - __ xorr(dst_hi, l_hi, AT); 4.939 - break; 4.940 - 4.941 - default: ShouldNotReachHere(); 4.942 + case lir_logic_and: 4.943 + __ move(AT, r_lo); 4.944 + __ andr(dst_lo, l_lo, AT); 4.945 + __ move(AT, r_hi); 4.946 + __ andr(dst_hi, l_hi, AT); 4.947 + break; 4.948 + 4.949 + case lir_logic_or: 4.950 + __ move(AT, r_lo); 4.951 + __ orr(dst_lo, l_lo, AT); 4.952 + __ move(AT, r_hi); 4.953 + __ orr(dst_hi, l_hi, AT); 4.954 + break; 4.955 + 4.956 + case lir_logic_xor: 4.957 + __ move(AT, r_lo); 4.958 + __ xorr(dst_lo, l_lo, AT); 4.959 + __ move(AT, r_hi); 4.960 + __ xorr(dst_hi, l_hi, AT); 4.961 + break; 4.962 + 4.963 + default: ShouldNotReachHere(); 4.964 } 4.965 #else 4.966 __ li(AT, right->as_constant_ptr()->as_jlong()); 4.967 4.968 switch (code) { 4.969 - case lir_logic_and: 4.970 - __ andr(dst_lo, l_lo, AT); 4.971 - break; 4.972 - 4.973 - case lir_logic_or: 4.974 - __ orr(dst_lo, l_lo, AT); 4.975 - break; 4.976 - 4.977 - case lir_logic_xor: 4.978 - __ xorr(dst_lo, l_lo, AT); 4.979 - break; 4.980 - 4.981 - default: ShouldNotReachHere(); 4.982 + case lir_logic_and: 4.983 + __ andr(dst_lo, l_lo, AT); 4.984 + break; 4.985 + 4.986 + case lir_logic_or: 4.987 + __ orr(dst_lo, l_lo, AT); 4.988 + break; 4.989 + 4.990 + case lir_logic_xor: 4.991 + __ xorr(dst_lo, l_lo, AT); 4.992 + break; 4.993 + 4.994 + default: ShouldNotReachHere(); 4.995 } 4.996 #endif 4.997 4.998 @@ -3865,19 +4009,19 @@ 4.999 Register r_hi = right->as_register_hi(); 4.1000 4.1001 switch (code) { 4.1002 - case lir_logic_and: 4.1003 - __ andr(dst_lo, l_lo, r_lo); 4.1004 - NOT_LP64(__ andr(dst_hi, l_hi, r_hi);) 4.1005 - break; 4.1006 - case lir_logic_or: 4.1007 - __ orr(dst_lo, l_lo, r_lo); 4.1008 - NOT_LP64(__ orr(dst_hi, l_hi, r_hi);) 4.1009 - break; 4.1010 - case lir_logic_xor: 4.1011 - __ xorr(dst_lo, l_lo, r_lo); 4.1012 - NOT_LP64(__ xorr(dst_hi, l_hi, r_hi);) 4.1013 - break; 4.1014 - default: ShouldNotReachHere(); 4.1015 + case lir_logic_and: 4.1016 + __ andr(dst_lo, l_lo, r_lo); 4.1017 + NOT_LP64(__ andr(dst_hi, l_hi, r_hi);) 4.1018 + break; 4.1019 + case lir_logic_or: 4.1020 + __ orr(dst_lo, l_lo, r_lo); 4.1021 + NOT_LP64(__ orr(dst_hi, l_hi, r_hi);) 4.1022 + break; 4.1023 + case lir_logic_xor: 4.1024 + __ xorr(dst_lo, l_lo, r_lo); 4.1025 + NOT_LP64(__ xorr(dst_hi, l_hi, r_hi);) 4.1026 + break; 4.1027 + default: ShouldNotReachHere(); 4.1028 } 4.1029 } 4.1030 } 4.1031 @@ -4111,28 +4255,6 @@ 4.1032 4.1033 4.1034 void LIR_Assembler::align_call(LIR_Code code) { 4.1035 -//FIXME. aoqi, this right? 4.1036 -// do nothing since all instructions are word aligned on sparc 4.1037 -/* 4.1038 - if (os::is_MP()) { 4.1039 - // make sure that the displacement word of the call ends up word aligned 4.1040 - int offset = __ offset(); 4.1041 - switch (code) { 4.1042 - case lir_static_call: 4.1043 - case lir_optvirtual_call: 4.1044 - offset += NativeCall::displacement_offset; 4.1045 - break; 4.1046 - case lir_icvirtual_call: 4.1047 - offset += NativeCall::displacement_offset + NativeMovConstReg::instruction_size; 4.1048 - break; 4.1049 - case lir_virtual_call: // currently, sparc-specific for niagara 4.1050 - default: ShouldNotReachHere(); 4.1051 - } 4.1052 - while (offset++ % BytesPerWord != 0) { 4.1053 - __ nop(); 4.1054 - } 4.1055 - } 4.1056 -*/ 4.1057 } 4.1058 4.1059 4.1060 @@ -4145,26 +4267,8 @@ 4.1061 4.1062 4.1063 void LIR_Assembler::ic_call(LIR_OpJavaCall* op) { 4.1064 - RelocationHolder rh = virtual_call_Relocation::spec(pc()); 4.1065 -// int oop_index = __ oop_recorder()->allocate_oop_index((jobject)Universe::non_oop_word()); 4.1066 -// RelocationHolder rspec = oop_Relocation::spec(oop_index); 4.1067 -/// __ relocate(rspec); 4.1068 -#ifndef _LP64 4.1069 -//by_css 4.1070 - __ lui(IC_Klass, Assembler::split_high((int)Universe::non_oop_word())); 4.1071 - __ addiu(IC_Klass, IC_Klass, Assembler::split_low((int)Universe::non_oop_word())); 4.1072 -#else 4.1073 - __ li48(IC_Klass, (long)Universe::non_oop_word()); 4.1074 -#endif 4.1075 - __ call(op->addr(), rh); 4.1076 - __ delayed()->nop(); 4.1077 -// add_call_info(code_offset(), info); 4.1078 - 4.1079 - add_call_info(code_offset(), op->info()); 4.1080 - assert(!os::is_MP() || 4.1081 - (__ offset() - NativeCall::instruction_size + NativeCall::displacement_offset) % BytesPerWord == 0, 4.1082 - "must be aligned"); 4.1083 - 4.1084 + __ ic_call(op->addr()); 4.1085 + add_call_info(code_offset(), op->info()); 4.1086 } 4.1087 4.1088 4.1089 @@ -4182,36 +4286,17 @@ 4.1090 bailout("static call stub overflow"); 4.1091 return; 4.1092 } 4.1093 - 4.1094 int start = __ offset(); 4.1095 - /* 4.1096 - if (os::is_MP()) { 4.1097 - // make sure that the displacement word of the call ends up word aligned 4.1098 - int offset = __ offset() + NativeMovConstReg::instruction_size + NativeCall::displacement_offset; 4.1099 - while (offset++ % BytesPerWord != 0) { 4.1100 - __ nop(); 4.1101 - } 4.1102 - } 4.1103 - */ 4.1104 __ relocate(static_stub_Relocation::spec(call_pc)); 4.1105 - jobject o=NULL; 4.1106 - int oop_index = __ oop_recorder()->allocate_oop_index((jobject)o); 4.1107 - RelocationHolder rspec = oop_Relocation::spec(oop_index); 4.1108 + 4.1109 + Metadata *o = NULL; 4.1110 + int index = __ oop_recorder()->allocate_metadata_index(o); 4.1111 + RelocationHolder rspec = metadata_Relocation::spec(index); 4.1112 __ relocate(rspec); 4.1113 //see set_to_interpreted 4.1114 -#ifndef _LP64 4.1115 - __ lui(T7, Assembler::split_high((int)o)); 4.1116 - __ addiu(T7, T7, Assembler::split_low((int)o)); 4.1117 -#else 4.1118 - __ li48(Rmethod, (long)o); 4.1119 -#endif 4.1120 -#ifndef _LP64 4.1121 - __ lui(AT, Assembler::split_high((int)-1)); 4.1122 - __ addiu(AT, AT, Assembler::split_low((int)-1)); 4.1123 -#else 4.1124 - __ li48(AT, (long)-1); 4.1125 -#endif 4.1126 - //assert(!os::is_MP() || ((__ offset() + 1) % BytesPerWord) == 0, "must be aligned on MP"); 4.1127 + __ patchable_set48(Rmethod, (long)o); 4.1128 + 4.1129 + __ patchable_set48(AT, (long)-1); 4.1130 __ jr(AT); 4.1131 __ delayed()->nop(); 4.1132 assert(__ offset() - start <= call_stub_size, "stub too big"); 4.1133 @@ -4227,52 +4312,29 @@ 4.1134 // (LinearScan assumes that no oops are in fixed registers) 4.1135 4.1136 info->add_register_oop(exceptionOop); 4.1137 - //if (!unwind) { 4.1138 - // get current pc information 4.1139 - // pc is only needed if the method has an exception handler, the unwind code does not need it. 4.1140 -#ifndef _LP64 4.1141 -//by_css 4.1142 - int pc_for_athrow = (int)__ pc(); 4.1143 - int pc_for_athrow_offset = __ offset(); 4.1144 - Register epc = exceptionPC->as_register(); 4.1145 - //__ nop(); 4.1146 - // pc_for_athrow can not point to itself (relocInfo restriction), no need now 4.1147 - __ relocate(relocInfo::internal_pc_type); 4.1148 - __ lui(epc, Assembler::split_high(pc_for_athrow)); 4.1149 - __ addiu(epc, epc, Assembler::split_low(pc_for_athrow)); 4.1150 -#else 4.1151 - long pc_for_athrow = (long)__ pc(); 4.1152 - int pc_for_athrow_offset = __ offset(); 4.1153 - Register epc = exceptionPC->as_register(); 4.1154 - //__ nop(); 4.1155 - // pc_for_athrow can not point to itself (relocInfo restriction), no need now 4.1156 - __ relocate(relocInfo::internal_pc_type); 4.1157 - __ li48(epc, pc_for_athrow); 4.1158 -#endif 4.1159 - add_call_info(pc_for_athrow_offset, info); // for exception handler 4.1160 - __ verify_not_null_oop(V0); 4.1161 - // search an exception handler (eax: exception oop, edx: throwing pc) 4.1162 - if (compilation()->has_fpu_code()) { 4.1163 - __ call(Runtime1::entry_for(Runtime1::handle_exception_id), 4.1164 - relocInfo::runtime_call_type); 4.1165 - } else { 4.1166 - __ call(Runtime1::entry_for(Runtime1::handle_exception_nofpu_id), 4.1167 - relocInfo::runtime_call_type); 4.1168 - } 4.1169 -// } else { 4.1170 -// __ call(Runtime1::entry_for(Runtime1::unwind_exception_id), 4.1171 -// relocInfo::runtime_call_type); 4.1172 -// } 4.1173 - 4.1174 - // enough room for two byte trap 4.1175 + long pc_for_athrow = (long)__ pc(); 4.1176 + int pc_for_athrow_offset = __ offset(); 4.1177 + Register epc = exceptionPC->as_register(); 4.1178 + __ relocate(relocInfo::internal_pc_type); 4.1179 + __ li48(epc, pc_for_athrow); 4.1180 + add_call_info(pc_for_athrow_offset, info); // for exception handler 4.1181 + __ verify_not_null_oop(V0); 4.1182 + // search an exception handler (eax: exception oop, edx: throwing pc) 4.1183 + if (compilation()->has_fpu_code()) { 4.1184 + __ call(Runtime1::entry_for(Runtime1::handle_exception_id), 4.1185 + relocInfo::runtime_call_type); 4.1186 + } else { 4.1187 + __ call(Runtime1::entry_for(Runtime1::handle_exception_nofpu_id), 4.1188 + relocInfo::runtime_call_type); 4.1189 + } 4.1190 __ delayed()->nop(); 4.1191 } 4.1192 4.1193 -void LIR_Assembler::unwind_op(LIR_Opr exceptionOop){ 4.1194 - assert(exceptionOop->as_register()== FSR, "must match"); 4.1195 - __ b(_unwind_handler_entry); 4.1196 - __ delayed()->nop(); 4.1197 - } 4.1198 +void LIR_Assembler::unwind_op(LIR_Opr exceptionOop) { 4.1199 + assert(exceptionOop->as_register()== FSR, "must match"); 4.1200 + __ b(_unwind_handler_entry); 4.1201 + __ delayed()->nop(); 4.1202 +} 4.1203 4.1204 void LIR_Assembler::shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp) { 4.1205 // optimized version for linear scan: 4.1206 @@ -4296,12 +4358,11 @@ 4.1207 assert_different_registers(count_reg, value_reg); 4.1208 switch (code) { 4.1209 case lir_shl: 4.1210 - if (dest->type() == T_INT) 4.1211 - __ sllv(dest_reg, value_reg, count_reg); 4.1212 - else 4.1213 - __ dsllv(dest_reg, value_reg, count_reg); 4.1214 - break; 4.1215 -//__ dsllv(dest_reg, value_reg, count_reg); break; 4.1216 + if (dest->type() == T_INT) 4.1217 + __ sllv(dest_reg, value_reg, count_reg); 4.1218 + else 4.1219 + __ dsllv(dest_reg, value_reg, count_reg); 4.1220 + break; 4.1221 case lir_shr: __ dsrav(dest_reg, value_reg, count_reg); break; 4.1222 case lir_ushr: 4.1223 #if 1 4.1224 @@ -4325,15 +4386,14 @@ 4.1225 // 4.1226 // 108 ushift_right [a6|I] [a4|I] [a4|I] 4.1227 // 0x00000055646d2f70: dsll32 a4, a6, 0 \ 4.1228 -// 0x00000055646d2f74: dsrl32 a4, a4, 0 |- error! 4.1229 -// 0x00000055646d2f78: dsrl a4, a4, a4 / 4.1230 - if (left->type() == T_INT && dest->type() == T_INT) 4.1231 - { 4.1232 - __ dsll32(AT, value_reg, 0); // Omit the high 32 bits 4.1233 - __ dsrl32(AT, AT, 0); 4.1234 - __ dsrlv(dest_reg, AT, count_reg); // Unsigned right shift 4.1235 - break; 4.1236 - } 4.1237 +// 0x00000055646d2f74: dsrl32 a4, a4, 0 |- error! 4.1238 +// 0x00000055646d2f78: dsrl a4, a4, a4 / 4.1239 + if (left->type() == T_INT && dest->type() == T_INT) { 4.1240 + __ dsll32(AT, value_reg, 0); // Omit the high 32 bits 4.1241 + __ dsrl32(AT, AT, 0); 4.1242 + __ dsrlv(dest_reg, AT, count_reg); // Unsigned right shift 4.1243 + break; 4.1244 + } 4.1245 #endif 4.1246 __ dsrlv(dest_reg, value_reg, count_reg); break; 4.1247 default: ShouldNotReachHere(); 4.1248 @@ -4494,8 +4554,7 @@ 4.1249 case lir_shr: __ dsra(dest_reg, value_reg, count); break; 4.1250 case lir_ushr: 4.1251 #if 1 4.1252 - if (left->type() == T_INT && dest->type() == T_INT) 4.1253 - { 4.1254 + if (left->type() == T_INT && dest->type() == T_INT) { 4.1255 /* Jin: in java, ushift_right requires 32-bit UNSIGNED operation! 4.1256 However, dsrl will shift in company with the highest 32 bits. 4.1257 Thus, if the source register contains a negative value, 4.1258 @@ -4790,13 +4849,12 @@ 4.1259 } 4.1260 4.1261 if (flags & LIR_OpArrayCopy::type_check) { 4.1262 - if (UseCompressedOops) { 4.1263 - __ lw(AT, src_klass_addr); 4.1264 - __ lw(tmp, dst_klass_addr); 4.1265 - } else { 4.1266 - __ ld(AT, src_klass_addr); 4.1267 - __ ld(tmp, dst_klass_addr); 4.1268 - } 4.1269 + if (UseCompressedClassPointers) { 4.1270 + __ lw(AT, src_klass_addr); 4.1271 + __ lw(tmp, dst_klass_addr); 4.1272 + } else { 4.1273 + __ ld(AT, src_klass_addr); __ ld(tmp, dst_klass_addr); 4.1274 + } 4.1275 __ bne_far(AT, tmp, *stub->entry()); 4.1276 __ delayed()->nop(); 4.1277 } 4.1278 @@ -4810,36 +4868,37 @@ 4.1279 // a type check i needed then at this point the classes are known to be 4.1280 // the same but again which don't know which type so we can't check them. 4.1281 Label known_ok, halt; 4.1282 -//FIXME:wuhui. not finished. __ mov_metadata(tmp, default_type->constant_encoding()); 4.1283 + __ mov_metadata(tmp, default_type->constant_encoding()); 4.1284 #ifdef _LP64 4.1285 - if (UseCompressedOops) { 4.1286 - __ encode_heap_oop(AT); 4.1287 - __ lw(tmp, dst_klass_addr); 4.1288 - } else 4.1289 + if (UseCompressedClassPointers) { 4.1290 + __ encode_klass_not_null(tmp); 4.1291 + } 4.1292 #endif 4.1293 - { 4.1294 - __ ld(tmp, dst_klass_addr); 4.1295 - } 4.1296 if (basic_type != T_OBJECT) { 4.1297 + if (UseCompressedClassPointers) { 4.1298 + __ lw(AT, dst_klass_addr); 4.1299 + } else { 4.1300 + __ ld(AT, dst_klass_addr); 4.1301 + } 4.1302 __ bne(AT, tmp, halt); 4.1303 __ delayed()->nop(); 4.1304 - if (UseCompressedOops) { 4.1305 - __ lw(tmp, src_klass_addr); 4.1306 + if (UseCompressedClassPointers) { 4.1307 + __ lw(AT, src_klass_addr); 4.1308 } else { 4.1309 - __ ld(tmp, src_klass_addr); 4.1310 + __ ld(AT, src_klass_addr); 4.1311 } 4.1312 __ beq(AT, tmp, known_ok); 4.1313 __ delayed()->nop(); 4.1314 } else { 4.1315 - if (UseCompressedOops) { 4.1316 - __ lw(tmp, dst_klass_addr); 4.1317 - } else { 4.1318 - __ ld(tmp, dst_klass_addr); 4.1319 - } 4.1320 - __ beq(AT, tmp, known_ok); 4.1321 - __ delayed()->nop(); 4.1322 - __ beq(src, dst, known_ok); 4.1323 - __ delayed()->nop(); 4.1324 + if (UseCompressedClassPointers) { 4.1325 + __ lw(AT, dst_klass_addr); 4.1326 + } else { 4.1327 + __ ld(AT, dst_klass_addr); 4.1328 + } 4.1329 + __ beq(AT, tmp, known_ok); 4.1330 + __ delayed()->nop(); 4.1331 + __ beq(src, dst, known_ok); 4.1332 + __ delayed()->nop(); 4.1333 } 4.1334 __ bind(halt); 4.1335 __ stop("incorrect type information in arraycopy"); 4.1336 @@ -4916,6 +4975,7 @@ 4.1337 Register lock = op->lock_opr()->is_single_cpu() ? op->lock_opr()->as_register(): op->lock_opr()->as_register_lo(); 4.1338 if (!UseFastLocking) { 4.1339 __ b_far(*op->stub()->entry()); 4.1340 + __ delayed()->nop(); 4.1341 } else if (op->code() == lir_lock) { 4.1342 Register scratch = noreg; 4.1343 if (UseBiasedLocking) { 4.1344 @@ -4957,21 +5017,12 @@ 4.1345 assert(op->mdo()->is_single_cpu(), "mdo must be allocated"); 4.1346 Register mdo = op->mdo()->as_register(); 4.1347 4.1348 - int oop_index = __ oop_recorder()->find_index(md->constant_encoding()); 4.1349 - RelocationHolder rspec = oop_Relocation::spec(oop_index); 4.1350 - __ relocate(rspec); 4.1351 -#ifndef _LP64 4.1352 - //by_css 4.1353 - __ lui(mdo, Assembler::split_high((int)md->constant_encoding())); 4.1354 - __ addiu(mdo, mdo, Assembler::split_low((int)md->constant_encoding())); 4.1355 -#else 4.1356 - __ li48(mdo, (long)md->constant_encoding()); 4.1357 -#endif 4.1358 + __ mov_metadata(mdo, md->constant_encoding()); 4.1359 4.1360 Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset())); 4.1361 - __ lw(AT, counter_addr); 4.1362 - __ addi(AT,AT, DataLayout::counter_increment); 4.1363 - __ sw(AT,counter_addr); 4.1364 + __ ld_ptr(AT, counter_addr); 4.1365 + __ addi(AT, AT, DataLayout::counter_increment); 4.1366 + __ st_ptr(AT, counter_addr); 4.1367 4.1368 Bytecodes::Code bc = method->java_code_at_bci(bci); 4.1369 const bool callee_is_static = callee->is_loaded() && callee->is_static(); 4.1370 @@ -4980,11 +5031,11 @@ 4.1371 if ((bc == Bytecodes::_invokevirtual || bc == Bytecodes::_invokeinterface) && 4.1372 !callee_is_static && //required for optimized MH invokes 4.1373 C1ProfileVirtualCalls) { 4.1374 - assert(op->recv()->is_single_cpu(), "recv must be allocated"); 4.1375 - Register recv = op->recv()->as_register(); 4.1376 - assert_different_registers(mdo, recv); 4.1377 - assert(data->is_VirtualCallData(), "need VirtualCallData for virtual calls"); 4.1378 - ciKlass* known_klass = op->known_holder(); 4.1379 + assert(op->recv()->is_single_cpu(), "recv must be allocated"); 4.1380 + Register recv = op->recv()->as_register(); 4.1381 + assert_different_registers(mdo, recv); 4.1382 + assert(data->is_VirtualCallData(), "need VirtualCallData for virtual calls"); 4.1383 + ciKlass* known_klass = op->known_holder(); 4.1384 if (C1OptimizeVirtualCallProfiling && known_klass != NULL) { 4.1385 // We know the type that will be seen at this call site; we can 4.1386 // statically update the methodDataOop rather than needing to do 4.1387 @@ -4995,14 +5046,14 @@ 4.1388 ciVirtualCallData* vc_data = (ciVirtualCallData*) data; 4.1389 uint i; 4.1390 for (i = 0; i < VirtualCallData::row_limit(); i++) { 4.1391 - ciKlass* receiver = vc_data->receiver(i); 4.1392 - if (known_klass->equals(receiver)) { 4.1393 - Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); 4.1394 - __ lw(AT, data_addr); 4.1395 - __ addi(AT, AT, DataLayout::counter_increment); 4.1396 - __ sw(AT, data_addr); 4.1397 - return; 4.1398 - } 4.1399 + ciKlass* receiver = vc_data->receiver(i); 4.1400 + if (known_klass->equals(receiver)) { 4.1401 + Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); 4.1402 + __ ld_ptr(AT, data_addr); 4.1403 + __ addi(AT, AT, DataLayout::counter_increment); 4.1404 + __ st_ptr(AT, data_addr); 4.1405 + return; 4.1406 + } 4.1407 } 4.1408 4.1409 // Receiver type not found in profile data; select an empty slot 4.1410 @@ -5011,65 +5062,55 @@ 4.1411 // always does a write to the receiver part of the 4.1412 // VirtualCallData rather than just the first time 4.1413 for (i = 0; i < VirtualCallData::row_limit(); i++) { 4.1414 - ciKlass* receiver = vc_data->receiver(i); 4.1415 - if (receiver == NULL) { 4.1416 - Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i))); 4.1417 - int oop_index = __ oop_recorder()->find_index(known_klass->constant_encoding()); 4.1418 - RelocationHolder rspec = oop_Relocation::spec(oop_index); 4.1419 - __ relocate(rspec); 4.1420 -#ifndef _LP64 4.1421 - //by_css 4.1422 - __ lui(AT, Assembler::split_high((int)known_klass->constant_encoding())); 4.1423 - __ addiu(AT, AT, Assembler::split_low((int)known_klass->constant_encoding())); 4.1424 -#else 4.1425 - __ li48(AT, (long)known_klass->constant_encoding()); 4.1426 -#endif 4.1427 - __ st_ptr(AT,recv_addr); 4.1428 - Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); 4.1429 - __ lw(AT, data_addr); 4.1430 - __ addi(AT, AT, DataLayout::counter_increment); 4.1431 - __ sw(AT, data_addr); 4.1432 - return; 4.1433 - } 4.1434 + ciKlass* receiver = vc_data->receiver(i); 4.1435 + if (receiver == NULL) { 4.1436 + Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i))); 4.1437 + __ mov_metadata(AT, known_klass->constant_encoding()); 4.1438 + __ st_ptr(AT,recv_addr); 4.1439 + Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); 4.1440 + __ ld_ptr(AT, data_addr); 4.1441 + __ addi(AT, AT, DataLayout::counter_increment); 4.1442 + __ st_ptr(AT, data_addr); 4.1443 + return; 4.1444 + } 4.1445 } 4.1446 } else { 4.1447 //__ ld_ptr(recv, Address(recv, oopDesc::klass_offset_in_bytes())); 4.1448 - __ load_klass(recv, recv); 4.1449 - Label update_done; 4.1450 - uint i; 4.1451 - for (i = 0; i < VirtualCallData::row_limit(); i++) { 4.1452 - Label next_test; 4.1453 + __ load_klass(recv, recv); 4.1454 + Label update_done; 4.1455 + uint i; 4.1456 + for (i = 0; i < VirtualCallData::row_limit(); i++) { 4.1457 + Label next_test; 4.1458 // See if the receiver is receiver[n]. 4.1459 - __ ld_ptr(AT, Address(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)))); 4.1460 - __ bne(recv,AT,next_test); 4.1461 - __ delayed()->nop(); 4.1462 - Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); 4.1463 - __ lw(AT, data_addr); 4.1464 - __ addi(AT, AT, DataLayout::counter_increment); 4.1465 - __ sw(AT, data_addr); 4.1466 - __ b(update_done); 4.1467 - __ delayed()->nop(); 4.1468 - __ bind(next_test); 4.1469 - } 4.1470 + __ ld_ptr(AT, Address(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)))); 4.1471 + __ bne(recv,AT,next_test); 4.1472 + __ delayed()->nop(); 4.1473 + Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); 4.1474 + __ ld_ptr(AT, data_addr); 4.1475 + __ addi(AT, AT, DataLayout::counter_increment); 4.1476 + __ st_ptr(AT, data_addr); 4.1477 + __ b(update_done); 4.1478 + __ delayed()->nop(); 4.1479 + __ bind(next_test); 4.1480 + } 4.1481 4.1482 // Didn't find receiver; find next empty slot and fill it in 4.1483 - for (i = 0; i < VirtualCallData::row_limit(); i++) { 4.1484 - Label next_test; 4.1485 - Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i))); 4.1486 - __ ld_ptr(AT, recv_addr); 4.1487 - __ bne(AT, R0, next_test); 4.1488 - __ delayed()->nop(); 4.1489 - __ st_ptr(recv, recv_addr); 4.1490 - __ move(AT,DataLayout::counter_increment); 4.1491 - __ sw(AT,Address(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)))); 4.1492 - if (i < (VirtualCallData::row_limit() - 1)) { 4.1493 - __ b(update_done); 4.1494 - __ delayed()->nop(); 4.1495 - } 4.1496 - __ bind(next_test); 4.1497 - } 4.1498 - 4.1499 - __ bind(update_done); 4.1500 + for (i = 0; i < VirtualCallData::row_limit(); i++) { 4.1501 + Label next_test; 4.1502 + Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i))); 4.1503 + __ ld_ptr(AT, recv_addr); 4.1504 + __ bne(AT, R0, next_test); 4.1505 + __ delayed()->nop(); 4.1506 + __ st_ptr(recv, recv_addr); 4.1507 + __ move(AT, DataLayout::counter_increment); 4.1508 + __ st_ptr(AT, Address(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)))); 4.1509 + if (i < (VirtualCallData::row_limit() - 1)) { 4.1510 + __ b(update_done); 4.1511 + __ delayed()->nop(); 4.1512 + } 4.1513 + __ bind(next_test); 4.1514 + } 4.1515 + __ bind(update_done); 4.1516 } 4.1517 } 4.1518 } 4.1519 @@ -5092,6 +5133,7 @@ 4.1520 } 4.1521 4.1522 void LIR_Assembler::align_backward_branch_target() { 4.1523 + __ align(BytesPerWord); 4.1524 } 4.1525 4.1526 4.1527 @@ -5124,11 +5166,11 @@ 4.1528 } 4.1529 } 4.1530 4.1531 - 4.1532 void LIR_Assembler::leal(LIR_Opr addr, LIR_Opr dest) { 4.1533 assert(addr->is_address() && dest->is_register(), "check"); 4.1534 - Register reg = dest->as_register(); 4.1535 - __ lea(dest->as_register(), as_Address(addr->as_address_ptr())); 4.1536 + Register reg; 4.1537 + reg = dest->as_pointer_register(); 4.1538 + __ lea(reg, as_Address(addr->as_address_ptr())); 4.1539 } 4.1540 4.1541 4.1542 @@ -5142,8 +5184,8 @@ 4.1543 __ lui(reg, Assembler::split_high((int)o)); 4.1544 __ addiu(reg, reg, Assembler::split_low((int)o)); 4.1545 #else 4.1546 - //__ li48(reg, (long)o); 4.1547 - __ li(reg, (long)o); 4.1548 + __ li48(reg, (long)o); 4.1549 + //__ patchable_set48(reg, (long)o); 4.1550 #endif 4.1551 } else { 4.1552 int oop_index = __ oop_recorder()->find_index(o); 4.1553 @@ -5154,8 +5196,8 @@ 4.1554 __ lui(reg, Assembler::split_high((int)o)); 4.1555 __ addiu(reg, reg, Assembler::split_low((int)o)); 4.1556 #else 4.1557 - //__ li48(reg, (long)o); 4.1558 - __ li(reg, (long)o); 4.1559 + __ li48(reg, (long)o); 4.1560 + //__ patchable_set48(reg, (long)o); 4.1561 #endif 4.1562 } 4.1563 } 4.1564 @@ -5321,6 +5363,7 @@ 4.1565 } else { 4.1566 ShouldNotReachHere(); 4.1567 }*/ 4.1568 + ShouldNotReachHere(); 4.1569 } 4.1570 4.1571 #undef __
5.1 --- a/src/cpu/mips/vm/c1_LIRAssembler_mips.hpp Sat Jan 06 16:30:58 2018 +0800 5.2 +++ b/src/cpu/mips/vm/c1_LIRAssembler_mips.hpp Thu May 24 19:49:50 2018 +0800 5.3 @@ -23,12 +23,13 @@ 5.4 * 5.5 */ 5.6 5.7 +#ifndef CPU_MIPS_VM_C1_LIRASSEMBLER_MIPS_HPP 5.8 +#define CPU_MIPS_VM_C1_LIRASSEMBLER_MIPS_HPP 5.9 + 5.10 private: 5.11 5.12 Address::ScaleFactor array_element_size(BasicType type) const; 5.13 5.14 - void monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register new_hdr, int monitor_no, Register exception); 5.15 - 5.16 void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, int dest_index, bool pop_fpu_stack); 5.17 5.18 // helper functions which checks for overflow and sets bailout if it 5.19 @@ -43,6 +44,10 @@ 5.20 // method. 5.21 Address as_Address(LIR_Address* addr, Register tmp); 5.22 5.23 + // Record the type of the receiver in ReceiverTypeData 5.24 + void type_profile_helper(Register mdo, 5.25 + ciMethodData *md, ciProfileData *data, 5.26 + Register recv, Label* update_done); 5.27 5.28 public: 5.29 5.30 @@ -50,8 +55,9 @@ 5.31 void store_parameter(jint c, int offset_from_esp_in_words); 5.32 void store_parameter(jobject c, int offset_from_esp_in_words); 5.33 5.34 - //enum { call_stub_size = NOT_LP64(24) LP64_ONLY(40), 5.35 - enum { call_stub_size = NOT_LP64(24) LP64_ONLY(500), //aoqi_test 5.36 + enum { call_stub_size = NOT_LP64(24) LP64_ONLY(40), 5.37 exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), 5.38 deopt_handler_size = NOT_LP64(16) LP64_ONLY(32) 5.39 }; 5.40 + 5.41 +#endif // CPU_MIPS_VM_C1_LIRASSEMBLER_MIPS_HPP
6.1 --- a/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp Sat Jan 06 16:30:58 2018 +0800 6.2 +++ b/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp Thu May 24 19:49:50 2018 +0800 6.3 @@ -235,47 +235,57 @@ 6.4 } 6.5 } 6.6 6.7 -LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,BasicType type, bool needs_card_mark) { 6.8 - int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 6.9 +LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 6.10 + BasicType type, bool needs_card_mark) { 6.11 + int elem_size = type2aelembytes(type); 6.12 + int shift = exact_log2(elem_size); 6.13 6.14 - LIR_Address* addr; 6.15 + LIR_Opr base_opr; 6.16 + int offset = arrayOopDesc::base_offset_in_bytes(type); 6.17 + 6.18 if (index_opr->is_constant()) { 6.19 - int elem_size = _type2aelembytes[type]; 6.20 - addr = new LIR_Address(array_opr, 6.21 - offset_in_bytes + index_opr->as_jint() * elem_size, type); 6.22 - } else if( index_opr->is_register()){ 6.23 + int i = index_opr->as_constant_ptr()->as_jint(); 6.24 + int array_offset = i * elem_size; 6.25 + if (Assembler::is_simm16(array_offset + offset)) { 6.26 + base_opr = array_opr; 6.27 + offset = array_offset + offset; 6.28 + } else { 6.29 + base_opr = new_pointer_register(); 6.30 + if (Assembler::is_simm16(array_offset)) { 6.31 + __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr); 6.32 + } else { 6.33 + __ move(LIR_OprFact::intptrConst(array_offset), base_opr); 6.34 + __ add(base_opr, array_opr, base_opr); 6.35 + } 6.36 + } 6.37 + } else { 6.38 #ifdef _LP64 6.39 - LIR_Opr tmp = new_register(T_LONG); 6.40 -#else 6.41 - LIR_Opr tmp = new_register(T_INT); 6.42 + if (index_opr->type() == T_INT) { 6.43 + LIR_Opr tmp = new_register(T_LONG); 6.44 + __ convert(Bytecodes::_i2l, index_opr, tmp); 6.45 + index_opr = tmp; 6.46 + } 6.47 #endif 6.48 - __ move(index_opr, tmp); 6.49 - __ shift_left(tmp, LIR_Address::scale(type),tmp); 6.50 - __ add(tmp, array_opr, tmp); 6.51 - addr = new LIR_Address(tmp, offset_in_bytes,type); 6.52 6.53 + base_opr = new_pointer_register(); 6.54 + assert (index_opr->is_register(), "Must be register"); 6.55 + if (shift > 0) { 6.56 + __ shift_left(index_opr, shift, base_opr); 6.57 + __ add(base_opr, array_opr, base_opr); 6.58 + } else { 6.59 + __ add(index_opr, array_opr, base_opr); 6.60 + } 6.61 } 6.62 - else{ 6.63 - addr = new LIR_Address(array_opr, 6.64 - offset_in_bytes, type); 6.65 - } 6.66 - 6.67 if (needs_card_mark) { 6.68 // This store will need a precise card mark, so go ahead and 6.69 // compute the full adddres instead of computing once for the 6.70 // store and again for the card mark. 6.71 -#ifdef _LP64 6.72 - LIR_Opr tmp = new_register(T_ADDRESS); 6.73 -#else 6.74 - LIR_Opr tmp = new_register(T_INT); 6.75 -#endif 6.76 - __ leal(LIR_OprFact::address(addr), tmp); 6.77 - return new LIR_Address(tmp, 0, type); 6.78 + LIR_Opr ptr = new_pointer_register(); 6.79 + __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr); 6.80 + return new LIR_Address(ptr, type); 6.81 } else { 6.82 - return addr; 6.83 + return new LIR_Address(base_opr, offset, type); 6.84 } 6.85 - 6.86 - 6.87 } 6.88 6.89 6.90 @@ -292,21 +302,29 @@ 6.91 } 6.92 6.93 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 6.94 - LIR_Opr temp = new_register(T_INT); 6.95 +#ifdef _LP64 6.96 + LIR_Opr pointer = new_register(T_LONG); 6.97 +#else 6.98 LIR_Opr pointer = new_register(T_INT); 6.99 -#ifndef _LP64 6.100 - __ move(LIR_OprFact::intConst((int)counter), pointer); 6.101 -#else 6.102 - __ move(LIR_OprFact::longConst((long)counter), pointer); 6.103 #endif 6.104 - LIR_Opr addr = (LIR_Opr)new LIR_Address(pointer, type); 6.105 - LIR_Opr c = LIR_OprFact::intConst((int)step); 6.106 - __ add(addr, c, addr); 6.107 + __ move(LIR_OprFact::intptrConst(counter), pointer); 6.108 + LIR_Address* addr = new LIR_Address(pointer, type); 6.109 + increment_counter(addr, step); 6.110 } 6.111 6.112 +//void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 6.113 +// LIR_Opr pointer = new_register(T_LONG); 6.114 +// __ move(LIR_OprFact::longConst((long)counter), pointer); 6.115 +// LIR_Opr addr = (LIR_Opr)new LIR_Address(pointer, type); 6.116 +// LIR_Opr c = LIR_OprFact::intConst((int)step); 6.117 +// __ add(addr, c, addr); 6.118 +//} 6.119 6.120 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 6.121 - Unimplemented(); 6.122 + LIR_Opr temp = new_register(addr->type()); 6.123 + __ move(addr, temp); 6.124 + __ add(temp, load_immediate(step, addr->type()), temp); 6.125 + __ move(temp, addr); 6.126 } 6.127 6.128 6.129 @@ -526,33 +544,14 @@ 6.130 default: 6.131 ShouldNotReachHere(); 6.132 } 6.133 + 6.134 // order of arguments to runtime call is reversed. 6.135 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL); 6.136 set_result(x, result); 6.137 break; 6.138 } 6.139 - /* _ladd, _lsub is delete in sharedRuntime.hpp 6.140 case Bytecodes::_ladd: 6.141 - case Bytecodes::_lsub: { 6.142 - address entry; 6.143 - switch (x->op()) { 6.144 - case Bytecodes::_ladd: 6.145 - entry = CAST_FROM_FN_PTR(address, SharedRuntime::ladd); 6.146 - break; // check if dividend is 0 is done elsewhere 6.147 - case Bytecodes::_lsub: 6.148 - entry = CAST_FROM_FN_PTR(address, SharedRuntime::lsub); 6.149 - break; // check if dividend is 0 is done elsewhere 6.150 - default: 6.151 - ShouldNotReachHere(); 6.152 - } 6.153 - 6.154 - // order of arguments to runtime call is reversed. 6.155 - LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL); 6.156 - set_result(x, result); 6.157 - break; 6.158 - }*/ 6.159 - 6.160 -/* { 6.161 + case Bytecodes::_lsub: { 6.162 LIRItem left(x->x(), this); 6.163 LIRItem right(x->y(), this); 6.164 left.load_item(); 6.165 @@ -562,8 +561,8 @@ 6.166 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 6.167 break; 6.168 } 6.169 -*/ 6.170 - default: ShouldNotReachHere(); 6.171 + default: 6.172 + ShouldNotReachHere(); 6.173 } 6.174 } 6.175 6.176 @@ -620,31 +619,6 @@ 6.177 6.178 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 6.179 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 6.180 - if(x->op() == Bytecodes::_lshl 6.181 - || x->op() == Bytecodes::_lshr 6.182 - || x->op() == Bytecodes::_lushr) { 6.183 - address entry; 6.184 - /* lushr, lshr, lshl, is delete in ShredRuntime.hpp 6.185 - switch (x->op()) { 6.186 - case Bytecodes::_lshl: 6.187 - entry = CAST_FROM_FN_PTR(address, SharedRuntime::lshl); 6.188 - break; // check if dividend is 0 is done elsewhere 6.189 - case Bytecodes::_lshr: 6.190 - entry = CAST_FROM_FN_PTR(address, SharedRuntime::lshr); 6.191 - break; // check if dividend is 0 is done elsewhere 6.192 - case Bytecodes::_lushr: 6.193 - entry = CAST_FROM_FN_PTR(address, SharedRuntime::lushr); 6.194 - break; 6.195 - default: 6.196 - ShouldNotReachHere(); 6.197 - } 6.198 - */ 6.199 - // order of arguments to runtime call is reversed. 6.200 - LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL); 6.201 - set_result(x, result); 6.202 - return; 6.203 - } 6.204 - 6.205 // count must always be in rcx 6.206 LIRItem value(x->x(), this); 6.207 LIRItem count(x->y(), this); 6.208 @@ -881,7 +855,6 @@ 6.209 } 6.210 6.211 void LIRGenerator::do_update_CRC32(Intrinsic* x) { // Fu: 20130832 6.212 - tty->print_cr("LIRGenerator::do_update_CRC32 unimplemented yet !"); 6.213 Unimplemented(); 6.214 } 6.215 6.216 @@ -962,7 +935,8 @@ 6.217 fixed_result = true; 6.218 round_result = false; 6.219 needs_stub = false; break; 6.220 - default: ShouldNotReachHere(); 6.221 + default: 6.222 + ShouldNotReachHere(); 6.223 } 6.224 6.225 LIRItem value(x->value(), this); 6.226 @@ -1015,15 +989,13 @@ 6.227 // LIR_Opr tmp3 = new_register(T_INT); 6.228 // LIR_Opr tmp4 = new_register(T_INT); 6.229 #ifndef _LP64 6.230 - LIR_Opr klass_reg = FrameMap::_t4_oop_opr; 6.231 + LIR_Opr klass_reg = FrameMap::_t4_metadata_opr; 6.232 #else 6.233 - LIR_Opr klass_reg = FrameMap::_a4_oop_opr; 6.234 + LIR_Opr klass_reg = FrameMap::_a4_metadata_opr; 6.235 #endif 6.236 -// new_instance(reg, x->klass(), FrameMap::_t0_oop_opr, FrameMap::_t1_oop_opr,FrameMap::_t2_oop_opr, LIR_OprFact::illegalOpr, klass_reg, info); 6.237 - guarantee(false, "not implemented yet."); 6.238 -/* 6.239 new_instance(reg, 6.240 x->klass(), 6.241 + x->is_unresolved(), 6.242 FrameMap::_t0_oop_opr, 6.243 FrameMap::_t1_oop_opr, 6.244 FrameMap::_t2_oop_opr, 6.245 @@ -1037,7 +1009,6 @@ 6.246 #endif 6.247 klass_reg, 6.248 info); 6.249 -*/ 6.250 LIR_Opr result = rlock_result(x); 6.251 __ move(reg, result); 6.252 } 6.253 @@ -1060,7 +1031,7 @@ 6.254 #else 6.255 LIR_Opr tmp4 = FrameMap::_a5_oop_opr; 6.256 LIR_Opr tmp5 = FrameMap::_a6_oop_opr; 6.257 - LIR_Opr klass_reg = FrameMap::_a4_oop_opr; 6.258 + LIR_Opr klass_reg = FrameMap::_a4_metadata_opr; 6.259 #endif 6.260 LIR_Opr len = length.result(); 6.261 BasicType elem_type = x->elt_type(); 6.262 @@ -1097,7 +1068,7 @@ 6.263 #else 6.264 LIR_Opr tmp4 = FrameMap::_a5_oop_opr; 6.265 LIR_Opr tmp5 = FrameMap::_a6_oop_opr; 6.266 - LIR_Opr klass_reg = FrameMap::_a4_oop_opr; 6.267 + LIR_Opr klass_reg = FrameMap::_a4_metadata_opr; 6.268 #endif 6.269 6.270 length.load_item_force(FrameMap::_t2_opr); 6.271 @@ -1145,8 +1116,8 @@ 6.272 store_stack_parameter(size->result(), in_ByteSize(i*4)); 6.273 } 6.274 6.275 - LIR_Opr reg = result_register_for(x->type()); 6.276 - klass2reg_with_patching(reg, x->klass(), patching_info); 6.277 + LIR_Opr klass_reg = FrameMap::_v0_metadata_opr; 6.278 + klass2reg_with_patching(klass_reg, x->klass(), patching_info); 6.279 6.280 // LIR_Opr rank = FrameMap::ebx_opr; 6.281 LIR_Opr rank = FrameMap::_t2_opr; 6.282 @@ -1155,12 +1126,14 @@ 6.283 LIR_Opr varargs = FrameMap::_t0_opr; 6.284 __ move(FrameMap::_sp_opr, varargs); 6.285 LIR_OprList* args = new LIR_OprList(3); 6.286 - args->append(reg); 6.287 + args->append(klass_reg); 6.288 args->append(rank); 6.289 args->append(varargs); 6.290 + LIR_Opr reg = result_register_for(x->type()); 6.291 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 6.292 LIR_OprFact::illegalOpr, 6.293 reg, args, info); 6.294 + 6.295 LIR_Opr result = rlock_result(x); 6.296 __ move(reg, result); 6.297 }
7.1 --- a/src/cpu/mips/vm/c1_LinearScan_mips.hpp Sat Jan 06 16:30:58 2018 +0800 7.2 +++ b/src/cpu/mips/vm/c1_LinearScan_mips.hpp Thu May 24 19:49:50 2018 +0800 7.3 @@ -23,6 +23,9 @@ 7.4 * 7.5 */ 7.6 7.7 +#ifndef CPU_MIPS_VM_C1_LINEARSCAN_MIPS_HPP 7.8 +#define CPU_MIPS_VM_C1_LINEARSCAN_MIPS_HPP 7.9 + 7.10 inline bool LinearScan::is_processed_reg_num(int reg_num) { 7.11 return reg_num < 26 || reg_num > 30; 7.12 } 7.13 @@ -59,7 +62,7 @@ 7.14 _first_reg = pd_first_callee_saved_reg; 7.15 _last_reg = pd_last_callee_saved_reg; 7.16 return true; 7.17 - } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT) { 7.18 + } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || cur->type() == T_METADATA) { 7.19 #ifdef _LP64 7.20 _first_reg = 12; /* From T0 */ 7.21 #else 7.22 @@ -70,3 +73,5 @@ 7.23 } 7.24 return false; 7.25 } 7.26 + 7.27 +#endif // CPU_MIPS_VM_C1_LINEARSCAN_MIPS_HPP
8.1 --- a/src/cpu/mips/vm/c1_MacroAssembler_mips.cpp Sat Jan 06 16:30:58 2018 +0800 8.2 +++ b/src/cpu/mips/vm/c1_MacroAssembler_mips.cpp Thu May 24 19:49:50 2018 +0800 8.3 @@ -140,8 +140,6 @@ 8.4 biased_locking_exit(obj, hdr, done); 8.5 } 8.6 8.7 - 8.8 - 8.9 // load displaced header 8.10 ld_ptr(hdr, disp_hdr, 0); 8.11 // if the loaded hdr is NULL we had recursive locking 8.12 @@ -178,21 +176,21 @@ 8.13 } 8.14 8.15 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1 , Register t2) { 8.16 - assert_different_registers(obj, klass, len, AT); 8.17 + assert_different_registers(obj, klass, len, T9); 8.18 8.19 if (UseBiasedLocking && !len->is_valid()) { 8.20 assert_different_registers(obj, klass, len, t1, t2); 8.21 ld_ptr(t1, klass, in_bytes(Klass::prototype_header_offset())); 8.22 st_ptr(t1, obj, oopDesc::mark_offset_in_bytes()); 8.23 } else { 8.24 - li(AT, (intptr_t)markOopDesc::prototype()); 8.25 - st_ptr(AT, obj, oopDesc::mark_offset_in_bytes()); 8.26 + li(T9, (intptr_t)markOopDesc::prototype()); 8.27 + st_ptr(T9, obj, oopDesc::mark_offset_in_bytes()); 8.28 } 8.29 //st_ptr(klass, obj, oopDesc::klass_offset_in_bytes()); 8.30 #ifdef _LP64 8.31 - if (UseCompressedOops) { 8.32 - move(AT, klass); 8.33 - store_klass(obj, AT); 8.34 + if (UseCompressedClassPointers) { 8.35 + move(T9, klass); 8.36 + store_klass(obj, T9); 8.37 } else 8.38 #endif 8.39 { 8.40 @@ -203,7 +201,7 @@ 8.41 sw(len, obj, arrayOopDesc::length_offset_in_bytes()); 8.42 } 8.43 #ifdef _LP64 8.44 - else if (UseCompressedOops) { 8.45 + else if (UseCompressedClassPointers) { 8.46 store_klass_gap(obj, R0); 8.47 } 8.48 #endif 8.49 @@ -426,14 +424,14 @@ 8.50 #ifdef _LP64 8.51 //ld_ptr(AT, receiver, oopDesc::klass_offset_in_bytes()); 8.52 //add for compressedoops 8.53 - load_klass(AT, receiver); 8.54 + load_klass(T9, receiver); 8.55 #else 8.56 - lw(AT, receiver, oopDesc::klass_offset_in_bytes()); 8.57 + lw(T9, receiver, oopDesc::klass_offset_in_bytes()); 8.58 #endif 8.59 - beq(AT, iCache, L); 8.60 + beq(T9, iCache, L); 8.61 delayed()->nop(); 8.62 // jmp(Runtime1::entry_for(Runtime1::handle_ic_miss_id), relocInfo::runtime_call_type); 8.63 - jmp(SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type); 8.64 + jmp(SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type); 8.65 delayed()->nop(); 8.66 bind(L); 8.67 // assert(UseCompressedOops, "check alignment in emit_method_entry"); 8.68 @@ -454,20 +452,25 @@ 8.69 // ordering of C2's stack overflow check / esp decrement and allows 8.70 // the SharedRuntime stack overflow handling to be consistent 8.71 // between the two compilers. 8.72 - generate_stack_overflow_check(frame_size_in_bytes); 8.73 + generate_stack_overflow_check(bang_size_in_bytes); 8.74 8.75 enter(); 8.76 //FIXME 8.77 #ifdef TIERED 8.78 - // c2 leaves fpu stack dirty. Clean it on entry 8.79 - // if (UseSSE < 2 ) { 8.80 - empty_FPU_stack(); 8.81 - // } 8.82 +// c2 leaves fpu stack dirty. Clean it on entry 8.83 +// if (UseSSE < 2 ) { 8.84 + empty_FPU_stack(); 8.85 +// } 8.86 #endif // TIERED 8.87 8.88 decrement(SP, frame_size_in_bytes); // does not emit code for frame_size == 0 8.89 } 8.90 8.91 +void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) { 8.92 + increment(SP, frame_size_in_bytes); // Does not emit code for frame_size == 0 8.93 + pop(FP); 8.94 +} 8.95 + 8.96 void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) { 8.97 if (C1Breakpoint) int3(); 8.98 inline_cache_check(receiver, ic_klass);
9.1 --- a/src/cpu/mips/vm/c1_Runtime1_mips.cpp Sat Jan 06 16:30:58 2018 +0800 9.2 +++ b/src/cpu/mips/vm/c1_Runtime1_mips.cpp Thu May 24 19:49:50 2018 +0800 9.3 @@ -60,9 +60,7 @@ 9.4 9.5 9.6 // push java thread (becomes first argument of C function) 9.7 -#ifndef OPT_THREAD 9.8 get_thread(thread); 9.9 -#endif 9.10 move(A0, thread); 9.11 9.12 set_last_Java_frame(thread, NOREG, FP, NULL); 9.13 @@ -139,8 +137,7 @@ 9.14 } else if (_stub_id == Runtime1::forward_exception_id) { 9.15 should_not_reach_here(); 9.16 } else { 9.17 - jmp(Runtime1::entry_for(Runtime1::forward_exception_id), 9.18 - relocInfo::runtime_call_type); 9.19 + jmp(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type); 9.20 delayed()->nop(); 9.21 } 9.22 bind(L); 9.23 @@ -327,9 +324,10 @@ 9.24 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, 9.25 bool save_fpu_registers = true, bool describe_fpu_registers = false) { 9.26 9.27 - /* Jin: num_rt_args is caculated by 8 bytes. */ 9.28 - int frame_size_in_slots = reg_save_frame_size + num_rt_args * wordSize / SLOT_PER_WORD; // args + thread 9.29 - sasm->set_frame_size(frame_size_in_slots / SLOT_PER_WORD); 9.30 + LP64_ONLY(num_rt_args = 0); 9.31 + LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) 9.32 + int frame_size_in_slots = reg_save_frame_size + num_rt_args * wordSize / VMRegImpl::slots_per_word; // args + thread 9.33 + sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word); 9.34 9.35 // record saved value locations in an OopMap 9.36 // locations are offsets from sp after runtime call; num_rt_args is number of arguments 9.37 @@ -407,9 +405,8 @@ 9.38 } 9.39 9.40 //FIXME, Is it enough to save this registers by yyq 9.41 -static OopMap* save_live_registers(StubAssembler* sasm, 9.42 - int num_rt_args, 9.43 - bool save_fpu_registers = true, 9.44 +static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, 9.45 + bool save_fpu_registers = true, 9.46 bool describe_fpu_registers = false) { 9.47 //const int reg_save_frame_size = return_off + 1 + num_rt_args; 9.48 __ block_comment("save_live_registers"); 9.49 @@ -607,57 +604,59 @@ 9.50 9.51 //FIXME I do not know which reigster to use.should use T3 as real_return_addr @jerome 9.52 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { 9.53 - __ block_comment("generate_handle_exception"); 9.54 - // incoming parameters 9.55 + __ block_comment("generate_handle_exception"); 9.56 + 9.57 + // incoming parameters 9.58 const Register exception_oop = V0; 9.59 const Register exception_pc = V1; 9.60 // other registers used in this stub 9.61 -// const Register real_return_addr = T3; 9.62 - const Register thread = T8; 9.63 + // const Register real_return_addr = T3; 9.64 + const Register thread = TREG; 9.65 +#ifndef OPT_THREAD 9.66 + __ get_thread(thread); 9.67 +#endif 9.68 // Save registers, if required. 9.69 - OopMapSet* oop_maps = new OopMapSet(); 9.70 - OopMap* oop_map = NULL; 9.71 - switch (id) { 9.72 - case forward_exception_id: 9.73 - // We're handling an exception in the context of a compiled frame. 9.74 - // The registers have been saved in the standard places. Perform 9.75 - // an exception lookup in the caller and dispatch to the handler 9.76 - // if found. Otherwise unwind and dispatch to the callers 9.77 - // exception handler. 9.78 - oop_map = generate_oop_map(sasm, 1 /*thread*/); 9.79 + OopMapSet* oop_maps = new OopMapSet(); 9.80 + OopMap* oop_map = NULL; 9.81 + switch (id) { 9.82 + case forward_exception_id: 9.83 + // We're handling an exception in the context of a compiled frame. 9.84 + // The registers have been saved in the standard places. Perform 9.85 + // an exception lookup in the caller and dispatch to the handler 9.86 + // if found. Otherwise unwind and dispatch to the callers 9.87 + // exception handler. 9.88 + oop_map = generate_oop_map(sasm, 1 /*thread*/); 9.89 9.90 - // load and clear pending exception oop into RAX 9.91 - __ ld(exception_oop, Address(thread, Thread::pending_exception_offset())); 9.92 - __ sw(R0,Address(thread, Thread::pending_exception_offset())); 9.93 + // load and clear pending exception oop into RAX 9.94 + __ ld_ptr(exception_oop, Address(thread, Thread::pending_exception_offset())); 9.95 + __ st_ptr(R0, Address(thread, Thread::pending_exception_offset())); 9.96 9.97 - // load issuing PC (the return address for this stub) into rdx 9.98 - __ ld(exception_pc, Address(FP, 1*BytesPerWord)); 9.99 + // load issuing PC (the return address for this stub) into rdx 9.100 + __ ld_ptr(exception_pc, Address(FP, 1*BytesPerWord)); 9.101 9.102 - // make sure that the vm_results are cleared (may be unnecessary) 9.103 - __ sw(R0,Address(thread, JavaThread::vm_result_offset())); 9.104 - __ sw(R0,Address(thread, JavaThread::vm_result_2_offset())); 9.105 - break; 9.106 - case handle_exception_nofpu_id: 9.107 - case handle_exception_id: 9.108 - // At this point all registers MAY be live. 9.109 - oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id); 9.110 - break; 9.111 - case handle_exception_from_callee_id: { 9.112 - // At this point all registers except exception oop (RAX) and 9.113 - // exception pc (RDX) are dead. 9.114 - const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_by tes / BytesPerWord); 9.115 - oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); 9.116 - sasm->set_frame_size(frame_size); 9.117 - WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); 9.118 - break; 9.119 - } 9.120 - default: ShouldNotReachHere(); 9.121 - } 9.122 + // make sure that the vm_results are cleared (may be unnecessary) 9.123 + __ st_ptr(R0, Address(thread, JavaThread::vm_result_offset())); 9.124 + __ st_ptr(R0, Address(thread, JavaThread::vm_result_2_offset())); 9.125 + break; 9.126 + case handle_exception_nofpu_id: 9.127 + case handle_exception_id: 9.128 + // At this point all registers MAY be live. 9.129 + oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id); 9.130 + break; 9.131 + case handle_exception_from_callee_id: { 9.132 + // At this point all registers except exception oop (RAX) and 9.133 + // exception pc (RDX) are dead. 9.134 + const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/); 9.135 + oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); 9.136 + sasm->set_frame_size(frame_size); 9.137 + break; 9.138 + } 9.139 + default: ShouldNotReachHere(); 9.140 + } 9.141 9.142 #ifdef TIERED 9.143 // C2 can leave the fpu stack dirty 9.144 __ empty_FPU_stack(); 9.145 - //} 9.146 #endif // TIERED 9.147 9.148 // verify that only V0 and V1 is valid at this time 9.149 @@ -689,16 +688,12 @@ 9.150 __ st_ptr(exception_oop, Address(thread, in_bytes(JavaThread::exception_oop_offset()))); 9.151 __ st_ptr(exception_pc, Address(thread, in_bytes(JavaThread::exception_pc_offset()))); 9.152 9.153 - // save real return address (pc that called this stub) 9.154 -// __ ld_ptr(real_return_addr, FP, 1*BytesPerWord); 9.155 -// __ st_ptr(real_return_addr, SP, temp_1_off * BytesPerWord / SLOT_PER_WORD); 9.156 + // patch throwing pc into return address (has bci & oop map) 9.157 + __ st_ptr(exception_pc, Address(FP, 1*BytesPerWord)); 9.158 9.159 - // patch throwing pc into return address (has bci & oop map) 9.160 - __ st_ptr(exception_pc, FP, 1*BytesPerWord); 9.161 // compute the exception handler. 9.162 // the exception oop and the throwing pc are read from the fields in JavaThread 9.163 - int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, 9.164 - exception_handler_for_pc)); 9.165 + int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); 9.166 oop_maps->add_gc_map(call_offset, oop_map); 9.167 // V0: handler address or NULL if no handler exists 9.168 // will be the deopt blob if nmethod was deoptimized while we looked up 9.169 @@ -707,75 +702,38 @@ 9.170 // only V0 is valid at this time, all other registers have been destroyed by the 9.171 // runtime call 9.172 9.173 - // Do we have an exception handler in the nmethod? 9.174 - /*Label no_handler; 9.175 - Label done; 9.176 - __ beq(V0, R0, no_handler); 9.177 - __ delayed()->nop(); */ 9.178 - // exception handler found 9.179 // patch the return address -> the stub will directly return to the exception handler 9.180 - __ st_ptr(V0, FP, 1 * BytesPerWord); 9.181 + __ st_ptr(V0, Address(FP, 1 * BytesPerWord)); 9.182 9.183 - // restore registers 9.184 -// restore_live_registers(sasm, save_fpu_registers); 9.185 + switch (id) { 9.186 + case forward_exception_id: 9.187 + case handle_exception_nofpu_id: 9.188 + case handle_exception_id: 9.189 + // Restore the registers that were saved at the beginning. 9.190 + restore_live_registers(sasm, id != handle_exception_nofpu_id); 9.191 + break; 9.192 + case handle_exception_from_callee_id: 9.193 + // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP 9.194 + // since we do a leave anyway. 9.195 9.196 - // return to exception handler 9.197 -// __ leave(); 9.198 -// __ jr(RA); 9.199 -// __ delayed()->nop(); 9.200 -// __ bind(no_handler); 9.201 - // no exception handler found in this method, so the exception is 9.202 - // forwarded to the caller (using the unwind code of the nmethod) 9.203 - // there is no need to restore the registers 9.204 + // Pop the return address since we are possibly changing SP (restoring from BP). 9.205 + __ leave(); 9.206 + // Restore SP from BP if the exception PC is a method handle call site. 9.207 + { 9.208 + Label done; 9.209 + __ ld(AT, Address(thread, JavaThread::is_method_handle_return_offset())); 9.210 + __ beq(AT, R0, done); 9.211 + __ delayed()->nop(); 9.212 + __ bind(done); 9.213 + } 9.214 + __ jr(RA); // jump to exception handler 9.215 + __ delayed()->nop(); 9.216 + break; 9.217 + default: ShouldNotReachHere(); 9.218 + } 9.219 9.220 - // restore the real return address that was saved before the RT-call 9.221 -// __ ld_ptr(real_return_addr, SP, temp_1_off * BytesPerWord / SLOT_PER_WORD); 9.222 -// __ st_ptr(real_return_addr, FP, 1 * BytesPerWord); 9.223 - // load address of JavaThread object for thread-local data 9.224 -// __ get_thread(thread); 9.225 - // restore exception oop into eax (convention for unwind code) 9.226 -// __ ld_ptr(exception_oop, thread, in_bytes(JavaThread::exception_oop_offset())); 9.227 - 9.228 - // clear exception fields in JavaThread because they are no longer needed 9.229 - // (fields must be cleared because they are processed by GC otherwise) 9.230 -// __ st_ptr(R0, thread, in_bytes(JavaThread::exception_oop_offset())); 9.231 -// __ st_ptr(R0,thread, in_bytes(JavaThread::exception_pc_offset())); 9.232 - // pop the stub frame off 9.233 -// __ leave(); 9.234 -// generate_unwind_exception(sasm); 9.235 -// __ stop("should not reach here"); 9.236 -//} 9.237 - switch (id) { 9.238 - case forward_exception_id: 9.239 - case handle_exception_nofpu_id: 9.240 - case handle_exception_id: 9.241 - // Restore the registers that were saved at the beginning. 9.242 - restore_live_registers(sasm, id == handle_exception_nofpu_id); 9.243 - break; 9.244 - case handle_exception_from_callee_id: 9.245 - // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP 9.246 - // since we do a leave anyway. 9.247 - 9.248 - // Pop the return address since we are possibly changing SP (restoring from BP). 9.249 - __ leave(); 9.250 - // Restore SP from BP if the exception PC is a method handle call site. 9.251 - NOT_LP64(__ get_thread(thread);) 9.252 - /*__ ld(AT, Address(thread, JavaThread::is_method_handle_return_offset())); 9.253 - __ beq(AT, R0, done); 9.254 - __ move(SP, rbp_mh_SP_save); 9.255 - __ bind(done); 9.256 - __ jr(RA); // jump to exception handler 9.257 - __ delayed()->nop();*/ 9.258 -// 759 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); 9.259 -// 760 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); 9.260 -// 761 __ jmp(rcx); // jump to exception handler 9.261 - 9.262 - break; 9.263 - default: ShouldNotReachHere(); 9.264 - } 9.265 - 9.266 - return oop_maps; 9.267 - } 9.268 + return oop_maps; 9.269 +} 9.270 9.271 9.272 9.273 @@ -784,10 +742,12 @@ 9.274 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { 9.275 // incoming parameters 9.276 const Register exception_oop = V0; 9.277 + // callee-saved copy of exception_oop during runtime call 9.278 + const Register exception_oop_callee_saved = S0; 9.279 // other registers used in this stub 9.280 const Register exception_pc = V1; 9.281 const Register handler_addr = T3; 9.282 - const Register thread = T8; 9.283 + const Register thread = TREG; 9.284 9.285 // verify that only eax is valid at this time 9.286 // __ invalidate_registers(false, true, true, true, true, true); 9.287 @@ -804,7 +764,7 @@ 9.288 9.289 Label pc_empty; 9.290 __ ld_ptr(AT, thread, in_bytes(JavaThread::exception_pc_offset())); 9.291 - __ beq(AT,R0, pc_empty); 9.292 + __ beq(AT, R0, pc_empty); 9.293 __ delayed()->nop(); 9.294 __ stop("exception pc must be empty"); 9.295 __ bind(pc_empty); 9.296 @@ -812,35 +772,37 @@ 9.297 // clear the FPU stack in case any FPU results are left behind 9.298 __ empty_FPU_stack(); 9.299 9.300 - // leave activation of nmethod 9.301 - __ addi(SP, FP, wordSize); 9.302 - __ ld_ptr(FP, SP, - wordSize); 9.303 + // save exception_oop in callee-saved register to preserve it during runtime calls 9.304 + __ verify_not_null_oop(exception_oop); 9.305 + __ move(exception_oop_callee_saved, exception_oop); 9.306 + 9.307 +#ifndef OPT_THREAD 9.308 + __ get_thread(thread); 9.309 +#endif 9.310 + // Get return address (is on top of stack after leave). 9.311 // store return address (is on top of stack after leave) 9.312 + 9.313 __ ld_ptr(exception_pc, SP, 0); 9.314 - __ verify_oop(exception_oop); 9.315 9.316 - // save exception oop from eax to stack before call 9.317 - __ push(exception_oop); 9.318 // search the exception handler address of the caller (using the return address) 9.319 - __ call_VM_leaf(CAST_FROM_FN_PTR(address, 9.320 - SharedRuntime::exception_handler_for_return_address), exception_pc); 9.321 - // eax: exception handler address of the caller 9.322 + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); 9.323 + // V0: exception handler address of the caller 9.324 9.325 // only eax is valid at this time, all other registers have been destroyed by the call 9.326 9.327 // move result of call into correct register 9.328 __ move(handler_addr, V0); 9.329 - // restore exception oop in eax (required convention of exception handler) 9.330 - __ super_pop(exception_oop); 9.331 9.332 + // Restore exception oop to V0 (required convention of exception handler). 9.333 + __ move(exception_oop, exception_oop_callee_saved); 9.334 + 9.335 + // verify that there is really a valid exception in V0 9.336 __ verify_oop(exception_oop); 9.337 9.338 // get throwing pc (= return address). 9.339 - // edx has been destroyed by the call, so it must be set again 9.340 + // V1 has been destroyed by the call, so it must be set again 9.341 // the pop is also necessary to simulate the effect of a ret(0) 9.342 __ super_pop(exception_pc); 9.343 - // verify that that there is really a valid exception in eax 9.344 - __ verify_not_null_oop(exception_oop); 9.345 9.346 // continue at exception handler (return address removed) 9.347 // note: do *not* remove arguments when unwinding the 9.348 @@ -848,9 +810,9 @@ 9.349 // all arguments on the stack when entering the 9.350 // runtime to determine the exception handler 9.351 // (GC happens at call site with arguments!) 9.352 - // eax: exception oop 9.353 - // edx: throwing pc 9.354 - // ebx: exception handler 9.355 + // V0: exception oop 9.356 + // V1: throwing pc 9.357 + // T3: exception handler 9.358 __ jr(handler_addr); 9.359 __ delayed()->nop(); 9.360 } 9.361 @@ -867,9 +829,6 @@ 9.362 // Note: This number affects also the RT-Call in generate_handle_exception because 9.363 // the oop-map is shared for all calls. 9.364 9.365 - 9.366 - 9.367 - 9.368 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 9.369 assert(deopt_blob != NULL, "deoptimization blob must have been created"); 9.370 // assert(deopt_with_exception_entry_for_patch != NULL, 9.371 @@ -877,13 +836,9 @@ 9.372 9.373 //OopMap* oop_map = save_live_registers(sasm, num_rt_args); 9.374 OopMap* oop_map = save_live_registers(sasm, 0); 9.375 -#ifndef OPT_THREAD 9.376 const Register thread = T8; 9.377 // push java thread (becomes first argument of C function) 9.378 __ get_thread(thread); 9.379 -#else 9.380 - const Register thread = TREG; 9.381 -#endif 9.382 __ move(A0, thread); 9.383 9.384 9.385 @@ -922,9 +877,7 @@ 9.386 OopMapSet* oop_maps = new OopMapSet(); 9.387 oop_maps->add_gc_map(__ offset(), oop_map); 9.388 9.389 -#ifndef OPT_THREAD 9.390 __ get_thread(thread); 9.391 -#endif 9.392 9.393 __ ld_ptr (SP, thread, in_bytes(JavaThread::last_Java_sp_offset())); 9.394 __ reset_last_Java_frame(thread, true,true); 9.395 @@ -938,9 +891,8 @@ 9.396 __ delayed()->nop(); 9.397 // exception pending => remove activation and forward to exception handler 9.398 9.399 - __ bne(V0,R0, skip); 9.400 + __ bne(V0, R0, skip); 9.401 __ delayed()->nop(); 9.402 - // relocInfo::runtime_call_type); 9.403 __ jmp(Runtime1::entry_for(Runtime1::forward_exception_id), 9.404 relocInfo::runtime_call_type); 9.405 __ delayed()->nop(); 9.406 @@ -1039,40 +991,10 @@ 9.407 switch (id) { 9.408 case forward_exception_id: 9.409 { 9.410 - // we're handling an exception in the context of a compiled 9.411 - // frame. The registers have been saved in the standard 9.412 - // places. Perform an exception lookup in the caller and 9.413 - // dispatch to the handler if found. Otherwise unwind and 9.414 - // dispatch to the callers exception handler. 9.415 - 9.416 - const Register exception_oop = V0; 9.417 - const Register exception_pc = V1; 9.418 -#ifndef OPT_THREAD 9.419 - const Register thread = T8; 9.420 - __ get_thread(thread); 9.421 -#else 9.422 - const Register thread = TREG; 9.423 -#endif 9.424 - // load pending exception oop into eax 9.425 - __ ld_ptr(exception_oop, thread, in_bytes(Thread::pending_exception_offset())); 9.426 - // clear pending exception 9.427 - __ st_ptr(R0, thread, in_bytes(Thread::pending_exception_offset())); 9.428 - 9.429 - // load issuing PC (the return address for this stub) into V1 9.430 - __ ld_ptr(exception_pc, FP, 1*BytesPerWord); 9.431 - 9.432 - // make sure that the vm_results are cleared (may be unnecessary) 9.433 - __ st_ptr(R0, Address(thread, in_bytes(JavaThread::vm_result_offset()))); 9.434 - __ st_ptr(R0, Address(thread, in_bytes(JavaThread::vm_result_2_offset()))); 9.435 - 9.436 - // verify that that there is really a valid exception in eax 9.437 - __ verify_not_null_oop(exception_oop); 9.438 - 9.439 - 9.440 - oop_maps = new OopMapSet(); 9.441 - OopMap* oop_map = generate_oop_map(sasm, 0); 9.442 - generate_handle_exception(id, sasm); 9.443 - __ stop("should not reach here"); 9.444 + oop_maps = generate_handle_exception(id, sasm); 9.445 + __ leave(); 9.446 + __ jr(RA); 9.447 + __ delayed()->nop(); 9.448 } 9.449 break; 9.450 9.451 @@ -1080,12 +1002,7 @@ 9.452 case fast_new_instance_id: 9.453 case fast_new_instance_init_check_id: 9.454 { 9.455 - // i use T4 as klass register, V0 as result register. MUST accord with NewInstanceStub::emit_code 9.456 -#ifndef _LP64 9.457 - Register klass = T4; // Incoming 9.458 -#else 9.459 Register klass = A4; // Incoming 9.460 -#endif 9.461 Register obj = V0; // Result 9.462 9.463 if (id == new_instance_id) { 9.464 @@ -1106,7 +1023,7 @@ 9.465 assert_different_registers(klass, obj, obj_size, t1, t2); 9.466 if (id == fast_new_instance_init_check_id) { 9.467 // make sure the klass is initialized 9.468 - __ lw(AT, klass, in_bytes(InstanceKlass::init_state_offset())); 9.469 + __ ld_ptr(AT, Address(klass, in_bytes(InstanceKlass::init_state_offset()))); 9.470 __ move(t1, InstanceKlass::fully_initialized); 9.471 __ bne(AT, t1, slow_path); 9.472 __ delayed()->nop(); 9.473 @@ -1180,11 +1097,13 @@ 9.474 #else 9.475 Register bci = A5; 9.476 #endif 9.477 + Register method = AT; 9.478 __ enter(); 9.479 OopMap* map = save_live_registers(sasm, 0); 9.480 // Retrieve bci 9.481 __ lw(bci, Address(FP, 2*BytesPerWord));// FIXME:wuhui.ebp==?? 9.482 - int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci); 9.483 + __ ld(method, Address(FP, 3*BytesPerWord)); 9.484 + int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); 9.485 oop_maps = new OopMapSet(); 9.486 oop_maps->add_gc_map(call_offset, map); 9.487 restore_live_registers(sasm); 9.488 @@ -1379,7 +1298,8 @@ 9.489 9.490 // case range_check_failed_id: 9.491 case throw_range_check_failed_id: 9.492 - { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); 9.493 + { 9.494 + StubFrame f(sasm, "range_check_failed", dont_gc_arguments); 9.495 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, 9.496 throw_range_check_exception),true); 9.497 } 9.498 @@ -1402,42 +1322,40 @@ 9.499 break; 9.500 9.501 case throw_null_pointer_exception_id: 9.502 - { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); 9.503 + { 9.504 + StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); 9.505 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, 9.506 throw_null_pointer_exception),false); 9.507 } 9.508 break; 9.509 9.510 - case handle_exception_nofpu_id: 9.511 + case handle_exception_nofpu_id: 9.512 save_fpu_registers = false; 9.513 // fall through 9.514 case handle_exception_id: 9.515 { 9.516 - 9.517 - 9.518 StubFrame f(sasm, "handle_exception", dont_gc_arguments); 9.519 - 9.520 //OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers); 9.521 oop_maps = generate_handle_exception(id, sasm); 9.522 } 9.523 break; 9.524 - case handle_exception_from_callee_id: 9.525 - { 9.526 - StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); 9.527 - oop_maps = generate_handle_exception(id, sasm); 9.528 - } 9.529 - break; 9.530 + case handle_exception_from_callee_id: 9.531 + { 9.532 + StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); 9.533 + oop_maps = generate_handle_exception(id, sasm); 9.534 + } 9.535 + break; 9.536 case unwind_exception_id: 9.537 { 9.538 __ set_info("unwind_exception", dont_gc_arguments); 9.539 - 9.540 generate_unwind_exception(sasm); 9.541 } 9.542 break; 9.543 9.544 9.545 case throw_array_store_exception_id: 9.546 - { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); 9.547 + { 9.548 + StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); 9.549 // tos + 0: link 9.550 // + 1: return address 9.551 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, 9.552 @@ -1446,17 +1364,18 @@ 9.553 break; 9.554 9.555 case throw_class_cast_exception_id: 9.556 - { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); 9.557 + { 9.558 + StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); 9.559 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, 9.560 - throw_class_cast_exception), V0); 9.561 + throw_class_cast_exception), true); 9.562 } 9.563 break; 9.564 9.565 case throw_incompatible_class_change_error_id: 9.566 { 9.567 - StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); 9.568 - oop_maps = generate_exception_throw(sasm, 9.569 - CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); 9.570 + StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); 9.571 + oop_maps = generate_exception_throw(sasm, 9.572 + CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); 9.573 } 9.574 break; 9.575 9.576 @@ -1600,12 +1519,21 @@ 9.577 oop_maps->add_gc_map(call_offset, map); 9.578 restore_live_registers(sasm); 9.579 }*/ 9.580 - case load_mirror_patching_id: 9.581 - { 9.582 - StubFrame f(sasm, "load_mirror_patching" , dont_gc_arguments); 9.583 - oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching)); 9.584 - } 9.585 + case load_mirror_patching_id: 9.586 + { 9.587 + StubFrame f(sasm, "load_mirror_patching" , dont_gc_arguments); 9.588 + oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching)); 9.589 + } 9.590 break; 9.591 + 9.592 + case load_appendix_patching_id: 9.593 + { 9.594 + StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments); 9.595 + // we should set up register map 9.596 + oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching)); 9.597 + } 9.598 + break; 9.599 + 9.600 case dtrace_object_alloc_id: 9.601 { 9.602 // V0:object 9.603 @@ -1615,6 +1543,7 @@ 9.604 save_live_registers(sasm, 0); 9.605 9.606 __ push_reg(V0); 9.607 + __ move(A0, V0); 9.608 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc), 9.609 relocInfo::runtime_call_type); 9.610 __ super_pop(V0); 9.611 @@ -1622,12 +1551,51 @@ 9.612 restore_live_registers(sasm); 9.613 } 9.614 break; 9.615 + 9.616 case fpu2long_stub_id: 9.617 { 9.618 - //FIXME, I hava no idea how to port this 9.619 + //FIXME, I hava no idea how to port this 9.620 + //tty->print_cr("fpu2long_stub_id unimplemented yet!"); 9.621 } 9.622 + break; 9.623 + 9.624 + case deoptimize_id: 9.625 + { 9.626 + StubFrame f(sasm, "deoptimize", dont_gc_arguments); 9.627 + const int num_rt_args = 1; // thread 9.628 + OopMap* oop_map = save_live_registers(sasm, num_rt_args); 9.629 + int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize)); 9.630 + oop_maps = new OopMapSet(); 9.631 + oop_maps->add_gc_map(call_offset, oop_map); 9.632 + restore_live_registers(sasm); 9.633 + DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 9.634 + assert(deopt_blob != NULL, "deoptimization blob must have been created"); 9.635 + __ leave(); 9.636 + __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type); 9.637 + } 9.638 + break; 9.639 + 9.640 + case predicate_failed_trap_id: 9.641 + { 9.642 + StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments); 9.643 + 9.644 + OopMap* map = save_live_registers(sasm, 1); 9.645 + 9.646 + int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap)); 9.647 + oop_maps = new OopMapSet(); 9.648 + oop_maps->add_gc_map(call_offset, map); 9.649 + restore_live_registers(sasm); 9.650 + __ leave(); 9.651 + DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 9.652 + assert(deopt_blob != NULL, "deoptimization blob must have been created"); 9.653 + 9.654 + __ jmp(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type); 9.655 + } 9.656 + break; 9.657 + 9.658 default: 9.659 - { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); 9.660 + { 9.661 + StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); 9.662 __ move(A1, (int)id); 9.663 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), A1); 9.664 __ should_not_reach_here();
10.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp Sat Jan 06 16:30:58 2018 +0800 10.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp Thu May 24 19:49:50 2018 +0800 10.3 @@ -818,6 +818,28 @@ 10.4 jr(T9); 10.5 nop(); 10.6 } 10.7 +void MacroAssembler::mov_metadata(Address dst, Metadata* obj) { 10.8 + int oop_index; 10.9 + if (obj) { 10.10 + oop_index = oop_recorder()->find_index(obj); 10.11 + } else { 10.12 + oop_index = oop_recorder()->allocate_metadata_index(obj); 10.13 + } 10.14 + relocate(metadata_Relocation::spec(oop_index)); 10.15 + patchable_set48(AT, (long)obj); 10.16 + sd(AT, dst); 10.17 +} 10.18 + 10.19 +void MacroAssembler::mov_metadata(Register dst, Metadata* obj) { 10.20 + int oop_index; 10.21 + if (obj) { 10.22 + oop_index = oop_recorder()->find_index(obj); 10.23 + } else { 10.24 + oop_index = oop_recorder()->allocate_metadata_index(obj); 10.25 + } 10.26 + relocate(metadata_Relocation::spec(oop_index)); 10.27 + patchable_set48(dst, (long)obj); 10.28 +} 10.29 10.30 void MacroAssembler::call(address entry) { 10.31 // c/c++ code assume T9 is entry point, so we just always move entry to t9 10.32 @@ -870,7 +892,7 @@ 10.33 assert(entry != NULL, "call most probably wrong"); 10.34 InstructionMark im(this); 10.35 relocate(rh); 10.36 - patchable_call(entry); 10.37 + patchable_call(entry); 10.38 } 10.39 10.40 void MacroAssembler::c2bool(Register r) { 10.41 @@ -1238,7 +1260,6 @@ 10.42 move(A0, java_thread); 10.43 call(entry_point, relocInfo::runtime_call_type); 10.44 delayed()->nop(); 10.45 - //MacroAssembler::call_VM_leaf_base(entry_point, number_of_arguments); 10.46 10.47 // restore the thread (cannot use the pushed argument since arguments 10.48 // may be overwritten by C code generated by an optimizing compiler);
11.1 --- a/src/cpu/mips/vm/macroAssembler_mips.hpp Sat Jan 06 16:30:58 2018 +0800 11.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.hpp Thu May 24 19:49:50 2018 +0800 11.3 @@ -712,6 +712,8 @@ 11.4 void move(Register rd, Register rs) { add(rd, rs, R0); } 11.5 #endif 11.6 void dmove(Register rd, Register rs) { dadd(rd, rs, R0); } 11.7 + void mov_metadata(Register dst, Metadata* obj); 11.8 + void mov_metadata(Address dst, Metadata* obj); 11.9 11.10 11.11 #ifndef PRODUCT
12.1 --- a/src/cpu/mips/vm/mips_64.ad Sat Jan 06 16:30:58 2018 +0800 12.2 +++ b/src/cpu/mips/vm/mips_64.ad Thu May 24 19:49:50 2018 +0800 12.3 @@ -655,7 +655,7 @@ 12.4 int offs = offset - br_size + 4; 12.5 // To be conservative on MIPS 12.6 const int safety_zone = 3 * BytesPerInstWord; 12.7 - return Assembler::is_simm16((offs<0 ? offs-safety_zone : offs+safety_zone) >> 2); 12.8 + return Assembler::is_simm16((offset<0 ? offset-safety_zone : offset+safety_zone) >> 2); 12.9 } 12.10 12.11
13.1 --- a/src/cpu/mips/vm/nativeInst_mips.cpp Sat Jan 06 16:30:58 2018 +0800 13.2 +++ b/src/cpu/mips/vm/nativeInst_mips.cpp Thu May 24 19:49:50 2018 +0800 13.3 @@ -203,6 +203,18 @@ 13.4 return; 13.5 } 13.6 13.7 + //daddiu dst, R0, imm16 13.8 + //nop 13.9 + //nop 13.10 + //nop 13.11 + if ( is_op(Assembler::daddiu_op) && 13.12 + nativeInstruction_at(addr_at(4))->is_nop() && 13.13 + nativeInstruction_at(addr_at(8))->is_nop() && 13.14 + nativeInstruction_at(addr_at(12))->is_nop() && 13.15 + is_special_op(int_at(16), Assembler::jr_op) ) { 13.16 + return; 13.17 + } 13.18 + 13.19 //lui dst, imm16 13.20 //ori dst, dst, imm16 13.21 //nop 13.22 @@ -728,7 +740,7 @@ 13.23 __ lui(T9, Assembler::split_high((int)entry)); 13.24 __ addiu(T9, T9, Assembler::split_low((int)entry)); 13.25 #else 13.26 - __ patchable_set48(T9, (long)entry); 13.27 + __ li48(T9, (long)entry); 13.28 #endif 13.29 __ jalr (); 13.30 __ delayed()->nop(); 13.31 @@ -1099,6 +1111,7 @@ 13.32 case Assembler::lh_op: 13.33 case Assembler::lhu_op: 13.34 case Assembler::lw_op: 13.35 + case Assembler::lwu_op: 13.36 LP64_ONLY(case Assembler::ld_op:) 13.37 case Assembler::lwc1_op: 13.38 LP64_ONLY(case Assembler::ldc1_op:) 13.39 @@ -1579,7 +1592,7 @@ 13.40 "note::Runtime1::patch_code uses NativeCall::instruction_size"); 13.41 13.42 /* 2013/6/13 Jin: ensure 100% atomicity */ 13.43 - guarantee(!os::is_MP() || (((long)instr_addr % BytesPerWord) == 0), "destination must be aligned for SD"); 13.44 + //guarantee(!os::is_MP() || (((long)instr_addr % BytesPerWord) == 0), "destination must be aligned for SD"); 13.45 13.46 int *p = (int *)instr_addr; 13.47 int jr_word = p[4]; 13.48 @@ -1594,7 +1607,7 @@ 13.49 /* 2013/11/5 Jin: ensure 100% atomicity. 13.50 * The destination is fixed and can be cached in JavaThread. 13.51 */ 13.52 - guarantee(!os::is_MP() || (((long)verified_entry % BytesPerWord) == 0), "destination must be aligned for SD"); 13.53 + //guarantee(!os::is_MP() || (((long)verified_entry % BytesPerWord) == 0), "destination must be aligned for SD"); 13.54 13.55 int code_buffer[4]; 13.56
14.1 --- a/src/cpu/mips/vm/nativeInst_mips.hpp Sat Jan 06 16:30:58 2018 +0800 14.2 +++ b/src/cpu/mips/vm/nativeInst_mips.hpp Thu May 24 19:49:50 2018 +0800 14.3 @@ -142,17 +142,17 @@ 14.4 // lui rt, imm16 14.5 // addiu rt, rt, imm16 14.6 // jalr rt 14.7 -// nop 14.8 +// nop 14.9 // 14.10 // 64 bits: 14.11 -// lui rd, imm(63...48); 14.12 -// ori rd, rd, imm(47...32); 14.13 -// dsll rd, rd, 16; 14.14 -// ori rd, rd, imm(31...16); 14.15 -// dsll rd, rd, 16; 14.16 -// ori rd, rd, imm(15...0); 14.17 -// jalr rd 14.18 -// nop 14.19 +// lui rd, imm(63...48); 14.20 +// ori rd, rd, imm(47...32); 14.21 +// dsll rd, rd, 16; 14.22 +// ori rd, rd, imm(31...16); 14.23 +// dsll rd, rd, 16; 14.24 +// ori rd, rd, imm(15...0); 14.25 +// jalr rd 14.26 +// nop 14.27 // 14.28 14.29 // we just consider the above for instruction as one call instruction
15.1 --- a/src/cpu/mips/vm/relocInfo_mips.cpp Sat Jan 06 16:30:58 2018 +0800 15.2 +++ b/src/cpu/mips/vm/relocInfo_mips.cpp Thu May 24 19:49:50 2018 +0800 15.3 @@ -114,7 +114,7 @@ 15.4 15.5 15.6 address* Relocation::pd_address_in_code() { 15.7 - //ShouldNotReachHere(); 15.8 +// ShouldNotReachHere(); 15.9 return (address*)addr(); 15.10 } 15.11 15.12 @@ -127,11 +127,13 @@ 15.13 15.14 15.15 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { 15.16 -// Unimplemented(); 15.17 + //Unimplemented(); 15.18 + //tty->print_cr("%s not finished yet!!!", __func__); 15.19 } 15.20 15.21 void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { 15.22 -// Unimplemented(); 15.23 + //Unimplemented(); 15.24 + //tty->print_cr("%s not finished yet!!!", __func__); 15.25 } 15.26 15.27 void internal_pc_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
16.1 --- a/src/cpu/mips/vm/runtime_mips_64.cpp Sat Jan 06 16:30:58 2018 +0800 16.2 +++ b/src/cpu/mips/vm/runtime_mips_64.cpp Thu May 24 19:49:50 2018 +0800 16.3 @@ -87,7 +87,6 @@ 16.4 CodeBuffer buffer("exception_blob", 5120, 5120); 16.5 MacroAssembler* masm = new MacroAssembler(&buffer); 16.6 16.7 -// OopMapSet *oop_maps = new OopMapSet(); 16.8 16.9 address start = __ pc(); 16.10 16.11 @@ -154,13 +153,9 @@ 16.12 // Pop self-frame. 16.13 __ leave(); // Epilog! 16.14 16.15 - // rax,: exception handler for given <exception oop/exception pc> 16.16 + // V0: exception handler 16.17 16.18 - // We have a handler in rax, (could be deopt blob) 16.19 - // rdx - throwing pc, deopt blob will need it. 16.20 - /* FIXME: rdx? */ 16.21 - 16.22 - // rcx contains handler address 16.23 + // We have a handler in V0, (could be deopt blob) 16.24 __ move(T9, V0); 16.25 16.26 #ifndef OPT_THREAD
17.1 --- a/src/share/vm/c1/c1_LIR.cpp Sat Jan 06 16:30:58 2018 +0800 17.2 +++ b/src/share/vm/c1/c1_LIR.cpp Thu May 24 19:49:50 2018 +0800 17.3 @@ -392,8 +392,7 @@ 17.4 _stub(NULL) { 17.5 } 17.6 17.7 -#endif 17.8 - 17.9 +#endif 17.10 void LIR_OpBranch::change_block(BlockBegin* b) { 17.11 assert(_block != NULL, "must have old block"); 17.12 assert(_block->label() == label(), "must be equal"); 17.13 @@ -1342,7 +1341,10 @@ 17.14 } 17.15 17.16 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 17.17 -#ifndef MIPS64 17.18 +#ifdef MIPS64 17.19 + add(base, offset, base); 17.20 + offset = 0; 17.21 +#endif 17.22 append(new LIR_Op1( 17.23 lir_move, 17.24 LIR_OprFact::address(new LIR_Address(base, offset, type)), 17.25 @@ -1350,16 +1352,6 @@ 17.26 type, 17.27 patch_code, 17.28 info, lir_move_volatile)); 17.29 -#else 17.30 - add(base, offset, base); 17.31 - append(new LIR_Op1( 17.32 - lir_move, 17.33 - LIR_OprFact::address(new LIR_Address(base, 0, type)), 17.34 - dst, 17.35 - type, 17.36 - patch_code, 17.37 - info, lir_move_volatile)); 17.38 -#endif 17.39 } 17.40 17.41 17.42 @@ -1415,7 +1407,10 @@ 17.43 } 17.44 17.45 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 17.46 -#ifndef MIPS64 17.47 +#ifdef MIPS64 17.48 + add(base, offset, base); 17.49 + offset = 0; 17.50 +#endif 17.51 append(new LIR_Op1( 17.52 lir_move, 17.53 src, 17.54 @@ -1423,18 +1418,6 @@ 17.55 type, 17.56 patch_code, 17.57 info, lir_move_volatile)); 17.58 -#else 17.59 - add(base, offset, base); 17.60 - append(new LIR_Op1( 17.61 - lir_move, 17.62 - src, 17.63 - LIR_OprFact::address(new LIR_Address(base, 0, type)), 17.64 - type, 17.65 - patch_code, 17.66 - info, lir_move_volatile)); 17.67 - 17.68 -#endif 17.69 - 17.70 } 17.71 17.72 #ifdef MIPS64 17.73 @@ -1503,18 +1486,6 @@ 17.74 info)); 17.75 } 17.76 17.77 -void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 17.78 - if (deoptimize_on_null) { 17.79 - // Emit an explicit null check and deoptimize if opr is null 17.80 - CodeStub* deopt = new DeoptimizeStub(info); 17.81 - cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 17.82 - branch(lir_cond_equal, T_OBJECT, deopt); 17.83 - } else { 17.84 - // Emit an implicit null check 17.85 - append(new LIR_Op1(lir_null_check, opr, info)); 17.86 - } 17.87 -} 17.88 - 17.89 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 17.90 append(new LIR_Op2( 17.91 lir_cmp, 17.92 @@ -1523,7 +1494,26 @@ 17.93 LIR_OprFact::address(addr), 17.94 info)); 17.95 } 17.96 +#endif 17.97 17.98 +void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 17.99 + if (deoptimize_on_null) { 17.100 + // Emit an explicit null check and deoptimize if opr is null 17.101 + CodeStub* deopt = new DeoptimizeStub(info); 17.102 +#ifndef MIPS64 17.103 + cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 17.104 + branch(lir_cond_equal, T_OBJECT, deopt); 17.105 +#else 17.106 + null_check_for_branch(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 17.107 + branch(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL), T_OBJECT, deopt); 17.108 +#endif 17.109 + } else { 17.110 + // Emit an implicit null check 17.111 + append(new LIR_Op1(lir_null_check, opr, info)); 17.112 + } 17.113 +} 17.114 + 17.115 +#ifndef MIPS64 17.116 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 17.117 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 17.118 append(new LIR_OpAllocObj( 17.119 @@ -1552,7 +1542,7 @@ 17.120 stub)); 17.121 } 17.122 #else 17.123 - void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6, 17.124 +void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6, 17.125 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 17.126 append(new LIR_OpAllocObj( 17.127 klass, 17.128 @@ -1674,6 +1664,7 @@ 17.129 append(c); 17.130 } 17.131 17.132 + 17.133 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 17.134 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 17.135 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 17.136 @@ -1685,6 +1676,7 @@ 17.137 append(c); 17.138 } 17.139 17.140 + 17.141 #ifndef MIPS64 17.142 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 17.143 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
18.1 --- a/src/share/vm/c1/c1_LIRGenerator.cpp Sat Jan 06 16:30:58 2018 +0800 18.2 +++ b/src/share/vm/c1/c1_LIRGenerator.cpp Thu May 24 19:49:50 2018 +0800 18.3 @@ -1,5 +1,5 @@ 18.4 /* 18.5 - * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved. 18.6 + * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved. 18.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 18.8 * 18.9 * This code is free software; you can redistribute it and/or modify it 18.10 @@ -312,12 +312,12 @@ 18.11 void LIRGenerator::init() { 18.12 _bs = Universe::heap()->barrier_set(); 18.13 #ifdef MIPS64 18.14 - assert(_bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind"); 18.15 - CardTableModRefBS* ct = (CardTableModRefBS*)_bs; 18.16 - assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); 18.17 - //_card_table_base = new LIR_Const((intptr_t)ct->byte_map_base); 18.18 - // //FIXME, untested in 32bit. by aoqi 18.19 - _card_table_base = new LIR_Const(ct->byte_map_base); 18.20 + assert(_bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind"); 18.21 + CardTableModRefBS* ct = (CardTableModRefBS*)_bs; 18.22 + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); 18.23 + //_card_table_base = new LIR_Const((intptr_t)ct->byte_map_base); 18.24 + // //FIXME, untested in 32bit. by aoqi 18.25 + _card_table_base = new LIR_Const(ct->byte_map_base); 18.26 #endif 18.27 } 18.28 18.29 @@ -528,10 +528,10 @@ 18.30 cmp_mem_int(lir_cond_belowEqual, buffer, java_nio_Buffer::limit_offset(), index->as_jint(), info); 18.31 __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch 18.32 #else 18.33 - LIR_Opr left = LIR_OprFact::address(new LIR_Address(buffer, java_nio_Buffer::limit_offset(),T_INT)); 18.34 - LIR_Opr right = LIR_OprFact::intConst(index->as_jint()); 18.35 - __ null_check_for_branch(lir_cond_belowEqual, left, right, info); 18.36 - __ branch(lir_cond_belowEqual,left, right ,T_INT, stub); // forward branch 18.37 + LIR_Opr left = LIR_OprFact::address(new LIR_Address(buffer, java_nio_Buffer::limit_offset(),T_INT)); 18.38 + LIR_Opr right = LIR_OprFact::intConst(index->as_jint()); 18.39 + __ null_check_for_branch(lir_cond_belowEqual, left, right, info); 18.40 + __ branch(lir_cond_belowEqual,left, right ,T_INT, stub); // forward branch 18.41 #endif 18.42 } else { 18.43 #ifndef MIPS64 18.44 @@ -716,7 +716,8 @@ 18.45 #ifndef MIPS64 18.46 void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, bool is_unresolved, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info) { 18.47 #else 18.48 -void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, bool is_unresolved, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr scratch5, LIR_Opr scratch6, LIR_Opr klass_reg, CodeEmitInfo* info) { 18.49 +void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, bool is_unresolved, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, 18.50 + LIR_Opr scratch4, LIR_Opr scratch5, LIR_Opr scratch6,LIR_Opr klass_reg, CodeEmitInfo* info) { 18.51 #endif 18.52 klass2reg_with_patching(klass_reg, klass, info, is_unresolved); 18.53 // If klass is not loaded we do not know if the klass has finalizers: 18.54 @@ -1030,50 +1031,48 @@ 18.55 } 18.56 #else 18.57 void LIRGenerator::profile_branch(If* if_instr, If::Condition cond , LIR_Opr left, LIR_Opr right) { 18.58 - if (if_instr->should_profile()) { 18.59 - ciMethod* method = if_instr->profiled_method(); 18.60 - assert(method != NULL, "method should be set if branch is profiled"); 18.61 - ciMethodData* md = method->method_data_or_null(); 18.62 - if (md == NULL) { 18.63 - bailout("out of memory building methodDataOop"); 18.64 - return; 18.65 - } 18.66 - ciProfileData* data = md->bci_to_data(if_instr->profiled_bci()); 18.67 - assert(data != NULL, "must have profiling data"); 18.68 - assert(data->is_BranchData(), "need BranchData for two-way branches"); 18.69 - int taken_count_offset = md->byte_offset_of_slot(data, BranchData::taken_offset()); 18.70 - int not_taken_count_offset = md->byte_offset_of_slot(data, BranchData::not_taken_offset()); 18.71 - if (if_instr->is_swapped()) { 18.72 - int t = taken_count_offset; 18.73 - taken_count_offset = not_taken_count_offset; 18.74 - not_taken_count_offset = t; 18.75 - } 18.76 - LIR_Opr md_reg = new_register(T_METADATA); 18.77 - __ metadata2reg(md->constant_encoding(), md_reg); 18.78 - //__ move(LIR_OprFact::oopConst(md->constant_encoding()), md_reg); 18.79 - LIR_Opr data_offset_reg = new_pointer_register(); 18.80 - 18.81 - LIR_Opr opr1 = LIR_OprFact::intConst(taken_count_offset); 18.82 - LIR_Opr opr2 = LIR_OprFact::intConst(not_taken_count_offset); 18.83 - LabelObj* skip = new LabelObj(); 18.84 - 18.85 - __ move(opr1, data_offset_reg); 18.86 - __ branch( lir_cond(cond), left, right, skip->label()); 18.87 - __ move(opr2, data_offset_reg); 18.88 - __ branch_destination(skip->label()); 18.89 - 18.90 - LIR_Opr data_reg = new_pointer_register(); 18.91 - LIR_Opr tmp_reg = new_pointer_register(); 18.92 - // LIR_Address* data_addr = new LIR_Address(md_reg, data_offset_reg, T_INT); 18.93 - __ move(data_offset_reg, tmp_reg); 18.94 - __ add(tmp_reg, md_reg, tmp_reg); 18.95 - LIR_Address* data_addr = new LIR_Address(tmp_reg, 0, T_INT); 18.96 - __ move(LIR_OprFact::address(data_addr), data_reg); 18.97 - LIR_Address* fake_incr_value = new LIR_Address(data_reg, DataLayout::counter_increment, T_INT); 18.98 - // Use leal instead of add to avoid destroying condition codes on x86 18.99 - __ leal(LIR_OprFact::address(fake_incr_value), data_reg); 18.100 - __ move(data_reg, LIR_OprFact::address(data_addr)); 18.101 - } 18.102 + if (if_instr->should_profile()) { 18.103 + ciMethod* method = if_instr->profiled_method(); 18.104 + assert(method != NULL, "method should be set if branch is profiled"); 18.105 + ciMethodData* md = method->method_data_or_null(); 18.106 + if (md == NULL) { 18.107 + bailout("out of memory building methodDataOop"); 18.108 + return; 18.109 + } 18.110 + ciProfileData* data = md->bci_to_data(if_instr->profiled_bci()); 18.111 + assert(data != NULL, "must have profiling data"); 18.112 + assert(data->is_BranchData(), "need BranchData for two-way branches"); 18.113 + int taken_count_offset = md->byte_offset_of_slot(data, BranchData::taken_offset()); 18.114 + int not_taken_count_offset = md->byte_offset_of_slot(data, BranchData::not_taken_offset()); 18.115 + if (if_instr->is_swapped()) { 18.116 + int t = taken_count_offset; 18.117 + taken_count_offset = not_taken_count_offset; 18.118 + not_taken_count_offset = t; 18.119 + } 18.120 + LIR_Opr md_reg = new_register(T_METADATA); 18.121 + __ metadata2reg(md->constant_encoding(), md_reg); 18.122 + LIR_Opr data_offset_reg = new_pointer_register(); 18.123 + 18.124 + LIR_Opr opr1 = LIR_OprFact::intptrConst(taken_count_offset); 18.125 + LIR_Opr opr2 = LIR_OprFact::intptrConst(not_taken_count_offset); 18.126 + LabelObj* skip = new LabelObj(); 18.127 + 18.128 + __ move(opr1, data_offset_reg); 18.129 + __ branch( lir_cond(cond), left, right, skip->label()); 18.130 + __ move(opr2, data_offset_reg); 18.131 + __ branch_destination(skip->label()); 18.132 + 18.133 + LIR_Opr data_reg = new_pointer_register(); 18.134 + LIR_Opr tmp_reg = new_pointer_register(); 18.135 + __ move(data_offset_reg, tmp_reg); 18.136 + __ add(tmp_reg, md_reg, tmp_reg); 18.137 + LIR_Address* data_addr = new LIR_Address(tmp_reg, 0, data_reg->type()); 18.138 + __ move(LIR_OprFact::address(data_addr), data_reg); 18.139 + LIR_Address* fake_incr_value = new LIR_Address(data_reg, DataLayout::counter_increment, T_INT); 18.140 + // Use leal instead of add to avoid destroying condition codes on x86 18.141 + __ leal(LIR_OprFact::address(fake_incr_value), data_reg); 18.142 + __ move(data_reg, LIR_OprFact::address(data_addr)); 18.143 + } 18.144 } 18.145 18.146 #endif 18.147 @@ -1996,11 +1995,11 @@ 18.148 cmp_mem_int(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), index.result()->as_jint(), info); 18.149 __ branch(lir_cond_belowEqual, T_INT, stub); 18.150 #else 18.151 - LIR_Opr left = LIR_OprFact::address(new LIR_Address( buf.result(), 18.152 + LIR_Opr left = LIR_OprFact::address(new LIR_Address( buf.result(), 18.153 java_nio_Buffer::limit_offset(),T_INT)); 18.154 - LIR_Opr right = LIR_OprFact::intConst(index.result()->as_jint()); 18.155 + LIR_Opr right = LIR_OprFact::intConst(index.result()->as_jint()); 18.156 __ null_check_for_branch(lir_cond_belowEqual, left, right, info); 18.157 - __ branch(lir_cond_belowEqual,left, right ,T_INT, stub); // forward branch 18.158 + __ branch(lir_cond_belowEqual,left, right ,T_INT, stub); // forward branch 18.159 18.160 #endif 18.161 } else { 18.162 @@ -2009,10 +2008,10 @@ 18.163 java_nio_Buffer::limit_offset(), T_INT, info); 18.164 __ branch(lir_cond_aboveEqual, T_INT, stub); 18.165 #else 18.166 - LIR_Opr right = LIR_OprFact::address(new LIR_Address( buf.result(), java_nio_Buffer::limit_offset(),T_INT)); 18.167 - LIR_Opr left = index.result(); 18.168 + LIR_Opr right = LIR_OprFact::address(new LIR_Address( buf.result(), java_nio_Buffer::limit_offset(),T_INT)); 18.169 + LIR_Opr left = index.result(); 18.170 __ null_check_for_branch(lir_cond_aboveEqual, left, right, info); 18.171 - __ branch(lir_cond_aboveEqual, left, right , T_INT, stub); // forward branch 18.172 + __ branch(lir_cond_aboveEqual, left, right , T_INT, stub); // forward branch 18.173 #endif 18.174 } 18.175 __ move(index.result(), result); 18.176 @@ -2093,8 +2092,8 @@ 18.177 #ifndef MIPS64 18.178 __ branch(lir_cond_always, T_ILLEGAL, new RangeCheckStub(range_check_info, index.result())); 18.179 #else 18.180 - tty->print_cr("LIRGenerator::do_LoadIndexed(LoadIndexed* x) unimplemented yet!"); 18.181 - Unimplemented(); 18.182 + tty->print_cr("LIRGenerator::do_LoadIndexed(LoadIndexed* x) unimplemented yet!"); 18.183 + Unimplemented(); 18.184 #endif 18.185 } else if (use_length) { 18.186 // TODO: use a (modified) version of array_range_check that does not require a 18.187 @@ -2826,7 +2825,6 @@ 18.188 } 18.189 LIR_Opr md_reg = new_register(T_METADATA); 18.190 __ metadata2reg(md->constant_encoding(), md_reg); 18.191 - 18.192 increment_counter(new LIR_Address(md_reg, offset, 18.193 NOT_LP64(T_INT) LP64_ONLY(T_LONG)), DataLayout::counter_increment); 18.194 }
19.1 --- a/src/share/vm/c1/c1_Runtime1.cpp Sat Jan 06 16:30:58 2018 +0800 19.2 +++ b/src/share/vm/c1/c1_Runtime1.cpp Thu May 24 19:49:50 2018 +0800 19.3 @@ -979,27 +979,9 @@ 19.4 19.5 address stub_location = caller_frame.pc() + PatchingStub::patch_info_offset(); 19.6 19.7 -#if defined(MIPS32) && defined(_LP64) 19.8 -/* Jin: In MIPS64, byte_skip is much larger than that in X86. It can not be contained in a byte: 19.9 - * int bc = 0x20; 19.10 - * int bs = 0x190; 19.11 - * int bi = 0x1b0; 19.12 - * 19.13 - * To minimize the modification of share codes, the values are decreased 4 times when generated. 19.14 - * See [mips/c1_CodeStubs_mips.cpp 307] PatchingStub::emit_code(). 19.15 - */ 19.16 - int bc = *(unsigned char*) (stub_location - 1) * 4; 19.17 - int bs = *(unsigned char*) (stub_location - 2) * 4; 19.18 - int bi = *(unsigned char*) (stub_location - 3) * 4; 19.19 - 19.20 - int *byte_count = &bc; 19.21 - int *byte_skip = &bs; 19.22 - int *being_initialized_entry_offset = &bi; 19.23 -#else 19.24 unsigned char* byte_count = (unsigned char*) (stub_location - 1); 19.25 unsigned char* byte_skip = (unsigned char*) (stub_location - 2); 19.26 unsigned char* being_initialized_entry_offset = (unsigned char*) (stub_location - 3); 19.27 -#endif 19.28 address copy_buff = stub_location - *byte_skip - *byte_count; 19.29 address being_initialized_entry = stub_location - *being_initialized_entry_offset; 19.30 19.31 @@ -1017,7 +999,7 @@ 19.32 map->print(); 19.33 tty->cr(); 19.34 19.35 - Disassembler::decode(copy_buff, copy_buff + *byte_count, tty); 19.36 + Disassembler::decode(copy_buff - *byte_count, copy_buff + *byte_count, tty); 19.37 } 19.38 // depending on the code below, do_patch says whether to copy the patch body back into the nmethod 19.39 bool do_patch = true;
