src/cpu/mips/vm/c1_LinearScan_mips.hpp

Thu, 24 May 2018 19:49:50 +0800

author
aoqi
date
Thu, 24 May 2018 19:49:50 +0800
changeset 8865
ffcdff41a92f
parent 6880
52ea28d233d2
child 9126
bc5b8e3dcb6b
permissions
-rw-r--r--

some C1 fix
Contributed-by: chenhaoxuan, zhaixiang, aoqi

     1 /*
     2  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     8  * published by the Free Software Foundation.
     9  *
    10  * This code is distributed in the hope that it will be useful, but WITHOUT
    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    13  * version 2 for more details (a copy is included in the LICENSE file that
    14  * accompanied this code).
    15  *
    16  * You should have received a copy of the GNU General Public License version
    17  * 2 along with this work; if not, write to the Free Software Foundation,
    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    19  *
    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    23  *
    24  */
    26 #ifndef CPU_MIPS_VM_C1_LINEARSCAN_MIPS_HPP
    27 #define CPU_MIPS_VM_C1_LINEARSCAN_MIPS_HPP
    29 inline bool LinearScan::is_processed_reg_num(int reg_num) {
    30   return reg_num < 26 || reg_num > 30;
    31 }
    33 inline int LinearScan::num_physical_regs(BasicType type) {
    34   if (type == T_LONG || type== T_DOUBLE || type == T_FLOAT) {
    35     return 2;
    36   }
    37   return 1;
    38 }
    41 inline bool LinearScan::requires_adjacent_regs(BasicType type) {
    42   return type == T_FLOAT || type == T_DOUBLE;
    43 }
    45 inline bool LinearScan::is_caller_save(int assigned_reg) {
    46   assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers");
    47   // return true; // no callee-saved registers on Intel
    48   //FIXME, here, MIPS indeed got callee-saved registers
    49   return true;
    50 }
    53 inline void LinearScan::pd_add_temps(LIR_Op* op) {
    54 }
    57 // Implementation of LinearScanWalker
    59 inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
    60   if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) {
    61     assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only");
    62     _first_reg = pd_first_callee_saved_reg;
    63     _last_reg = pd_last_callee_saved_reg;
    64     return true;
    65   } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || cur->type() == T_METADATA) {
    66 #ifdef _LP64
    67     _first_reg = 12;  /* From T0 */
    68 #else
    69     _first_reg = 8;    /* From T0 */
    70 #endif
    71     _last_reg = pd_last_allocatable_cpu_reg;
    72     return true;
    73   }
    74   return false;
    75 }
    77 #endif // CPU_MIPS_VM_C1_LINEARSCAN_MIPS_HPP

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