Thu, 24 May 2018 19:49:50 +0800
some C1 fix
Contributed-by: chenhaoxuan, zhaixiang, aoqi
1 /*
2 * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_Instruction.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_LIRGenerator.hpp"
32 #include "c1/c1_Runtime1.hpp"
33 #include "c1/c1_ValueStack.hpp"
34 #include "ci/ciArray.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "vmreg_mips.inline.hpp"
41 #ifdef ASSERT
42 #define __ gen()->lir(__FILE__, __LINE__)->
43 #else
44 #define __ gen()->lir()->
45 #endif
47 // Item will be loaded into a byte register; Intel only
48 void LIRItem::load_byte_item() {
49 load_item();
50 LIR_Opr res = result();
52 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
53 // make sure that it is a byte register
54 assert(!value()->type()->is_float() && !value()->type()->is_double(),
55 "can't load floats in byte register");
56 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
57 __ move(res, reg);
59 _result = reg;
60 }
61 }
64 void LIRItem::load_nonconstant() {
65 LIR_Opr r = value()->operand();
66 if (r->is_constant()) {
67 _result = r;
68 } else {
69 load_item();
70 }
71 }
73 //--------------------------------------------------------------
74 // LIRGenerator
75 //--------------------------------------------------------------
76 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::_v0_oop_opr; }
77 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::_v1_opr; }
78 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::_a0_opr; }//FIXME
79 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::_f0_opr; } //FIXME
80 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::_f0_opr; } //FIXME
81 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::_t3_opr; } //
82 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::_t2_opr; }
83 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } //
86 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
87 LIR_Opr opr;
88 switch (type->tag()) {
89 case intTag: {
90 opr = FrameMap::_v0_opr;
91 break;
92 }
93 case objectTag: {
94 opr = FrameMap::_v0_oop_opr;
95 break;
96 }
97 case longTag: {
98 opr = FrameMap::_v0_v1_long_opr;
99 break;
100 }
101 case floatTag: {
102 opr = FrameMap::_f0_float_opr;
103 break;
104 }
105 case doubleTag: {
106 opr = FrameMap::_d0_double_opr;
107 break;
108 }
109 case addressTag:
110 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
111 }
113 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
114 return opr;
115 }
117 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
118 LIR_Opr reg = new_register(type);
119 set_vreg_flag(reg, callee_saved);
120 return reg;
121 }
124 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
125 return new_register(T_INT);
126 }
129 //--------- loading items into registers --------------------------------
132 // i486 instructions can inline constants
133 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
134 if (type == T_SHORT || type == T_CHAR) {
135 // there is no immediate move of word values in asembler_i486.?pp
136 return false;
137 }
138 Constant* c = v->as_Constant();
139 if (c && c->state_before() == NULL) {
140 // constants of any type can be stored directly, except for
141 // unloaded object constants.
142 return true;
143 }
144 return false;
145 }
148 bool LIRGenerator::can_inline_as_constant(Value v) const {
149 if (v->type()->is_constant() && v->type()->as_IntConstant() != NULL) {
150 return Assembler::is_simm16(v->type()->as_IntConstant()->value());
151 } else {
152 return false;
153 }
154 }
157 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
158 if (c->type() == T_INT && c->as_constant() != NULL) {
159 return Assembler::is_simm16(c->as_jint());
160 } else {
161 return false;
162 }
163 }
166 LIR_Opr LIRGenerator::safepoint_poll_register() {
167 return new_register(T_INT);
168 }
171 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
172 int shift, int disp, BasicType type) {
173 assert(base->is_register(), "must be");
174 if (index->is_constant()) {
175 disp += index->as_constant_ptr()->as_jint() << shift;
176 if (Assembler::is_simm16(disp)) {
177 return new LIR_Address(base,disp, type);
178 } else {
180 if(disp!=0){
181 #ifdef _LP64
182 LIR_Opr tmp = new_register(T_LONG);
183 #else
184 LIR_Opr tmp = new_register(T_INT);
185 #endif
186 __ move(LIR_OprFact::intConst((int)disp), tmp);
187 __ add(tmp, base, tmp);
188 return new LIR_Address(tmp, 0, type);
189 }
190 else
191 return new LIR_Address(base, 0, type);
192 }
193 } else if( index->is_register()) {
195 #ifdef _LP64
196 LIR_Opr tmpa = new_register(T_LONG);
197 #else
198 LIR_Opr tmpa = new_register(T_INT);
199 #endif
200 __ move(index, tmpa);
201 __ shift_left(tmpa, shift, tmpa);
202 __ add(tmpa,base, tmpa);
203 if (Assembler::is_simm16(disp)) {
204 return new LIR_Address(tmpa, disp, type);
205 } else {
206 if (disp!=0) {
207 #ifdef _LP64
208 LIR_Opr tmp = new_register(T_LONG);
209 #else
210 LIR_Opr tmp = new_register(T_INT);
211 #endif
213 __ move(LIR_OprFact::intConst((int)disp), tmp);
214 __ add(tmp, tmpa, tmp);
215 return new LIR_Address(tmp, 0, type);
216 } else
217 return new LIR_Address(tmpa, 0, type);
218 }
219 } else {
220 if (Assembler::is_simm16(disp)) {
221 return new LIR_Address(base,disp, type);
222 } else {
223 if (disp!=0) {
224 #ifdef _LP64
225 LIR_Opr tmp = new_register(T_LONG);
226 #else
227 LIR_Opr tmp = new_register(T_INT);
228 #endif
229 __ move(LIR_OprFact::intConst((int)disp), tmp);
230 __ add(tmp, base, tmp);
231 return new LIR_Address(tmp, 0, type);
232 } else
233 return new LIR_Address(base, 0, type);
234 }
235 }
236 }
238 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
239 BasicType type, bool needs_card_mark) {
240 int elem_size = type2aelembytes(type);
241 int shift = exact_log2(elem_size);
243 LIR_Opr base_opr;
244 int offset = arrayOopDesc::base_offset_in_bytes(type);
246 if (index_opr->is_constant()) {
247 int i = index_opr->as_constant_ptr()->as_jint();
248 int array_offset = i * elem_size;
249 if (Assembler::is_simm16(array_offset + offset)) {
250 base_opr = array_opr;
251 offset = array_offset + offset;
252 } else {
253 base_opr = new_pointer_register();
254 if (Assembler::is_simm16(array_offset)) {
255 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
256 } else {
257 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
258 __ add(base_opr, array_opr, base_opr);
259 }
260 }
261 } else {
262 #ifdef _LP64
263 if (index_opr->type() == T_INT) {
264 LIR_Opr tmp = new_register(T_LONG);
265 __ convert(Bytecodes::_i2l, index_opr, tmp);
266 index_opr = tmp;
267 }
268 #endif
270 base_opr = new_pointer_register();
271 assert (index_opr->is_register(), "Must be register");
272 if (shift > 0) {
273 __ shift_left(index_opr, shift, base_opr);
274 __ add(base_opr, array_opr, base_opr);
275 } else {
276 __ add(index_opr, array_opr, base_opr);
277 }
278 }
279 if (needs_card_mark) {
280 // This store will need a precise card mark, so go ahead and
281 // compute the full adddres instead of computing once for the
282 // store and again for the card mark.
283 LIR_Opr ptr = new_pointer_register();
284 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
285 return new LIR_Address(ptr, type);
286 } else {
287 return new LIR_Address(base_opr, offset, type);
288 }
289 }
292 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
293 LIR_Opr r;
294 if (type == T_LONG) {
295 r = LIR_OprFact::longConst(x);
296 } else if (type == T_INT) {
297 r = LIR_OprFact::intConst(x);
298 } else {
299 ShouldNotReachHere();
300 }
301 return r;
302 }
304 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
305 #ifdef _LP64
306 LIR_Opr pointer = new_register(T_LONG);
307 #else
308 LIR_Opr pointer = new_register(T_INT);
309 #endif
310 __ move(LIR_OprFact::intptrConst(counter), pointer);
311 LIR_Address* addr = new LIR_Address(pointer, type);
312 increment_counter(addr, step);
313 }
315 //void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
316 // LIR_Opr pointer = new_register(T_LONG);
317 // __ move(LIR_OprFact::longConst((long)counter), pointer);
318 // LIR_Opr addr = (LIR_Opr)new LIR_Address(pointer, type);
319 // LIR_Opr c = LIR_OprFact::intConst((int)step);
320 // __ add(addr, c, addr);
321 //}
323 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
324 LIR_Opr temp = new_register(addr->type());
325 __ move(addr, temp);
326 __ add(temp, load_immediate(step, addr->type()), temp);
327 __ move(temp, addr);
328 }
331 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
332 if (tmp->is_valid()) {
333 if (is_power_of_2(c + 1)) {
334 __ move(left, result);
335 __ shift_left(result, log2_intptr(c + 1), result);
336 __ sub(result, left, result);
337 return true;
338 } else if (is_power_of_2(c - 1)) {
339 __ move(left, result);
340 __ shift_left(result, log2_intptr(c - 1), result);
341 __ add(result, left, result);
342 return true;
343 }
344 }
345 return false;
346 }
349 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
350 BasicType type = item->type();
351 __ store(item, new LIR_Address(FrameMap::_sp_opr, in_bytes(offset_from_sp), type));
352 }
354 //----------------------------------------------------------------------
355 // visitor functions
356 //----------------------------------------------------------------------
359 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
360 assert(x->is_pinned(),"");
361 bool needs_range_check = true;
362 bool use_length = x->length() != NULL;
363 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
364 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
365 !get_jobject_constant(x->value())->is_null_object());
367 LIRItem array(x->array(), this);
368 LIRItem index(x->index(), this);
369 LIRItem value(x->value(), this);
370 LIRItem length(this);
372 array.load_item();
373 index.load_nonconstant();
375 if (use_length) {
376 needs_range_check = x->compute_needs_range_check();
377 if (needs_range_check) {
378 length.set_instruction(x->length());
379 length.load_item();
380 }
381 }
382 if (needs_store_check) {
383 value.load_item();
384 } else {
385 value.load_for_store(x->elt_type());
386 }
388 set_no_result(x);
390 // the CodeEmitInfo must be duplicated for each different
391 // LIR-instruction because spilling can occur anywhere between two
392 // instructions and so the debug information must be different
393 CodeEmitInfo* range_check_info = state_for(x);
394 CodeEmitInfo* null_check_info = NULL;
395 if (x->needs_null_check()) {
396 null_check_info = new CodeEmitInfo(range_check_info);
397 }
399 // emit array address setup early so it schedules better
400 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
402 if (GenerateRangeChecks && needs_range_check) {
403 if (use_length) {
404 __ branch(lir_cond_belowEqual, length.result(),index.result(),T_INT,new RangeCheckStub(range_check_info, index.result()));
405 } else {
406 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
407 // range_check also does the null check
408 null_check_info = NULL;
409 }
410 }
412 if (GenerateArrayStoreCheck && needs_store_check) {
413 LIR_Opr tmp1 = new_register(objectType);
414 LIR_Opr tmp2 = new_register(objectType);
415 LIR_Opr tmp3 = new_register(objectType);
417 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
418 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
419 }
421 if (obj_store) {
422 // Needs GC write barriers.
423 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr, true, false, NULL);
424 __ move(value.result(), array_addr, null_check_info);
425 // Seems to be a precise
426 post_barrier(LIR_OprFact::address(array_addr), value.result());
427 } else {
428 __ move(value.result(), array_addr, null_check_info);
429 }
430 }
433 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
434 assert(x->is_pinned(),"");
435 LIRItem obj(x->obj(), this);
436 obj.load_item();
438 set_no_result(x);
440 // "lock" stores the address of the monitor stack slot, so this is not an oop
441 #ifdef _LP64
442 LIR_Opr lock = new_register(T_LONG);
443 #else
444 LIR_Opr lock = new_register(T_INT);
445 #endif
446 // Need a scratch register for biased locking on mips
447 LIR_Opr scratch = LIR_OprFact::illegalOpr;
448 if (UseBiasedLocking) {
449 scratch = new_register(T_INT);
450 }
452 CodeEmitInfo* info_for_exception = NULL;
453 if (x->needs_null_check()) {
454 info_for_exception = state_for(x);
455 }
456 // this CodeEmitInfo must not have the xhandlers because here the
457 // object is already locked (xhandlers expect object to be unlocked)
458 CodeEmitInfo* info = state_for(x, x->state(), true);
459 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
460 x->monitor_no(), info_for_exception, info);
461 }
464 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
465 assert(x->is_pinned(),"");
467 LIRItem obj(x->obj(), this);
468 obj.dont_load_item();
470 LIR_Opr lock = new_register(T_INT);
471 LIR_Opr obj_temp = new_register(T_INT);
472 set_no_result(x);
473 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
474 }
477 // _ineg, _lneg, _fneg, _dneg
478 void LIRGenerator::do_NegateOp(NegateOp* x) {
479 LIRItem value(x->x(), this);
480 value.set_destroys_register();
481 value.load_item();
482 LIR_Opr reg = rlock(x);
483 __ negate(value.result(), reg);
485 set_result(x, round_item(reg));
486 }
490 // for _fadd, _fmul, _fsub, _fdiv, _frem
491 // _dadd, _dmul, _dsub, _ddiv, _drem
492 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
493 LIR_Opr tmp;
494 LIRItem left(x->x(), this);
495 LIRItem right(x->y(), this);
496 left.load_item();
497 right.load_item();
498 rlock_result(x);
499 switch (x->op()) {
500 case Bytecodes::_drem:
501 tmp = new_register(T_DOUBLE);
502 __ frem(left.result(), right.result(), x->operand(), tmp);
504 break;
505 case Bytecodes::_frem:
506 tmp = new_register(T_FLOAT);
507 __ frem(left.result(), right.result(), x->operand(), tmp);
508 break;
509 default: arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
510 }
511 }
516 // for _ladd, _lmul, _lsub, _ldiv, _lrem
517 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
518 switch (x->op()) {
519 case Bytecodes::_lrem:
520 case Bytecodes::_lmul:
521 case Bytecodes::_ldiv: {
523 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
524 LIRItem right(x->y(), this);
525 right.load_item();
527 CodeEmitInfo* info = state_for(x);
528 LIR_Opr item = right.result();
529 assert(item->is_register(), "must be");
530 __ branch(lir_cond_equal,item,LIR_OprFact::longConst(0), T_LONG, new DivByZeroStub(info));
531 }
533 address entry;
534 switch (x->op()) {
535 case Bytecodes::_lrem:
536 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
537 break; // check if dividend is 0 is done elsewhere
538 case Bytecodes::_ldiv:
539 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
540 break; // check if dividend is 0 is done elsewhere
541 case Bytecodes::_lmul:
542 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
543 break;
544 default:
545 ShouldNotReachHere();
546 }
548 // order of arguments to runtime call is reversed.
549 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
550 set_result(x, result);
551 break;
552 }
553 case Bytecodes::_ladd:
554 case Bytecodes::_lsub: {
555 LIRItem left(x->x(), this);
556 LIRItem right(x->y(), this);
557 left.load_item();
558 right.load_item();
559 rlock_result(x);
561 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
562 break;
563 }
564 default:
565 ShouldNotReachHere();
566 }
567 }
572 // for: _iadd, _imul, _isub, _idiv, _irem
573 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
574 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
575 LIRItem left(x->x(), this);
576 LIRItem right(x->y(), this);
577 // missing test if instr is commutative and if we should swap
578 right.load_nonconstant();
579 assert(right.is_constant() || right.is_register(), "wrong state of right");
580 left.load_item();
581 rlock_result(x);
582 if (is_div_rem) {
583 CodeEmitInfo* info = state_for(x);
584 LIR_Opr tmp =new_register(T_INT);
585 if (x->op() == Bytecodes::_irem) {
586 __ irem(left.result(), right.result(), x->operand(), tmp, info);
587 } else if (x->op() == Bytecodes::_idiv) {
588 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
589 }
590 } else {
591 //arithmetic_op_int(x->op(), x->operand(), left.result(),
592 //right.result(), FrameMap::G1_opr);
594 LIR_Opr tmp =new_register(T_INT);
595 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(),
596 tmp);
597 }
598 }
601 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
602 // when an operand with use count 1 is the left operand, then it is
603 // likely that no move for 2-operand-LIR-form is necessary
604 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
605 x->swap_operands();
606 }
608 ValueTag tag = x->type()->tag();
609 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
610 switch (tag) {
611 case floatTag:
612 case doubleTag: do_ArithmeticOp_FPU(x); return;
613 case longTag: do_ArithmeticOp_Long(x); return;
614 case intTag: do_ArithmeticOp_Int(x); return;
615 }
616 ShouldNotReachHere();
617 }
620 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
621 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
622 // count must always be in rcx
623 LIRItem value(x->x(), this);
624 LIRItem count(x->y(), this);
626 ValueTag elemType = x->type()->tag();
627 bool must_load_count = !count.is_constant() || elemType == longTag;
628 if (must_load_count) {
629 // count for long must be in register
630 count.load_item();
631 } else {
632 count.dont_load_item();
633 }
634 value.load_item();
635 LIR_Opr reg = rlock_result(x);
637 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
638 }
641 // _iand, _land, _ior, _lor, _ixor, _lxor
642 void LIRGenerator::do_LogicOp(LogicOp* x) {
643 // when an operand with use count 1 is the left operand, then it is
644 // likely that no move for 2-operand-LIR-form is necessary
645 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
646 x->swap_operands();
647 }
649 LIRItem left(x->x(), this);
650 LIRItem right(x->y(), this);
652 left.load_item();
653 right.load_nonconstant();
654 LIR_Opr reg = rlock_result(x);
656 logic_op(x->op(), reg, left.result(), right.result());
657 }
661 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
662 void LIRGenerator::do_CompareOp(CompareOp* x) {
663 LIRItem left(x->x(), this);
664 LIRItem right(x->y(), this);
665 ValueTag tag = x->x()->type()->tag();
666 if (tag == longTag) {
667 left.set_destroys_register();
668 }
669 left.load_item();
670 right.load_item();
671 LIR_Opr reg = rlock_result(x);
673 if (x->x()->type()->is_float_kind()) {
674 Bytecodes::Code code = x->op();
675 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
676 } else if (x->x()->type()->tag() == longTag) {
677 __ lcmp2int(left.result(), right.result(), reg);
678 } else {
679 Unimplemented();
680 }
681 }
682 /*
683 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
684 assert(x->number_of_arguments() == 3, "wrong type");
685 LIRItem obj (x->argument_at(0), this); // AtomicLong object
686 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
687 LIRItem new_value (x->argument_at(2), this);
688 // replace field with new_value if it matches cmp_value
690 // compare value must be in edx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
691 // cmp_value.load_item_force(FrameMap::eax_edx_long_opr);
692 cmp_value.load_item_force(FrameMap::_a0_a1_long_opr);
694 // new value must be in ecx,ebx (hi,lo)
695 // new_value.load_item_force(FrameMap::ebx_ecx_long_opr);
696 new_value.load_item_force(FrameMap::_a2_a3_long_opr);
697 // object pointer register is overwritten with field address
698 obj.load_item();
700 // generate compare-and-swap; produces zero condition if swap occurs
701 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
702 LIR_Opr addr = obj.result();
703 __ add(addr, LIR_OprFact::intConst(value_offset), addr);
704 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed
705 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed
706 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2, FrameMap::_at_opr);
708 // generate conditional move of boolean result
709 LIR_Opr result = rlock_result(x);
710 //__ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
711 __ move(FrameMap::_at_opr, result);
712 }
713 */
714 //FIXME, for mips, compareandswap is a bit different
715 //I have no idea use which register
716 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
717 assert(x->number_of_arguments() == 4, "wrong type");
718 LIRItem obj (x->argument_at(0), this); // object
719 LIRItem offset(x->argument_at(1), this); // offset of field
720 LIRItem cmp (x->argument_at(2), this); // value to compare with field
721 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
723 assert(obj.type()->tag() == objectTag, "invalid type");
725 //In 64bit the type can be long, sparc doesn't have this assert
726 //assert(offset.type()->tag() == intTag, "invalid type");
728 assert(cmp.type()->tag() == type->tag(), "invalid type");
729 assert(val.type()->tag() == type->tag(), "invalid type");
731 // get address of field
732 obj.load_item();
733 offset.load_nonconstant();
735 if (type == objectType) {
736 // cmp.load_item_force(FrameMap::eax_oop_opr);
737 cmp.load_item_force(FrameMap::_a0_oop_opr);
738 val.load_item();
739 } else if (type == intType) {
740 // cmp.load_item_force(FrameMap::eax_opr);
741 cmp.load_item_force(FrameMap::_a0_opr);
742 val.load_item();
743 } else if (type == longType) {
744 //// cmp.load_item_force(FrameMap::eax_edx_long_opr);
745 cmp.load_item_force(FrameMap::_a0_a1_long_opr);
746 // val.load_item_force(FrameMap::ebx_ecx_long_opr);
747 val.load_item_force(FrameMap::_a2_a3_long_opr);
748 } else {
749 ShouldNotReachHere();
750 }
751 LIR_Opr addr = new_pointer_register();
752 __ move(obj.result(), addr);
753 __ add(addr, offset.result(), addr);
755 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
756 if (type == objectType)
757 __ cas_obj(addr, cmp.result(), val.result(), ill, ill, FrameMap::_at_opr);
758 else if (type == intType)
759 __ cas_int(addr, cmp.result(), val.result(), ill, ill, FrameMap::_at_opr);
760 else if (type == longType)
761 __ cas_long(addr, cmp.result(), val.result(), ill, ill, FrameMap::_at_opr);
762 else {
763 ShouldNotReachHere();
764 }
765 // generate conditional move of boolean result
766 LIR_Opr result = rlock_result(x);
767 //cmove not exist on mips,
768 // __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
769 // our implementation of cmpxchg put result in AT
770 // LIR_Opr result = rlock_result_with_hint(x, hint());
771 __ move(FrameMap::_at_opr, result);
773 if (type == objectType) // Write-barrier needed for Object fields.
774 write_barrier(addr);
775 }
778 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
779 switch (x->id()) {
780 case vmIntrinsics::_dabs:
781 case vmIntrinsics::_dsqrt: {
782 assert(x->number_of_arguments() == 1, "wrong type");
783 LIRItem value(x->argument_at(0), this);
784 value.load_item();
785 LIR_Opr dst = rlock_result(x);
787 switch (x->id()) {
788 case vmIntrinsics::_dsqrt: {
789 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
790 break;
791 }
792 case vmIntrinsics::_dabs: {
793 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
794 break;
795 }
796 }
797 break;
798 }
799 case vmIntrinsics::_dlog10: // fall through
800 case vmIntrinsics::_dlog: // fall through
801 case vmIntrinsics::_dsin: // fall through
802 case vmIntrinsics::_dtan: // fall through
803 case vmIntrinsics::_dcos: {
804 assert(x->number_of_arguments() == 1, "wrong type");
806 address runtime_entry = NULL;
807 switch (x->id()) {
808 case vmIntrinsics::_dsin:
809 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
810 break;
811 case vmIntrinsics::_dcos:
812 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
813 break;
814 case vmIntrinsics::_dtan:
815 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
816 break;
817 case vmIntrinsics::_dlog:
818 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
819 break;
820 case vmIntrinsics::_dlog10:
821 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
822 break;
823 default:
824 ShouldNotReachHere();
825 }
826 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
827 set_result(x, result);
828 }
829 }
830 }
832 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
833 assert(x->number_of_arguments() == 5, "wrong type");
834 // Note: spill caller save before setting the item
835 LIRItem src (x->argument_at(0), this);
836 LIRItem src_pos (x->argument_at(1), this);
837 LIRItem dst (x->argument_at(2), this);
838 LIRItem dst_pos (x->argument_at(3), this);
839 LIRItem length (x->argument_at(4), this);
840 // load all values in callee_save_registers, as this makes the
841 // parameter passing to the fast case simpler
842 src.load_item_force (FrameMap::_t0_oop_opr);
843 src_pos.load_item_force (FrameMap::_a0_opr);
844 dst.load_item_force (FrameMap::_a1_oop_opr);
845 dst_pos.load_item_force (FrameMap::_a2_opr);
846 length.load_item_force (FrameMap::_a3_opr);
848 int flags;
849 ciArrayKlass* expected_type;
850 arraycopy_helper(x, &flags, &expected_type);
852 CodeEmitInfo* info = state_for(x, x->state());
853 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), rlock_callee_saved(T_INT), expected_type, flags, info);
854 set_no_result(x);
855 }
857 void LIRGenerator::do_update_CRC32(Intrinsic* x) { // Fu: 20130832
858 Unimplemented();
859 }
861 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
862 // _i2b, _i2c, _i2s
863 LIR_Opr fixed_register_for(BasicType type) {
864 switch (type) {
865 case T_FLOAT: return FrameMap::_f0_float_opr;
866 case T_DOUBLE: return FrameMap::_d0_double_opr;
867 case T_INT: return FrameMap::_v0_opr;
868 case T_LONG: return FrameMap::_v0_v1_long_opr;
869 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
870 }
871 }
874 void LIRGenerator::do_Convert(Convert* x) {
875 // flags that vary for the different operations and different SSE-settings
876 bool fixed_input, fixed_result, round_result, needs_stub;
878 switch (x->op()) {
879 case Bytecodes::_i2l: // fall through
880 case Bytecodes::_l2i: // fall through
881 case Bytecodes::_i2b: // fall through
882 case Bytecodes::_i2c: // fall through
883 case Bytecodes::_i2s:
884 fixed_input = false;
885 fixed_result = false;
886 round_result = false;
887 needs_stub = false; break;
888 case Bytecodes::_f2d:
889 fixed_input = UseSSE == 1;
890 fixed_result = false;
891 round_result = false;
892 needs_stub = false; break;
893 case Bytecodes::_d2f:
894 fixed_input = false;
895 fixed_result = UseSSE == 1;
896 round_result = UseSSE < 1;
897 needs_stub = false; break;
898 case Bytecodes::_i2f:
899 fixed_input = false;
900 fixed_result = false;
901 round_result = UseSSE < 1;
902 needs_stub = false; break;
903 case Bytecodes::_i2d:
904 fixed_input = false;
905 fixed_result = false;
906 round_result = false;
907 needs_stub = false; break;
908 case Bytecodes::_f2i:
909 fixed_input = false;
910 fixed_result = false;
911 round_result = false;
912 needs_stub = true; break;
913 case Bytecodes::_d2i:
914 fixed_input = false;
915 fixed_result = false;
916 round_result = false;
917 needs_stub = true; break;
918 case Bytecodes::_l2f:
919 fixed_input = false;
920 fixed_result = UseSSE >= 1;
921 round_result = UseSSE < 1;
922 needs_stub = false; break;
923 case Bytecodes::_l2d:
924 fixed_input = false;
925 fixed_result = UseSSE >= 2;
926 round_result = UseSSE < 2;
927 needs_stub = false; break;
928 case Bytecodes::_f2l:
929 fixed_input = true;
930 fixed_result = true;
931 round_result = false;
932 needs_stub = false; break;
933 case Bytecodes::_d2l:
934 fixed_input = true;
935 fixed_result = true;
936 round_result = false;
937 needs_stub = false; break;
938 default:
939 ShouldNotReachHere();
940 }
942 LIRItem value(x->value(), this);
943 value.load_item();
944 LIR_Opr input = value.result();
945 LIR_Opr result = rlock(x);
947 // arguments of lir_convert
948 LIR_Opr conv_input = input;
949 LIR_Opr conv_result = result;
950 ConversionStub* stub = NULL;
952 if (fixed_input) {
953 conv_input = fixed_register_for(input->type());
954 __ move(input, conv_input);
955 }
957 assert(fixed_result == false || round_result == false, "cannot set both");
958 if (fixed_result) {
959 conv_result = fixed_register_for(result->type());
960 } else if (round_result) {
961 result = new_register(result->type());
962 set_vreg_flag(result, must_start_in_memory);
963 }
965 if (needs_stub) {
966 stub = new ConversionStub(x->op(), conv_input, conv_result);
967 }
969 __ convert(x->op(), conv_input, conv_result, stub);
971 if (result != conv_result) {
972 __ move(conv_result, result);
973 }
975 assert(result->is_virtual(), "result must be virtual register");
976 set_result(x, result);
977 }
979 void LIRGenerator::do_NewInstance(NewInstance* x) {
980 const LIR_Opr reg = result_register_for(x->type());
981 #ifndef PRODUCT
982 if (PrintNotLoaded && !x->klass()->is_loaded()) {
983 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
984 }
985 #endif
986 CodeEmitInfo* info = state_for(x, x->state());
987 // LIR_Opr tmp1 = new_register(T_INT);
988 // LIR_Opr tmp2 = new_register(T_INT);
989 // LIR_Opr tmp3 = new_register(T_INT);
990 // LIR_Opr tmp4 = new_register(T_INT);
991 #ifndef _LP64
992 LIR_Opr klass_reg = FrameMap::_t4_metadata_opr;
993 #else
994 LIR_Opr klass_reg = FrameMap::_a4_metadata_opr;
995 #endif
996 new_instance(reg,
997 x->klass(),
998 x->is_unresolved(),
999 FrameMap::_t0_oop_opr,
1000 FrameMap::_t1_oop_opr,
1001 FrameMap::_t2_oop_opr,
1002 FrameMap::_t3_oop_opr,
1003 #ifndef _LP64
1004 FrameMap::_t5_oop_opr,
1005 FrameMap::_t6_oop_opr,
1006 #else
1007 FrameMap::_a5_oop_opr,
1008 FrameMap::_a6_oop_opr,
1009 #endif
1010 klass_reg,
1011 info);
1012 LIR_Opr result = rlock_result(x);
1013 __ move(reg, result);
1014 }
1017 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1018 CodeEmitInfo* info = state_for(x, x->state());
1020 LIRItem length(x->length(), this);
1021 length.load_item_force(FrameMap::_t2_opr);
1023 LIR_Opr reg = result_register_for(x->type());
1024 LIR_Opr tmp1 = FrameMap::_t0_oop_opr;
1025 LIR_Opr tmp2 = FrameMap::_t1_oop_opr;
1026 LIR_Opr tmp3 = FrameMap::_t3_oop_opr;
1027 #ifndef _LP64
1028 LIR_Opr tmp4 = FrameMap::_t5_oop_opr;
1029 LIR_Opr tmp5 = FrameMap::_t6_oop_opr;
1030 LIR_Opr klass_reg = FrameMap::_t4_oop_opr;
1031 #else
1032 LIR_Opr tmp4 = FrameMap::_a5_oop_opr;
1033 LIR_Opr tmp5 = FrameMap::_a6_oop_opr;
1034 LIR_Opr klass_reg = FrameMap::_a4_metadata_opr;
1035 #endif
1036 LIR_Opr len = length.result();
1037 BasicType elem_type = x->elt_type();
1039 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1041 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1042 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4,tmp5, elem_type, klass_reg, slow_path);
1044 LIR_Opr result = rlock_result(x);
1045 __ move(reg, result);
1046 }
1050 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1051 LIRItem length(x->length(), this);
1052 // in case of patching (i.e., object class is not yet loaded), we
1053 // need to reexecute the instruction
1054 // and therefore provide the state before the parameters have been consumed
1055 CodeEmitInfo* patching_info = NULL;
1056 if (!x->klass()->is_loaded() || PatchALot) {
1057 patching_info = state_for(x, x->state_before());
1058 }
1060 const LIR_Opr reg = result_register_for(x->type());
1061 LIR_Opr tmp1 = FrameMap::_t0_oop_opr;
1062 LIR_Opr tmp2 = FrameMap::_t1_oop_opr;
1063 LIR_Opr tmp3 = FrameMap::_t3_oop_opr;
1064 #ifndef _LP64
1065 LIR_Opr tmp4 = FrameMap::_t5_oop_opr;
1066 LIR_Opr tmp5 = FrameMap::_t6_oop_opr;
1067 LIR_Opr klass_reg = FrameMap::_t4_oop_opr;
1068 #else
1069 LIR_Opr tmp4 = FrameMap::_a5_oop_opr;
1070 LIR_Opr tmp5 = FrameMap::_a6_oop_opr;
1071 LIR_Opr klass_reg = FrameMap::_a4_metadata_opr;
1072 #endif
1074 length.load_item_force(FrameMap::_t2_opr);
1076 LIR_Opr len = length.result();
1077 CodeEmitInfo* info = state_for(x, x->state());
1079 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1080 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1081 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1082 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1083 }
1084 klass2reg_with_patching(klass_reg, obj, patching_info);
1085 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, tmp5, T_OBJECT, klass_reg, slow_path);
1087 LIR_Opr result = rlock_result(x);
1088 __ move(reg, result);
1089 }
1092 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1093 Values* dims = x->dims();
1094 int i = dims->length();
1095 LIRItemList* items = new LIRItemList(dims->length(), NULL);
1096 while (i-- > 0) {
1097 LIRItem* size = new LIRItem(dims->at(i), this);
1098 items->at_put(i, size);
1099 }
1101 // need to get the info before, as the items may become invalid through item_free
1102 CodeEmitInfo* patching_info = NULL;
1103 if (!x->klass()->is_loaded() || PatchALot) {
1104 patching_info = state_for(x, x->state_before());
1105 // cannot re-use same xhandlers for multiple CodeEmitInfos, so
1106 // clone all handlers.
1107 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1108 }
1110 CodeEmitInfo* info = state_for(x, x->state());
1112 i = dims->length();
1113 while (i-- > 0) {
1114 LIRItem* size = items->at(i);
1115 size->load_nonconstant();
1116 store_stack_parameter(size->result(), in_ByteSize(i*4));
1117 }
1119 LIR_Opr klass_reg = FrameMap::_v0_metadata_opr;
1120 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1122 // LIR_Opr rank = FrameMap::ebx_opr;
1123 LIR_Opr rank = FrameMap::_t2_opr;
1124 __ move(LIR_OprFact::intConst(x->rank()), rank);
1125 // LIR_Opr varargs = FrameMap::ecx_opr;
1126 LIR_Opr varargs = FrameMap::_t0_opr;
1127 __ move(FrameMap::_sp_opr, varargs);
1128 LIR_OprList* args = new LIR_OprList(3);
1129 args->append(klass_reg);
1130 args->append(rank);
1131 args->append(varargs);
1132 LIR_Opr reg = result_register_for(x->type());
1133 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1134 LIR_OprFact::illegalOpr,
1135 reg, args, info);
1137 LIR_Opr result = rlock_result(x);
1138 __ move(reg, result);
1139 }
1141 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1142 // nothing to do for now
1143 }
1146 void LIRGenerator::do_CheckCast(CheckCast* x) {
1147 LIRItem obj(x->obj(), this);
1149 CodeEmitInfo* patching_info = NULL;
1150 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1151 // must do this before locking the destination register as an oop register,
1152 // and before the obj is loaded (the latter is for deoptimization)
1153 patching_info = state_for(x, x->state_before());
1154 }
1155 obj.load_item();
1157 // info for exceptions
1158 CodeEmitInfo* info_for_exception = state_for(x);
1160 CodeStub* stub;
1161 if (x->is_incompatible_class_change_check()) {
1162 assert(patching_info == NULL, "can't patch this");
1163 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1164 } else {
1165 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1166 }
1167 LIR_Opr reg = rlock_result(x);
1168 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1169 if (!x->klass()->is_loaded() || UseCompressedOops) {
1170 tmp3 = new_register(objectType);
1171 }
1172 __ checkcast(reg, obj.result(), x->klass(),
1173 new_register(objectType), new_register(objectType), tmp3,
1174 x->direct_compare(), info_for_exception, patching_info, stub,
1175 x->profiled_method(), x->profiled_bci());
1176 }
1179 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1180 LIRItem obj(x->obj(), this);
1182 // result and test object may not be in same register
1183 LIR_Opr reg = rlock_result(x);
1184 CodeEmitInfo* patching_info = NULL;
1185 if ((!x->klass()->is_loaded() || PatchALot)) {
1186 // must do this before locking the destination register as an oop register
1187 patching_info = state_for(x, x->state_before());
1188 }
1189 obj.load_item();
1190 LIR_Opr tmp = new_register(objectType);
1191 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1192 if (!x->klass()->is_loaded() || UseCompressedOops) {
1193 tmp3 = new_register(objectType);
1194 }
1196 __ instanceof(reg, obj.result(), x->klass(),
1197 tmp, new_register(objectType), tmp3,
1198 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1199 }
1202 void LIRGenerator::do_If(If* x) {
1203 assert(x->number_of_sux() == 2, "inconsistency");
1204 ValueTag tag = x->x()->type()->tag();
1205 bool is_safepoint = x->is_safepoint();
1207 If::Condition cond = x->cond();
1209 LIRItem xitem(x->x(), this);
1210 LIRItem yitem(x->y(), this);
1211 LIRItem* xin = &xitem;
1212 LIRItem* yin = &yitem;
1214 if (tag == longTag) {
1215 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1216 // mirror for other conditions
1217 if (cond == If::gtr || cond == If::leq) {
1218 cond = Instruction::mirror(cond);
1219 xin = &yitem;
1220 yin = &xitem;
1221 }
1222 xin->set_destroys_register();
1223 }
1224 xin->load_item();
1225 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1226 // inline long zero
1227 yin->dont_load_item();
1228 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1229 // longs cannot handle constants at right side
1230 yin->load_item();
1231 } else {
1232 yin->dont_load_item();
1233 }
1235 // add safepoint before generating condition code so it can be recomputed
1236 if (x->is_safepoint()) {
1237 // increment backedge counter if needed
1238 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1239 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1240 }
1241 set_no_result(x);
1243 LIR_Opr left = xin->result();
1244 LIR_Opr right = yin->result();
1245 profile_branch(x, cond, left, right);
1246 move_to_phi(x->state());
1247 if (x->x()->type()->is_float_kind()) {
1248 __ branch(lir_cond(cond), left, right, right->type(), x->tsux(), x->usux());
1249 } else {
1250 __ branch(lir_cond(cond), left, right, right->type(), x->tsux());
1251 }
1252 assert(x->default_sux() == x->fsux(), "wrong destination above");
1253 __ jump(x->default_sux());
1254 }
1257 LIR_Opr LIRGenerator::getThreadPointer() {
1258 #ifdef _LP64
1259 //FIXME, does as_pointer need to be implemented? or 64bit can use one register. by aoqi
1260 //return FrameMap::as_pointer_opr(r15_thread);
1261 LIR_Opr result = new_register(T_LONG);
1262 __ get_thread(result);
1263 return result;
1264 #else
1265 LIR_Opr result = new_register(T_INT);
1266 __ get_thread(result);
1267 return result;
1268 #endif //
1269 }
1271 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1272 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1273 LIR_OprList* args = new LIR_OprList();
1274 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1275 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1276 }
1279 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1280 CodeEmitInfo* info) {
1281 if (address->type() == T_LONG) {
1282 __ volatile_store_mem_reg(value, address, info);
1283 } else {
1284 __ store(value, address, info);
1285 }
1286 }
1288 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1289 CodeEmitInfo* info) {
1291 if (address->type() == T_LONG) {
1292 __ volatile_load_mem_reg(address, result, info);
1293 } else {
1294 __ load(address, result, info);
1295 }
1296 }
1298 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1299 BasicType type, bool is_volatile) {
1300 __ add(src, offset, FrameMap::_at_opr);
1301 if (is_volatile && type == T_LONG) {
1302 LIR_Address* addr = new LIR_Address(FrameMap::_at_opr, 0, T_DOUBLE);
1303 LIR_Opr tmp = new_register(T_DOUBLE);
1304 __ load(addr, tmp);
1305 LIR_Opr spill = new_register(T_LONG);
1306 set_vreg_flag(spill, must_start_in_memory);
1307 __ move(tmp, spill);
1308 __ move(spill, dst);
1309 } else {
1310 LIR_Address* addr = new LIR_Address(FrameMap::_at_opr, 0, type);
1311 __ load(addr, dst);
1312 }
1313 }
1316 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1317 BasicType type, bool is_volatile) {
1318 __ add(src, offset, FrameMap::_at_opr);
1319 if (is_volatile && type == T_LONG) {
1320 LIR_Address* addr = new LIR_Address(FrameMap::_at_opr, 0, T_DOUBLE);
1321 LIR_Opr tmp = new_register(T_DOUBLE);
1322 LIR_Opr spill = new_register(T_DOUBLE);
1323 set_vreg_flag(spill, must_start_in_memory);
1324 __ move(data, spill);
1325 __ move(spill, tmp);
1326 __ move(tmp, addr);
1327 } else {
1328 LIR_Address* addr = new LIR_Address(FrameMap::_at_opr, 0, type);
1329 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1330 if (is_obj) {
1331 // Do the pre-write barrier, if any.
1332 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr/* pre_val */,
1333 true/* do_load */,false /*patch*/, NULL);
1334 __ move(data, addr);
1335 assert(src->is_register(), "must be register");
1336 // Seems to be a precise address
1337 post_barrier(LIR_OprFact::address(addr), data);
1338 } else {
1339 __ move(data, addr);
1340 }
1341 }
1342 }
1344 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1345 BasicType type = x->basic_type();
1346 LIRItem src(x->object(), this);
1347 LIRItem off(x->offset(), this);
1348 LIRItem value(x->value(), this);
1350 src.load_item();
1351 value.load_item();
1352 off.load_nonconstant();
1354 LIR_Opr dst = rlock_result(x, type);
1355 LIR_Opr data = value.result();
1356 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1357 LIR_Opr offset = off.result();
1359 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1360 LIR_Address* addr;
1361 if (offset->is_constant()) {
1362 #ifdef _LP64
1363 jlong c = offset->as_jlong();
1364 if ((jlong)((jint)c) == c) {
1365 addr = new LIR_Address(src.result(), (jint)c, type);
1366 } else {
1367 LIR_Opr tmp = new_register(T_LONG);
1368 __ move(offset, tmp);
1369 addr = new LIR_Address(src.result(), tmp, type);
1370 }
1371 #else
1372 addr = new LIR_Address(src.result(), offset->as_jint(), type);
1373 #endif
1374 } else {
1375 addr = new LIR_Address(src.result(), offset, type);
1376 }
1378 if (data != dst) {
1379 __ move(data, dst);
1380 data = dst;
1381 }
1382 if (x->is_add()) {
1383 __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr);
1384 } else {
1385 if (is_obj) {
1386 // Do the pre-write barrier, if any.
1387 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1388 true /* do_load */, false /* patch */, NULL);
1389 }
1390 __ xchg(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr);
1391 if (is_obj) {
1392 // Seems to be a precise address
1393 post_barrier(LIR_OprFact::address(addr), data);
1394 }
1395 }
1396 }