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src/cpu/mips/vm/c1_LIRAssembler_mips.hpp@ffcdff41a92f (annotated)
src/cpu/mips/vm/c1_LIRAssembler_mips.hpp
Thu, 24 May 2018 19:49:50 +0800
- author
- aoqi
- date
- Thu, 24 May 2018 19:49:50 +0800
- changeset 8865
- ffcdff41a92f
- parent 1
- 2d8a650513c2
- child 9219
- 0fa7c31d7b02
- permissions
- -rw-r--r--
some C1 fix
Contributed-by: chenhaoxuan, zhaixiang, aoqi
| aoqi@1 | 1 | /* |
| aoqi@1 | 2 | * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
| aoqi@1 | 3 | * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. |
| aoqi@1 | 4 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| aoqi@1 | 5 | * |
| aoqi@1 | 6 | * This code is free software; you can redistribute it and/or modify it |
| aoqi@1 | 7 | * under the terms of the GNU General Public License version 2 only, as |
| aoqi@1 | 8 | * published by the Free Software Foundation. |
| aoqi@1 | 9 | * |
| aoqi@1 | 10 | * This code is distributed in the hope that it will be useful, but WITHOUT |
| aoqi@1 | 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| aoqi@1 | 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| aoqi@1 | 13 | * version 2 for more details (a copy is included in the LICENSE file that |
| aoqi@1 | 14 | * accompanied this code). |
| aoqi@1 | 15 | * |
| aoqi@1 | 16 | * You should have received a copy of the GNU General Public License version |
| aoqi@1 | 17 | * 2 along with this work; if not, write to the Free Software Foundation, |
| aoqi@1 | 18 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| aoqi@1 | 19 | * |
| aoqi@1 | 20 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
| aoqi@1 | 21 | * or visit www.oracle.com if you need additional information or have any |
| aoqi@1 | 22 | * questions. |
| aoqi@1 | 23 | * |
| aoqi@1 | 24 | */ |
| aoqi@1 | 25 | |
| aoqi@8865 | 26 | #ifndef CPU_MIPS_VM_C1_LIRASSEMBLER_MIPS_HPP |
| aoqi@8865 | 27 | #define CPU_MIPS_VM_C1_LIRASSEMBLER_MIPS_HPP |
| aoqi@8865 | 28 | |
| aoqi@1 | 29 | private: |
| aoqi@1 | 30 | |
| aoqi@1 | 31 | Address::ScaleFactor array_element_size(BasicType type) const; |
| aoqi@1 | 32 | |
| aoqi@1 | 33 | void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, int dest_index, bool pop_fpu_stack); |
| aoqi@1 | 34 | |
| aoqi@1 | 35 | // helper functions which checks for overflow and sets bailout if it |
| aoqi@1 | 36 | // occurs. Always returns a valid embeddable pointer but in the |
| aoqi@1 | 37 | // bailout case the pointer won't be to unique storage. |
| aoqi@1 | 38 | address float_constant(float f); |
| aoqi@1 | 39 | address double_constant(double d); |
| aoqi@1 | 40 | |
| aoqi@1 | 41 | bool is_literal_address(LIR_Address* addr); |
| aoqi@1 | 42 | |
| aoqi@1 | 43 | // When we need to use something other than rscratch1 use this |
| aoqi@1 | 44 | // method. |
| aoqi@1 | 45 | Address as_Address(LIR_Address* addr, Register tmp); |
| aoqi@1 | 46 | |
| aoqi@8865 | 47 | // Record the type of the receiver in ReceiverTypeData |
| aoqi@8865 | 48 | void type_profile_helper(Register mdo, |
| aoqi@8865 | 49 | ciMethodData *md, ciProfileData *data, |
| aoqi@8865 | 50 | Register recv, Label* update_done); |
| aoqi@1 | 51 | |
| aoqi@1 | 52 | public: |
| aoqi@1 | 53 | |
| aoqi@1 | 54 | void store_parameter(Register r, int offset_from_esp_in_words); |
| aoqi@1 | 55 | void store_parameter(jint c, int offset_from_esp_in_words); |
| aoqi@1 | 56 | void store_parameter(jobject c, int offset_from_esp_in_words); |
| aoqi@1 | 57 | |
| aoqi@8865 | 58 | enum { call_stub_size = NOT_LP64(24) LP64_ONLY(40), |
| aoqi@1 | 59 | exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), |
| aoqi@1 | 60 | deopt_handler_size = NOT_LP64(16) LP64_ONLY(32) |
| aoqi@1 | 61 | }; |
| aoqi@8865 | 62 | |
| aoqi@8865 | 63 | #endif // CPU_MIPS_VM_C1_LIRASSEMBLER_MIPS_HPP |
