Thu, 05 Sep 2019 13:10:50 +0800 #9815 Backport of #9802 Code cleanup file | diff | annotate
Thu, 05 Sep 2019 13:07:31 +0800 #9372 Refactor VM_Version, removed UseLoongsonISA and Use3A3000, added UseLEXT1, UseLEXT2, UseLEXT3. file | diff | annotate
Tue, 05 Mar 2019 17:00:17 +0800 #8573 Cleanup: x86 registers in comments; comment style; deadcode file | diff | annotate
Wed, 12 Dec 2018 17:30:13 +0800 #7989 [C1] fix "assert(a != b) failed: registers must be different" file | diff | annotate
Tue, 27 Nov 2018 14:41:00 +0800 #7936 [C1] fix several "assert(is_simm16(imm)) failed: not a signed 16-bit int" and "assert(a != b) failed: registers must be different" file | diff | annotate
Fri, 23 Nov 2018 11:08:41 +0800 #7890 [C1] fix some assert errors for is_simm16 range check and Address construction check file | diff | annotate
Thu, 08 Nov 2018 20:41:50 +0800 #7833 [C1] fix bugs in LIR_Assembler::emit_profile_call file | diff | annotate
Tue, 30 Oct 2018 18:43:19 +0800 #7736 [C1] Fix langtools:tools/javac/BadOptimization/DeadCode4.java accidental removal of live code issue file | diff | annotate
Tue, 30 Oct 2018 12:00:09 +0800 #7780 [C1] fix LIR_Assembler::negate for single_cpu operands file | diff | annotate
Thu, 25 Oct 2018 16:32:27 +0800 #7734 [C1] optimize code generation for imul&idiv for mips file | diff | annotate
Wed, 19 Sep 2018 17:44:09 +0800 #7554 [C1] fix a java.lang.NullPointerException for compiler/stringopts/TestStringObjectInitialization.java file | diff | annotate
Thu, 13 Sep 2018 17:13:12 +0800 #7556 [C1] Fix compiler/5091921/Test6196102.java ERROR output issue file | diff | annotate
Wed, 12 Sep 2018 13:37:58 +0800 #7556 [C1] more readable code indentation for mips's LIR_Assembler::arith_op implementation file | diff | annotate
Tue, 11 Sep 2018 16:43:38 +0800 #7553 [C1] Fix LIR_Assembler::shift_op for _LP64 file | diff | annotate
Tue, 11 Sep 2018 15:53:45 +0800 #7552 [C1] Fix lir_ushr for T_INT file | diff | annotate
Mon, 10 Sep 2018 17:37:32 +0800 #7534 [C1] Fix SPECjvm2008:assert(is_simm16(v)) failed: must be simm16 issue file | diff | annotate
Tue, 04 Sep 2018 21:25:12 +0800 #7517 mRegP match a0_RegP file | diff | annotate
Wed, 29 Aug 2018 15:23:26 +0800 #7275 [C1] Fix another assert(is_simm16(v)) failed: must be simm16 issue file | diff | annotate
Wed, 29 Aug 2018 15:12:56 +0800 #7466 [C1] Remove an assert_different_registers in LIR_Assembler::shift_op. file | diff | annotate
Mon, 27 Aug 2018 14:26:57 +0800 #7429 [C1] Fix luindex:org.apache.lucene.index.FieldInfos.add issue file | diff | annotate
Fri, 24 Aug 2018 16:07:11 +0800 #7428 [C1] Improve the refactory of (base + index << scale + disp) file | diff | annotate
Fri, 24 Aug 2018 14:14:41 +0800 #7428 [C1] Refactory (base + index << scale + disp) load and store support file | diff | annotate
Mon, 20 Aug 2018 15:00:11 +0800 #7408 [C1] fix an SIGSEGV null pointer crash in java/nio/channels/Selector/RacyDeregister.java test file | diff | annotate
Mon, 20 Aug 2018 11:49:13 +0800 #7423 [C1] Fix (jvm98)_200_check:assert(divisor!=0) failed: must be nonzero issue file | diff | annotate
Wed, 15 Aug 2018 11:00:24 +0800 #7323 [C1] Used a wrong register in LIR_Assembler::emit_profile_type(). file | diff | annotate
Tue, 31 Jul 2018 18:54:20 +0800 #7283 [C1] Fix the jvm crash in frame::sender(RegisterMap*) file | diff | annotate
Wed, 25 Jul 2018 11:50:58 +0800 #7283 disable InlineArrayCopy for mips file | diff | annotate
Fri, 13 Jul 2018 14:14:12 +0800 #7277 Implement LIR_Assembler::emit_profile_type for MIPS file | diff | annotate
Thu, 12 Jul 2018 15:12:36 +0800 #7311 [C1] supported more types in reg2stack file | diff | annotate
Thu, 12 Jul 2018 13:13:03 +0800 #7223 [C1] reg2stack destroyed stack when type is T_FLOAT file | diff | annotate
Wed, 11 Jul 2018 12:55:36 +0800 #7284 [C1] Add vmIntrinsics::_dpow for mips file | diff | annotate
Tue, 10 Jul 2018 10:06:03 +0800 #7275 [C1] Fix assert(is_simm16(v)) failed: must be simm16 (/home/fool/c1/jdk8-mips-c1/hotspot/src/cpu/mips/vm/assembler_mips.cpp:246) file | diff | annotate
Mon, 09 Jul 2018 10:17:47 +0800 Trailing whitespace after 2966b0be4027 file | diff | annotate
Mon, 09 Jul 2018 09:20:14 +0800 #7238 [C1] cmove was added for mips to profile branch. file | diff | annotate
Fri, 15 Jun 2018 16:26:12 +0800 #7184 [C1] Fix assert(is_simm16(v)) failed: must be simm16 issue file | diff | annotate
Wed, 13 Jun 2018 11:47:13 +0800 #7183 [C1] Fix the CAS blocking isssue for mips file | diff | annotate
Tue, 12 Jun 2018 13:58:17 +0800 #7157 Fix all forgot saying delayed() when filling delay slot issues file | diff | annotate
Mon, 04 Jun 2018 17:40:51 +0800 #7124 [C1] Fix other delay slot errors for MIPS file | diff | annotate
Fri, 01 Jun 2018 11:16:45 +0800 #7124 [C1] Fix more delay slot errors for MIPS. file | diff | annotate
Thu, 31 May 2018 14:12:55 +0800 #7124 [C1] Fix a JNI error when running Alias for MIPS file | diff | annotate
Thu, 31 May 2018 09:47:21 +0800 #7124 [C1] Follows 9bcf17f0ada0, optimize the code generation. file | diff | annotate
Wed, 30 May 2018 16:23:38 +0800 #7124 [C1] Fix crash errors in Runtime1::slow_subtype_check for MIPS C1 file | diff | annotate
Mon, 28 May 2018 11:51:58 +0800 #7123 [C1] Fix an assert bug and a guarantee error. file | diff | annotate
Mon, 28 May 2018 09:47:14 +0800 [C1] Code review the changesets from 711 to 716 about C1 migration for MIPS. file | diff | annotate
Mon, 28 May 2018 09:00:08 +0800 #7083 [C1] Fix an assert error during linear scan reg allocation for MIPS. file | diff | annotate
Thu, 24 May 2018 19:49:50 +0800 some C1 fix file | diff | annotate
Thu, 07 Sep 2017 09:12:16 +0800 #5745 [Code Reorganization] code cleanup and code style fix file | diff | annotate
Fri, 29 Apr 2016 00:06:10 +0800 Added MIPS 64-bit port. file | diff | annotate
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