| Sat, 18 Feb 2017 18:25:01 -0500 |
[Assembler] Add right-rotate instructions for MIPS. |
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| Wed, 15 Feb 2017 10:22:07 -0500 |
[C2] Add instruct andL_Reg_immL_nonneg_mask in mips_64.ad |
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| Tue, 14 Feb 2017 18:51:47 -0500 |
[Assembler] Add gsandn/gsorn for Loongson CPUs. |
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| Tue, 14 Feb 2017 15:44:26 -0500 |
[C2] Enable instruct dins for MIPS CPUs. |
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| Tue, 14 Feb 2017 14:46:37 -0500 |
[C2] Add instruct shr_logical_Reg_imm_nonneg_mask in mips_64.add |
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| Mon, 13 Feb 2017 20:01:12 -0500 |
[C2] Add shr_logical_Reg_imm_mask63 in mips_64.ad |
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| Thu, 09 Feb 2017 04:53:02 -0500 |
[C2] Adjust the loading of long constants for MIPS. |
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| Thu, 09 Feb 2017 01:25:47 -0500 |
[Assembler] set64 & insts_for_set64 for MIPS are ported from sparc. |
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| Tue, 07 Feb 2017 11:22:07 +0800 |
#5022 [Assembler] Fix cvt_ps_s |
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| Wed, 01 Feb 2017 22:24:47 +0800 |
Add seb/seh instructions for MIPS CPUs. |
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| Fri, 09 Jun 2017 20:32:45 +0800 |
Rewrited Assembler, added new opcode and instructions, improved Disassembler. |
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| Fri, 09 Jun 2017 20:26:42 +0800 |
[Assembler] Add madd.fmt instruction for MIPS. |
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| Tue, 11 Oct 2016 08:56:49 +0800 |
Fixed the generation of offset part of some GS instructions. |
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| Sun, 09 Oct 2016 15:36:29 +0800 |
#4536 Added 128-bit memory access to generate_disjoint_short_copy. |
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| Thu, 18 Aug 2016 11:54:02 +0800 |
Fix a bug in the definitions of (gslwxc1/gsldxc1/gsswxc1/gssdxc1): Register --> FloatRegister. |
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| Thu, 18 Aug 2016 11:33:16 +0800 |
Add gsswxc1 and gssdxc1 instructions. |
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| Thu, 18 Aug 2016 11:29:03 +0800 |
Add gslwxc1 and gsldxc1 instruction. |
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| Tue, 16 Aug 2016 15:31:40 +0800 |
Add gslhx/gslbx instructions for Loongson processors. |
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| Tue, 16 Aug 2016 15:25:30 +0800 |
Add gsshx/gssbx instructions for Loongson processors. |
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| Tue, 16 Aug 2016 15:15:02 +0800 |
Add gsswx/gssdx instructions for Loongson processors. |
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| Wed, 10 Aug 2016 10:30:35 +0800 |
Add gsdmod instruction for Loongson processors. |
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| Wed, 10 Aug 2016 10:09:13 +0800 |
Add gsddiv instruction for Loongson processors. |
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| Wed, 10 Aug 2016 09:41:55 +0800 |
Add gsdmult instruction for Loongson processors. |
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| Wed, 10 Aug 2016 09:35:32 +0800 |
Add gsmod instruction for Loongson processors. |
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| Wed, 10 Aug 2016 09:06:24 +0800 |
Add gsdiv instruction for Loongson processors. |
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| Tue, 02 Aug 2016 18:49:44 +0800 |
Add multiply and add/subtract instructions (madd and msub) in MIPS assembler. |
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| Mon, 01 Aug 2016 19:34:35 +0800 |
Add move conditional instructions (movt and movf) in MIPS assembler. |
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| Sat, 30 Jul 2016 01:42:17 +0800 |
Instruction decoding support: add gsldx and gslwx in MIPS disassembler. |
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| Tue, 26 Jul 2016 17:06:17 +0800 |
Add multiply word to GPR instruction (mul) in MIPS assembler. |
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| Mon, 25 Jul 2016 11:37:27 +0800 |
Add move conditional instructions (movz and movn) in MIPS assembler. |
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| Tue, 28 Jun 2016 16:34:47 +0800 |
[Code Reorganization] Moved fast_lock and fast_unlock from mips_64.ad to MacroAssembler. |
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| Tue, 28 Jun 2016 15:59:50 +0800 |
Added flag PrintBiasedLockingStatistics support. |
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| Tue, 31 May 2016 00:22:06 -0400 |
[Code Reorganization] load_two_bytes_from_at_bcp -> get_2_byte_integer_at_bcp |
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| Mon, 30 May 2016 02:35:49 -0400 |
[Interpreter] Fixed unaligned load in InterpreterMacroAssembler::get_cache_index_at_bcp |
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| Fri, 29 Apr 2016 00:06:10 +0800 |
Added MIPS 64-bit port. |
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