Mercurial > jdk8-mips64-public > hotspot / changeset
changeset
#7046 C2 supports long branch
Thu, 24 May 2018 19:26:50 +0800
- author
- aoqi
- date
- Thu, 24 May 2018 19:26:50 +0800
- changeset 8862
- fd13a567f179
- parent 8861
- 2a33b32dd03c
- child 8863
- 5376ce0dc552
#7046 C2 supports long branch
Contributed-by: fujie
1.1 --- a/src/cpu/mips/vm/assembler_mips.cpp Thu May 24 19:24:53 2018 +0800 1.2 +++ b/src/cpu/mips/vm/assembler_mips.cpp Thu May 24 19:26:50 2018 +0800 1.3 @@ -237,7 +237,10 @@ 1.4 switch(opcode(inst)) { 1.5 case j_op: 1.6 case jal_op: 1.7 - assert(false, "should not use j/jal here"); 1.8 + case lui_op: 1.9 + case ori_op: 1.10 + case daddiu_op: 1.11 + ShouldNotReachHere(); 1.12 break; 1.13 default: 1.14 assert(is_simm16(v), "must be simm16");
2.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp Thu May 24 19:24:53 2018 +0800 2.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp Thu May 24 19:26:50 2018 +0800 2.3 @@ -95,6 +95,7 @@ 2.4 2.5 void MacroAssembler::pd_patch_instruction(address branch, address target) { 2.6 jint& stub_inst = *(jint*) branch; 2.7 + jint *pc = (jint *)branch; 2.8 2.9 /* * 2.10 move(AT, RA); // dadd 2.11 @@ -106,8 +107,7 @@ 2.12 move(RA, AT); 2.13 jr(T9); 2.14 */ 2.15 - if(special(stub_inst) == dadd_op) { 2.16 - jint *pc = (jint *)branch; 2.17 + if((opcode(stub_inst) == special_op) && (special(stub_inst) == dadd_op)) { 2.18 2.19 assert(opcode(pc[3]) == lui_op 2.20 && opcode(pc[4]) == ori_op 2.21 @@ -135,6 +135,14 @@ 2.22 __ nop(); 2.23 } 2.24 return; 2.25 + } else if (special(pc[4]) == jr_op 2.26 + && opcode(pc[4]) == special_op 2.27 + && (((opcode(pc[0]) == lui_op) || opcode(pc[0]) == daddiu_op) || (opcode(pc[0]) == ori_op))) { 2.28 + 2.29 + CodeBuffer cb(branch, 4 * 4); 2.30 + MacroAssembler masm(&cb); 2.31 + masm.patchable_set48(T9, (long)(target)); 2.32 + return; 2.33 } 2.34 2.35 #ifndef PRODUCT 2.36 @@ -332,6 +340,50 @@ 2.37 } 2.38 } 2.39 2.40 +void MacroAssembler::beq_long(Register rs, Register rt, Label& L) { 2.41 + Label not_taken; 2.42 + 2.43 + bne(rs, rt, not_taken); 2.44 + nop(); 2.45 + 2.46 + jmp_far(L); 2.47 + 2.48 + bind(not_taken); 2.49 +} 2.50 + 2.51 +void MacroAssembler::bne_long(Register rs, Register rt, Label& L) { 2.52 + Label not_taken; 2.53 + 2.54 + beq(rs, rt, not_taken); 2.55 + nop(); 2.56 + 2.57 + jmp_far(L); 2.58 + 2.59 + bind(not_taken); 2.60 +} 2.61 + 2.62 +void MacroAssembler::bc1t_long(Label& L) { 2.63 + Label not_taken; 2.64 + 2.65 + bc1f(not_taken); 2.66 + nop(); 2.67 + 2.68 + jmp_far(L); 2.69 + 2.70 + bind(not_taken); 2.71 +} 2.72 + 2.73 +void MacroAssembler::bc1f_long(Label& L) { 2.74 + Label not_taken; 2.75 + 2.76 + bc1t(not_taken); 2.77 + nop(); 2.78 + 2.79 + jmp_far(L); 2.80 + 2.81 + bind(not_taken); 2.82 +} 2.83 + 2.84 void MacroAssembler::b_far(Label& L) { 2.85 if (L.is_bound()) { 2.86 b_far(target(L)); 2.87 @@ -747,6 +799,26 @@ 2.88 } 2.89 } 2.90 2.91 +void MacroAssembler::jmp_far(Label& L) { 2.92 + if (L.is_bound()) { 2.93 + address entry = target(L); 2.94 + assert(entry != NULL, "jmp most probably wrong"); 2.95 + InstructionMark im(this); 2.96 + 2.97 + relocate(relocInfo::internal_word_type); 2.98 + patchable_set48(T9, (long)entry); 2.99 + } else { 2.100 + InstructionMark im(this); 2.101 + L.add_patch_at(code(), locator()); 2.102 + 2.103 + relocate(relocInfo::internal_word_type); 2.104 + patchable_set48(T9, (long)pc()); 2.105 + } 2.106 + 2.107 + jr(T9); 2.108 + nop(); 2.109 +} 2.110 + 2.111 void MacroAssembler::call(address entry) { 2.112 // c/c++ code assume T9 is entry point, so we just always move entry to t9 2.113 // maybe there is some more graceful method to handle this. FIXME
3.1 --- a/src/cpu/mips/vm/macroAssembler_mips.hpp Thu May 24 19:24:53 2018 +0800 3.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.hpp Thu May 24 19:26:50 2018 +0800 3.3 @@ -511,6 +511,7 @@ 3.4 // Jumps 3.5 void jmp(address entry); 3.6 void jmp(address entry, relocInfo::relocType rtype); 3.7 + void jmp_far(Label& L); // always long jumps 3.8 3.9 /* branches may exceed 16-bit offset */ 3.10 void b_far(address entry); 3.11 @@ -522,6 +523,12 @@ 3.12 void beq_far (Register rs, Register rt, address entry); 3.13 void beq_far (Register rs, Register rt, Label& L); 3.14 3.15 + // For C2 to support long branches 3.16 + void beq_long (Register rs, Register rt, Label& L); 3.17 + void bne_long (Register rs, Register rt, Label& L); 3.18 + void bc1t_long (Label& L); 3.19 + void bc1f_long (Label& L); 3.20 + 3.21 void patchable_call(address target); 3.22 void general_call(address target); 3.23
4.1 --- a/src/cpu/mips/vm/mips_64.ad Thu May 24 19:24:53 2018 +0800 4.2 +++ b/src/cpu/mips/vm/mips_64.ad Thu May 24 19:26:50 2018 +0800 4.3 @@ -654,7 +654,8 @@ 4.4 bool Matcher::is_short_branch_offset(int rule, int br_size, int offset) { 4.5 int offs = offset - br_size + 4; 4.6 // To be conservative on MIPS 4.7 - return Assembler::is_simm16((offs + 4) >> 2) && Assembler::is_simm16((offs - 4) >> 2); 4.8 + const int safety_zone = 3 * BytesPerInstWord; 4.9 + return Assembler::is_simm16((offs<0 ? offs-safety_zone : offs+safety_zone) >> 2); 4.10 } 4.11 4.12 4.13 @@ -1562,7 +1563,7 @@ 4.14 // Materialize the constant table base. 4.15 address baseaddr = consts_section->start() + -(constant_table.table_base_offset()); 4.16 // RelocationHolder rspec = internal_word_Relocation::spec(baseaddr); 4.17 - __ relocate(relocInfo::internal_pc_type); 4.18 + __ relocate(relocInfo::internal_word_type); 4.19 __ patchable_set48(Rtoc, (long)baseaddr); 4.20 } 4.21 } 4.22 @@ -6698,17 +6699,12 @@ 4.23 format %{ "JMP $labl #@jmpDir_long" %} 4.24 4.25 ins_encode %{ 4.26 - Label &L = *($labl$$label); 4.27 - if(&L) 4.28 - __ b(L); 4.29 - else 4.30 - __ b(int(0)); 4.31 - __ nop(); 4.32 - __ nop(); 4.33 - %} 4.34 - 4.35 - ins_pipe( pipe_jump ); 4.36 - ins_pc_relative(1); 4.37 + Label* L = $labl$$label; 4.38 + __ jmp_far(*L); 4.39 + %} 4.40 + 4.41 + ins_pipe( pipe_jump ); 4.42 + //ins_pc_relative(1); 4.43 %} 4.44 4.45 // Jump Direct Conditional - Label defines a relative address from Jcc+1 4.46 @@ -6721,55 +6717,35 @@ 4.47 ins_encode %{ 4.48 Register op1 = $src1$$Register; 4.49 Register op2 = $src2$$Register; 4.50 - Label &L = *($labl$$label); 4.51 + Label* L = $labl$$label; 4.52 int flag = $cop$$cmpcode; 4.53 4.54 switch(flag) { 4.55 case 0x01: //equal 4.56 - if (&L) 4.57 - __ beq(op1, op2, L); 4.58 - else 4.59 - __ beq(op1, op2, (int)0); 4.60 + __ beq_long(op1, op2, *L); 4.61 break; 4.62 case 0x02: //not_equal 4.63 - if (&L) 4.64 - __ bne(op1, op2, L); 4.65 - else 4.66 - __ bne(op1, op2, (int)0); 4.67 + __ bne_long(op1, op2, *L); 4.68 break; 4.69 case 0x03: //above 4.70 __ slt(AT, op2, op1); 4.71 - if(&L) 4.72 - __ bne(AT, R0, L); 4.73 - else 4.74 - __ bne(AT, R0, (int)0); 4.75 + __ bne_long(AT, R0, *L); 4.76 break; 4.77 case 0x04: //above_equal 4.78 __ slt(AT, op1, op2); 4.79 - if(&L) 4.80 - __ beq(AT, R0, L); 4.81 - else 4.82 - __ beq(AT, R0, (int)0); 4.83 + __ beq_long(AT, R0, *L); 4.84 break; 4.85 case 0x05: //below 4.86 __ slt(AT, op1, op2); 4.87 - if(&L) 4.88 - __ bne(AT, R0, L); 4.89 - else 4.90 - __ bne(AT, R0, (int)0); 4.91 + __ bne_long(AT, R0, *L); 4.92 break; 4.93 case 0x06: //below_equal 4.94 __ slt(AT, op2, op1); 4.95 - if(&L) 4.96 - __ beq(AT, R0, L); 4.97 - else 4.98 - __ beq(AT, R0, (int)0); 4.99 + __ beq_long(AT, R0, *L); 4.100 break; 4.101 default: 4.102 Unimplemented(); 4.103 } 4.104 - __ nop(); 4.105 - __ nop(); 4.106 %} 4.107 ins_pipe( pipe_jump ); 4.108 ins_pc_relative(1); 4.109 @@ -6784,57 +6760,37 @@ 4.110 ins_encode %{ 4.111 Register op1 = $src1$$Register; 4.112 Register op2 = AT; 4.113 - Label &L = *($labl$$label); 4.114 + Label* L = $labl$$label; 4.115 int flag = $cop$$cmpcode; 4.116 4.117 __ move(op2, $src2$$constant); 4.118 4.119 switch(flag) { 4.120 case 0x01: //equal 4.121 - if (&L) 4.122 - __ beq(op1, op2, L); 4.123 - else 4.124 - __ beq(op1, op2, (int)0); 4.125 + __ beq_long(op1, op2, *L); 4.126 break; 4.127 case 0x02: //not_equal 4.128 - if (&L) 4.129 - __ bne(op1, op2, L); 4.130 - else 4.131 - __ bne(op1, op2, (int)0); 4.132 + __ bne_long(op1, op2, *L); 4.133 break; 4.134 case 0x03: //above 4.135 __ slt(AT, op2, op1); 4.136 - if(&L) 4.137 - __ bne(AT, R0, L); 4.138 - else 4.139 - __ bne(AT, R0, (int)0); 4.140 + __ bne_long(AT, R0, *L); 4.141 break; 4.142 case 0x04: //above_equal 4.143 __ slt(AT, op1, op2); 4.144 - if(&L) 4.145 - __ beq(AT, R0, L); 4.146 - else 4.147 - __ beq(AT, R0, (int)0); 4.148 + __ beq_long(AT, R0, *L); 4.149 break; 4.150 case 0x05: //below 4.151 __ slt(AT, op1, op2); 4.152 - if(&L) 4.153 - __ bne(AT, R0, L); 4.154 - else 4.155 - __ bne(AT, R0, (int)0); 4.156 + __ bne_long(AT, R0, *L); 4.157 break; 4.158 case 0x06: //below_equal 4.159 __ slt(AT, op2, op1); 4.160 - if(&L) 4.161 - __ beq(AT, R0, L); 4.162 - else 4.163 - __ beq(AT, R0, (int)0); 4.164 + __ beq_long(AT, R0, *L); 4.165 break; 4.166 default: 4.167 Unimplemented(); 4.168 } 4.169 - __ nop(); 4.170 - __ nop(); 4.171 %} 4.172 ins_pipe( pipe_jump ); 4.173 ins_pc_relative(1); 4.174 @@ -6850,25 +6806,17 @@ 4.175 format %{ "J$cop $labl #mips uses AT as eflag @jmpCon_flags_long" %} 4.176 4.177 ins_encode %{ 4.178 - Label &L = *($labl$$label); 4.179 + Label* L = $labl$$label; 4.180 switch($cop$$cmpcode) { 4.181 case 0x01: //equal 4.182 - if (&L) 4.183 - __ bne(AT, R0, L); 4.184 - else 4.185 - __ bne(AT, R0, (int)0); 4.186 + __ bne_long(AT, R0, *L); 4.187 break; 4.188 case 0x02: //not equal 4.189 - if (&L) 4.190 - __ beq(AT, R0, L); 4.191 - else 4.192 - __ beq(AT, R0, (int)0); 4.193 + __ beq_long(AT, R0, *L); 4.194 break; 4.195 default: 4.196 Unimplemented(); 4.197 } 4.198 - __ nop(); 4.199 - __ nop(); 4.200 %} 4.201 4.202 ins_pipe( pipe_jump ); 4.203 @@ -6886,27 +6834,19 @@ 4.204 ins_encode %{ 4.205 Register op1 = $op1$$Register; 4.206 Register op2 = R0; 4.207 - Label &L = *($labl$$label); 4.208 + Label* L = $labl$$label; 4.209 int flag = $cmp$$cmpcode; 4.210 4.211 switch(flag) { 4.212 case 0x01: //equal 4.213 - if (&L) 4.214 - __ beq(op1, op2, L); 4.215 - else 4.216 - __ beq(op1, op2, (int)0); 4.217 + __ beq_long(op1, op2, *L); 4.218 break; 4.219 case 0x02: //not_equal 4.220 - if (&L) 4.221 - __ bne(op1, op2, L); 4.222 - else 4.223 - __ bne(op1, op2, (int)0); 4.224 + __ bne_long(op1, op2, *L); 4.225 break; 4.226 default: 4.227 Unimplemented(); 4.228 } 4.229 - __ nop(); 4.230 - __ nop(); 4.231 %} 4.232 4.233 ins_pc_relative(1); 4.234 @@ -6924,28 +6864,20 @@ 4.235 ins_encode %{ 4.236 Register op1 = $op1$$Register; 4.237 Register op2 = R0; 4.238 - Label &L = *($labl$$label); 4.239 + Label* L = $labl$$label; 4.240 int flag = $cmp$$cmpcode; 4.241 4.242 switch(flag) 4.243 { 4.244 case 0x01: //equal 4.245 - if (&L) 4.246 - __ beq(op1, op2, L); 4.247 - else 4.248 - __ beq(op1, op2, (int)0); 4.249 + __ beq_long(op1, op2, *L); 4.250 break; 4.251 case 0x02: //not_equal 4.252 - if (&L) 4.253 - __ bne(op1, op2, L); 4.254 - else 4.255 - __ bne(op1, op2, (int)0); 4.256 + __ bne_long(op1, op2, *L); 4.257 break; 4.258 default: 4.259 Unimplemented(); 4.260 } 4.261 - __ nop(); 4.262 - __ nop(); 4.263 %} 4.264 4.265 ins_pc_relative(1); 4.266 @@ -6964,55 +6896,35 @@ 4.267 ins_encode %{ 4.268 Register op1 = $op1$$Register; 4.269 Register op2 = $op2$$Register; 4.270 - Label &L = *($labl$$label); 4.271 + Label* L = $labl$$label; 4.272 int flag = $cmp$$cmpcode; 4.273 4.274 switch(flag) { 4.275 case 0x01: //equal 4.276 - if (&L) 4.277 - __ beq(op1, op2, L); 4.278 - else 4.279 - __ beq(op1, op2, (int)0); 4.280 + __ beq_long(op1, op2, *L); 4.281 break; 4.282 case 0x02: //not_equal 4.283 - if (&L) 4.284 - __ bne(op1, op2, L); 4.285 - else 4.286 - __ bne(op1, op2, (int)0); 4.287 + __ bne_long(op1, op2, *L); 4.288 break; 4.289 case 0x03: //above 4.290 __ sltu(AT, op2, op1); 4.291 - if(&L) 4.292 - __ bne(R0, AT, L); 4.293 - else 4.294 - __ bne(R0, AT, (int)0); 4.295 + __ bne_long(R0, AT, *L); 4.296 break; 4.297 case 0x04: //above_equal 4.298 __ sltu(AT, op1, op2); 4.299 - if(&L) 4.300 - __ beq(AT, R0, L); 4.301 - else 4.302 - __ beq(AT, R0, (int)0); 4.303 + __ beq_long(AT, R0, *L); 4.304 break; 4.305 case 0x05: //below 4.306 __ sltu(AT, op1, op2); 4.307 - if(&L) 4.308 - __ bne(R0, AT, L); 4.309 - else 4.310 - __ bne(R0, AT, (int)0); 4.311 + __ bne_long(R0, AT, *L); 4.312 break; 4.313 case 0x06: //below_equal 4.314 __ sltu(AT, op2, op1); 4.315 - if(&L) 4.316 - __ beq(AT, R0, L); 4.317 - else 4.318 - __ beq(AT, R0, (int)0); 4.319 + __ beq_long(AT, R0, *L); 4.320 break; 4.321 default: 4.322 Unimplemented(); 4.323 } 4.324 - __ nop(); 4.325 - __ nop(); 4.326 %} 4.327 4.328 ins_pc_relative(1); 4.329 @@ -7029,27 +6941,19 @@ 4.330 ins_encode %{ 4.331 Register op1 = $op1$$Register; 4.332 Register op2 = R0; 4.333 - Label &L = *($labl$$label); 4.334 + Label* L = $labl$$label; 4.335 int flag = $cmp$$cmpcode; 4.336 4.337 switch(flag) { 4.338 case 0x01: //equal 4.339 - if (&L) 4.340 - __ beq(op1, op2, L); 4.341 - else 4.342 - __ beq(op1, op2, (int)0); 4.343 + __ beq_long(op1, op2, *L); 4.344 break; 4.345 case 0x02: //not_equal 4.346 - if (&L) 4.347 - __ bne(op1, op2, L); 4.348 - else 4.349 - __ bne(op1, op2, (int)0); 4.350 + __ bne_long(op1, op2, *L); 4.351 break; 4.352 default: 4.353 Unimplemented(); 4.354 } 4.355 - __ nop(); 4.356 - __ nop(); 4.357 %} 4.358 //TODO: pipe_branchP or create pipe_branchN LEE 4.359 ins_pc_relative(1); 4.360 @@ -7066,55 +6970,35 @@ 4.361 ins_encode %{ 4.362 Register op1_reg = $op1$$Register; 4.363 Register op2_reg = $op2$$Register; 4.364 - Label &L = *($labl$$label); 4.365 + Label* L = $labl$$label; 4.366 int flag = $cmp$$cmpcode; 4.367 4.368 switch(flag) { 4.369 case 0x01: //equal 4.370 - if (&L) 4.371 - __ beq(op1_reg, op2_reg, L); 4.372 - else 4.373 - __ beq(op1_reg, op2_reg, (int)0); 4.374 + __ beq_long(op1_reg, op2_reg, *L); 4.375 break; 4.376 case 0x02: //not_equal 4.377 - if (&L) 4.378 - __ bne(op1_reg, op2_reg, L); 4.379 - else 4.380 - __ bne(op1_reg, op2_reg, (int)0); 4.381 + __ bne_long(op1_reg, op2_reg, *L); 4.382 break; 4.383 case 0x03: //above 4.384 __ sltu(AT, op2_reg, op1_reg); 4.385 - if(&L) 4.386 - __ bne(R0, AT, L); 4.387 - else 4.388 - __ bne(R0, AT, (int)0); 4.389 + __ bne_long(R0, AT, *L); 4.390 break; 4.391 case 0x04: //above_equal 4.392 __ sltu(AT, op1_reg, op2_reg); 4.393 - if(&L) 4.394 - __ beq(AT, R0, L); 4.395 - else 4.396 - __ beq(AT, R0, (int)0); 4.397 + __ beq_long(AT, R0, *L); 4.398 break; 4.399 case 0x05: //below 4.400 __ sltu(AT, op1_reg, op2_reg); 4.401 - if(&L) 4.402 - __ bne(R0, AT, L); 4.403 - else 4.404 - __ bne(R0, AT, (int)0); 4.405 + __ bne_long(R0, AT, *L); 4.406 break; 4.407 case 0x06: //below_equal 4.408 __ sltu(AT, op2_reg, op1_reg); 4.409 - if(&L) 4.410 - __ beq(AT, R0, L); 4.411 - else 4.412 - __ beq(AT, R0, (int)0); 4.413 + __ beq_long(AT, R0, *L); 4.414 break; 4.415 default: 4.416 Unimplemented(); 4.417 } 4.418 - __ nop(); 4.419 - __ nop(); 4.420 %} 4.421 ins_pc_relative(1); 4.422 ins_pipe( pipe_alu_branch ); 4.423 @@ -7128,55 +7012,35 @@ 4.424 ins_encode %{ 4.425 Register op1 = $src1$$Register; 4.426 Register op2 = $src2$$Register; 4.427 - Label &L = *($labl$$label); 4.428 + Label* L = $labl$$label; 4.429 int flag = $cmp$$cmpcode; 4.430 4.431 switch(flag) { 4.432 case 0x01: //equal 4.433 - if (&L) 4.434 - __ beq(op1, op2, L); 4.435 - else 4.436 - __ beq(op1, op2, (int)0); 4.437 + __ beq_long(op1, op2, *L); 4.438 break; 4.439 case 0x02: //not_equal 4.440 - if (&L) 4.441 - __ bne(op1, op2, L); 4.442 - else 4.443 - __ bne(op1, op2, (int)0); 4.444 + __ bne_long(op1, op2, *L); 4.445 break; 4.446 case 0x03: //above 4.447 __ sltu(AT, op2, op1); 4.448 - if(&L) 4.449 - __ bne(AT, R0, L); 4.450 - else 4.451 - __ bne(AT, R0, (int)0); 4.452 + __ bne_long(AT, R0, *L); 4.453 break; 4.454 case 0x04: //above_equal 4.455 __ sltu(AT, op1, op2); 4.456 - if(&L) 4.457 - __ beq(AT, R0, L); 4.458 - else 4.459 - __ beq(AT, R0, (int)0); 4.460 + __ beq_long(AT, R0, *L); 4.461 break; 4.462 case 0x05: //below 4.463 __ sltu(AT, op1, op2); 4.464 - if(&L) 4.465 - __ bne(AT, R0, L); 4.466 - else 4.467 - __ bne(AT, R0, (int)0); 4.468 + __ bne_long(AT, R0, *L); 4.469 break; 4.470 case 0x06: //below_equal 4.471 __ sltu(AT, op2, op1); 4.472 - if(&L) 4.473 - __ beq(AT, R0, L); 4.474 - else 4.475 - __ beq(AT, R0, (int)0); 4.476 + __ beq_long(AT, R0, *L); 4.477 break; 4.478 default: 4.479 Unimplemented(); 4.480 } 4.481 - __ nop(); 4.482 - __ nop(); 4.483 %} 4.484 4.485 ins_pc_relative(1); 4.486 @@ -7192,56 +7056,36 @@ 4.487 ins_encode %{ 4.488 Register op1 = $src1$$Register; 4.489 int val = $src2$$constant; 4.490 - Label &L = *($labl$$label); 4.491 + Label* L = $labl$$label; 4.492 int flag = $cmp$$cmpcode; 4.493 4.494 __ move(AT, val); 4.495 switch(flag) { 4.496 case 0x01: //equal 4.497 - if (&L) 4.498 - __ beq(op1, AT, L); 4.499 - else 4.500 - __ beq(op1, AT, (int)0); 4.501 + __ beq_long(op1, AT, *L); 4.502 break; 4.503 case 0x02: //not_equal 4.504 - if (&L) 4.505 - __ bne(op1, AT, L); 4.506 - else 4.507 - __ bne(op1, AT, (int)0); 4.508 + __ bne_long(op1, AT, *L); 4.509 break; 4.510 case 0x03: //above 4.511 __ sltu(AT, AT, op1); 4.512 - if(&L) 4.513 - __ bne(R0, AT, L); 4.514 - else 4.515 - __ bne(R0, AT, (int)0); 4.516 + __ bne_long(R0, AT, *L); 4.517 break; 4.518 case 0x04: //above_equal 4.519 __ sltu(AT, op1, AT); 4.520 - if(&L) 4.521 - __ beq(AT, R0, L); 4.522 - else 4.523 - __ beq(AT, R0, (int)0); 4.524 + __ beq_long(AT, R0, *L); 4.525 break; 4.526 case 0x05: //below 4.527 __ sltu(AT, op1, AT); 4.528 - if(&L) 4.529 - __ bne(R0, AT, L); 4.530 - else 4.531 - __ bne(R0, AT, (int)0); 4.532 + __ bne_long(R0, AT, *L); 4.533 break; 4.534 case 0x06: //below_equal 4.535 __ sltu(AT, AT, op1); 4.536 - if(&L) 4.537 - __ beq(AT, R0, L); 4.538 - else 4.539 - __ beq(AT, R0, (int)0); 4.540 + __ beq_long(AT, R0, *L); 4.541 break; 4.542 default: 4.543 Unimplemented(); 4.544 } 4.545 - __ nop(); 4.546 - __ nop(); 4.547 %} 4.548 4.549 ins_pc_relative(1); 4.550 @@ -7256,55 +7100,35 @@ 4.551 ins_encode %{ 4.552 Register op1 = $src1$$Register; 4.553 Register op2 = $src2$$Register; 4.554 - Label &L = *($labl$$label); 4.555 + Label* L = $labl$$label; 4.556 int flag = $cmp$$cmpcode; 4.557 4.558 switch(flag) { 4.559 case 0x01: //equal 4.560 - if (&L) 4.561 - __ beq(op1, op2, L); 4.562 - else 4.563 - __ beq(op1, op2, (int)0); 4.564 + __ beq_long(op1, op2, *L); 4.565 break; 4.566 case 0x02: //not_equal 4.567 - if (&L) 4.568 - __ bne(op1, op2, L); 4.569 - else 4.570 - __ bne(op1, op2, (int)0); 4.571 + __ bne_long(op1, op2, *L); 4.572 break; 4.573 case 0x03: //above 4.574 __ slt(AT, op2, op1); 4.575 - if(&L) 4.576 - __ bne(R0, AT, L); 4.577 - else 4.578 - __ bne(R0, AT, (int)0); 4.579 + __ bne_long(R0, AT, *L); 4.580 break; 4.581 case 0x04: //above_equal 4.582 __ slt(AT, op1, op2); 4.583 - if(&L) 4.584 - __ beq(AT, R0, L); 4.585 - else 4.586 - __ beq(AT, R0, (int)0); 4.587 + __ beq_long(AT, R0, *L); 4.588 break; 4.589 case 0x05: //below 4.590 __ slt(AT, op1, op2); 4.591 - if(&L) 4.592 - __ bne(R0, AT, L); 4.593 - else 4.594 - __ bne(R0, AT, (int)0); 4.595 + __ bne_long(R0, AT, *L); 4.596 break; 4.597 case 0x06: //below_equal 4.598 __ slt(AT, op2, op1); 4.599 - if(&L) 4.600 - __ beq(AT, R0, L); 4.601 - else 4.602 - __ beq(AT, R0, (int)0); 4.603 - break; 4.604 + __ beq_long(AT, R0, *L); 4.605 + break; 4.606 default: 4.607 Unimplemented(); 4.608 } 4.609 - __ nop(); 4.610 - __ nop(); 4.611 %} 4.612 4.613 ins_pc_relative(1); 4.614 @@ -7319,58 +7143,41 @@ 4.615 4.616 ins_encode %{ 4.617 Register op1 = $src1$$Register; 4.618 - Label &L = *($labl$$label); 4.619 + Label* L = $labl$$label; 4.620 int flag = $cmp$$cmpcode; 4.621 4.622 switch(flag) { 4.623 case 0x01: //equal 4.624 - if (&L) 4.625 - __ beq(op1, R0, L); 4.626 - else 4.627 - __ beq(op1, R0, (int)0); 4.628 + __ beq_long(op1, R0, *L); 4.629 break; 4.630 case 0x02: //not_equal 4.631 - if (&L) 4.632 - __ bne(op1, R0, L); 4.633 - else 4.634 - __ bne(op1, R0, (int)0); 4.635 + __ bne_long(op1, R0, *L); 4.636 break; 4.637 case 0x03: //greater 4.638 - if(&L) 4.639 - __ bgtz(op1, L); 4.640 - else 4.641 - __ bgtz(op1, (int)0); 4.642 + __ slt(AT, R0, op1); 4.643 + __ bne_long(R0, AT, *L); 4.644 break; 4.645 case 0x04: //greater_equal 4.646 - if(&L) 4.647 - __ bgez(op1, L); 4.648 - else 4.649 - __ bgez(op1, (int)0); 4.650 + __ slt(AT, op1, R0); 4.651 + __ beq_long(AT, R0, *L); 4.652 break; 4.653 case 0x05: //less 4.654 - if(&L) 4.655 - __ bltz(op1, L); 4.656 - else 4.657 - __ bltz(op1, (int)0); 4.658 + __ slt(AT, op1, R0); 4.659 + __ bne_long(R0, AT, *L); 4.660 break; 4.661 case 0x06: //less_equal 4.662 - if(&L) 4.663 - __ blez(op1, L); 4.664 - else 4.665 - __ blez(op1, (int)0); 4.666 - break; 4.667 + __ slt(AT, R0, op1); 4.668 + __ beq_long(AT, R0, *L); 4.669 + break; 4.670 default: 4.671 Unimplemented(); 4.672 } 4.673 - __ nop(); 4.674 - __ nop(); 4.675 %} 4.676 4.677 ins_pc_relative(1); 4.678 ins_pipe( pipe_alu_branch ); 4.679 %} 4.680 4.681 - 4.682 instruct branchConI_reg_imm_long(cmpOp cmp, mRegI src1, immI src2, label labl) %{ 4.683 match( If cmp (CmpI src1 src2) ); 4.684 effect(USE labl); 4.685 @@ -7380,56 +7187,36 @@ 4.686 ins_encode %{ 4.687 Register op1 = $src1$$Register; 4.688 int val = $src2$$constant; 4.689 - Label &L = *($labl$$label); 4.690 + Label* L = $labl$$label; 4.691 int flag = $cmp$$cmpcode; 4.692 4.693 __ move(AT, val); 4.694 switch(flag) { 4.695 case 0x01: //equal 4.696 - if (&L) 4.697 - __ beq(op1, AT, L); 4.698 - else 4.699 - __ beq(op1, AT, (int)0); 4.700 + __ beq_long(op1, AT, *L); 4.701 break; 4.702 case 0x02: //not_equal 4.703 - if (&L) 4.704 - __ bne(op1, AT, L); 4.705 - else 4.706 - __ bne(op1, AT, (int)0); 4.707 + __ bne_long(op1, AT, *L); 4.708 break; 4.709 case 0x03: //greater 4.710 __ slt(AT, AT, op1); 4.711 - if(&L) 4.712 - __ bne(R0, AT, L); 4.713 - else 4.714 - __ bne(R0, AT, (int)0); 4.715 + __ bne_long(R0, AT, *L); 4.716 break; 4.717 case 0x04: //greater_equal 4.718 __ slt(AT, op1, AT); 4.719 - if(&L) 4.720 - __ beq(AT, R0, L); 4.721 - else 4.722 - __ beq(AT, R0, (int)0); 4.723 + __ beq_long(AT, R0, *L); 4.724 break; 4.725 case 0x05: //less 4.726 __ slt(AT, op1, AT); 4.727 - if(&L) 4.728 - __ bne(R0, AT, L); 4.729 - else 4.730 - __ bne(R0, AT, (int)0); 4.731 + __ bne_long(R0, AT, *L); 4.732 break; 4.733 case 0x06: //less_equal 4.734 __ slt(AT, AT, op1); 4.735 - if(&L) 4.736 - __ beq(AT, R0, L); 4.737 - else 4.738 - __ beq(AT, R0, (int)0); 4.739 + __ beq_long(AT, R0, *L); 4.740 break; 4.741 default: 4.742 Unimplemented(); 4.743 } 4.744 - __ nop(); 4.745 - __ nop(); 4.746 %} 4.747 4.748 ins_pc_relative(1); 4.749 @@ -7443,49 +7230,32 @@ 4.750 4.751 ins_encode %{ 4.752 Register op1 = $src1$$Register; 4.753 - Label &L = *($labl$$label); 4.754 + Label* L = $labl$$label; 4.755 int flag = $cmp$$cmpcode; 4.756 4.757 switch(flag) { 4.758 case 0x01: //equal 4.759 - if (&L) 4.760 - __ beq(op1, R0, L); 4.761 - else 4.762 - __ beq(op1, R0, (int)0); 4.763 + __ beq_long(op1, R0, *L); 4.764 break; 4.765 case 0x02: //not_equal 4.766 - if (&L) 4.767 - __ bne(op1, R0, L); 4.768 - else 4.769 - __ bne(op1, R0, (int)0); 4.770 + __ bne_long(op1, R0, *L); 4.771 break; 4.772 case 0x03: //above 4.773 - if(&L) 4.774 - __ bne(R0, op1, L); 4.775 - else 4.776 - __ bne(R0, op1, (int)0); 4.777 + __ bne_long(R0, op1, *L); 4.778 break; 4.779 case 0x04: //above_equal 4.780 - if(&L) 4.781 - __ beq(R0, R0, L); 4.782 - else 4.783 - __ beq(R0, R0, (int)0); 4.784 + __ beq_long(R0, R0, *L); 4.785 break; 4.786 case 0x05: //below 4.787 return; 4.788 break; 4.789 case 0x06: //below_equal 4.790 - if(&L) 4.791 - __ beq(op1, R0, L); 4.792 - else 4.793 - __ beq(op1, R0, (int)0); 4.794 + __ beq_long(op1, R0, *L); 4.795 break; 4.796 default: 4.797 Unimplemented(); 4.798 } 4.799 - __ nop(); 4.800 - __ nop(); 4.801 - %} 4.802 + %} 4.803 4.804 ins_pc_relative(1); 4.805 ins_pipe( pipe_alu_branch ); 4.806 @@ -7501,59 +7271,39 @@ 4.807 ins_encode %{ 4.808 Register op1 = $src1$$Register; 4.809 int val = $src2$$constant; 4.810 - Label &L = *($labl$$label); 4.811 + Label* L = $labl$$label; 4.812 int flag = $cmp$$cmpcode; 4.813 4.814 switch(flag) { 4.815 case 0x01: //equal 4.816 __ move(AT, val); 4.817 - if (&L) 4.818 - __ beq(op1, AT, L); 4.819 - else 4.820 - __ beq(op1, AT, (int)0); 4.821 + __ beq_long(op1, AT, *L); 4.822 break; 4.823 case 0x02: //not_equal 4.824 __ move(AT, val); 4.825 - if (&L) 4.826 - __ bne(op1, AT, L); 4.827 - else 4.828 - __ bne(op1, AT, (int)0); 4.829 + __ bne_long(op1, AT, *L); 4.830 break; 4.831 case 0x03: //above 4.832 __ move(AT, val); 4.833 __ sltu(AT, AT, op1); 4.834 - if(&L) 4.835 - __ bne(R0, AT, L); 4.836 - else 4.837 - __ bne(R0, AT, (int)0); 4.838 + __ bne_long(R0, AT, *L); 4.839 break; 4.840 case 0x04: //above_equal 4.841 __ sltiu(AT, op1, val); 4.842 - if(&L) 4.843 - __ beq(AT, R0, L); 4.844 - else 4.845 - __ beq(AT, R0, (int)0); 4.846 + __ beq_long(AT, R0, *L); 4.847 break; 4.848 case 0x05: //below 4.849 __ sltiu(AT, op1, val); 4.850 - if(&L) 4.851 - __ bne(R0, AT, L); 4.852 - else 4.853 - __ bne(R0, AT, (int)0); 4.854 + __ bne_long(R0, AT, *L); 4.855 break; 4.856 case 0x06: //below_equal 4.857 __ move(AT, val); 4.858 __ sltu(AT, AT, op1); 4.859 - if(&L) 4.860 - __ beq(AT, R0, L); 4.861 - else 4.862 - __ beq(AT, R0, (int)0); 4.863 + __ beq_long(AT, R0, *L); 4.864 break; 4.865 default: 4.866 Unimplemented(); 4.867 } 4.868 - __ nop(); 4.869 - __ nop(); 4.870 %} 4.871 4.872 ins_pc_relative(1); 4.873 @@ -7571,70 +7321,41 @@ 4.874 Register opr1_reg = as_Register($src1$$reg); 4.875 Register opr2_reg = as_Register($src2$$reg); 4.876 4.877 - Label &target = *($labl$$label); 4.878 + Label* target = $labl$$label; 4.879 int flag = $cmp$$cmpcode; 4.880 4.881 switch(flag) { 4.882 case 0x01: //equal 4.883 - if (&target) 4.884 - __ beq(opr1_reg, opr2_reg, target); 4.885 - else 4.886 - __ beq(opr1_reg, opr2_reg, (int)0); 4.887 - __ delayed()->nop(); 4.888 + __ beq_long(opr1_reg, opr2_reg, *target); 4.889 break; 4.890 4.891 case 0x02: //not_equal 4.892 - if(&target) 4.893 - __ bne(opr1_reg, opr2_reg, target); 4.894 - else 4.895 - __ bne(opr1_reg, opr2_reg, (int)0); 4.896 - __ delayed()->nop(); 4.897 + __ bne_long(opr1_reg, opr2_reg, *target); 4.898 break; 4.899 4.900 case 0x03: //greater 4.901 __ slt(AT, opr2_reg, opr1_reg); 4.902 - if(&target) 4.903 - __ bne(AT, R0, target); 4.904 - else 4.905 - __ bne(AT, R0, (int)0); 4.906 - __ delayed()->nop(); 4.907 + __ bne_long(AT, R0, *target); 4.908 break; 4.909 4.910 case 0x04: //greater_equal 4.911 __ slt(AT, opr1_reg, opr2_reg); 4.912 - if(&target) 4.913 - __ beq(AT, R0, target); 4.914 - else 4.915 - __ beq(AT, R0, (int)0); 4.916 - __ delayed()->nop(); 4.917 - 4.918 + __ beq_long(AT, R0, *target); 4.919 break; 4.920 4.921 case 0x05: //less 4.922 __ slt(AT, opr1_reg, opr2_reg); 4.923 - if(&target) 4.924 - __ bne(AT, R0, target); 4.925 - else 4.926 - __ bne(AT, R0, (int)0); 4.927 - __ delayed()->nop(); 4.928 - 4.929 + __ bne_long(AT, R0, *target); 4.930 break; 4.931 4.932 case 0x06: //less_equal 4.933 __ slt(AT, opr2_reg, opr1_reg); 4.934 - 4.935 - if(&target) 4.936 - __ beq(AT, R0, target); 4.937 - else 4.938 - __ beq(AT, R0, (int)0); 4.939 - __ delayed()->nop(); 4.940 - 4.941 + __ beq_long(AT, R0, *target); 4.942 break; 4.943 4.944 default: 4.945 Unimplemented(); 4.946 } 4.947 - __ nop(); 4.948 %} 4.949 4.950 4.951 @@ -7642,7 +7363,6 @@ 4.952 ins_pipe( pipe_alu_branch ); 4.953 %} 4.954 4.955 - 4.956 instruct branchConL_regL_immL0_long(cmpOp cmp, mRegL src1, immL0 zero, label labl) %{ 4.957 match( If cmp (CmpL src1 zero) ); 4.958 effect(USE labl); 4.959 @@ -7651,58 +7371,43 @@ 4.960 4.961 ins_encode %{ 4.962 Register opr1_reg = as_Register($src1$$reg); 4.963 - Label &target = *($labl$$label); 4.964 + Register opr2_reg = R0; 4.965 + 4.966 + Label* target = $labl$$label; 4.967 int flag = $cmp$$cmpcode; 4.968 4.969 switch(flag) { 4.970 case 0x01: //equal 4.971 - if (&target) 4.972 - __ beq(opr1_reg, R0, target); 4.973 - else 4.974 - __ beq(opr1_reg, R0, int(0)); 4.975 + __ beq_long(opr1_reg, opr2_reg, *target); 4.976 break; 4.977 4.978 case 0x02: //not_equal 4.979 - if(&target) 4.980 - __ bne(opr1_reg, R0, target); 4.981 - else 4.982 - __ bne(opr1_reg, R0, (int)0); 4.983 + __ bne_long(opr1_reg, opr2_reg, *target); 4.984 break; 4.985 4.986 case 0x03: //greater 4.987 - if(&target) 4.988 - __ bgtz(opr1_reg, target); 4.989 - else 4.990 - __ bgtz(opr1_reg, (int)0); 4.991 - break; 4.992 + __ slt(AT, opr2_reg, opr1_reg); 4.993 + __ bne_long(AT, R0, *target); 4.994 + break; 4.995 4.996 case 0x04: //greater_equal 4.997 - if(&target) 4.998 - __ bgez(opr1_reg, target); 4.999 - else 4.1000 - __ bgez(opr1_reg, (int)0); 4.1001 + __ slt(AT, opr1_reg, opr2_reg); 4.1002 + __ beq_long(AT, R0, *target); 4.1003 break; 4.1004 4.1005 case 0x05: //less 4.1006 - __ slt(AT, opr1_reg, R0); 4.1007 - if(&target) 4.1008 - __ bne(AT, R0, target); 4.1009 - else 4.1010 - __ bne(AT, R0, (int)0); 4.1011 + __ slt(AT, opr1_reg, opr2_reg); 4.1012 + __ bne_long(AT, R0, *target); 4.1013 break; 4.1014 4.1015 case 0x06: //less_equal 4.1016 - if (&target) 4.1017 - __ blez(opr1_reg, target); 4.1018 - else 4.1019 - __ blez(opr1_reg, int(0)); 4.1020 + __ slt(AT, opr2_reg, opr1_reg); 4.1021 + __ beq_long(AT, R0, *target); 4.1022 break; 4.1023 4.1024 default: 4.1025 - Unimplemented(); 4.1026 - } 4.1027 - __ delayed()->nop(); 4.1028 - __ nop(); 4.1029 + Unimplemented(); 4.1030 + } 4.1031 %} 4.1032 4.1033 4.1034 @@ -7720,63 +7425,43 @@ 4.1035 Register opr1_reg = as_Register($src1$$reg); 4.1036 Register opr2_reg = AT; 4.1037 4.1038 - Label &target = *($labl$$label); 4.1039 + Label* target = $labl$$label; 4.1040 int flag = $cmp$$cmpcode; 4.1041 4.1042 __ set64(opr2_reg, $src2$$constant); 4.1043 4.1044 switch(flag) { 4.1045 case 0x01: //equal 4.1046 - if (&target) 4.1047 - __ beq(opr1_reg, opr2_reg, target); 4.1048 - else 4.1049 - __ beq(opr1_reg, opr2_reg, (int)0); 4.1050 + __ beq_long(opr1_reg, opr2_reg, *target); 4.1051 break; 4.1052 4.1053 case 0x02: //not_equal 4.1054 - if(&target) 4.1055 - __ bne(opr1_reg, opr2_reg, target); 4.1056 - else 4.1057 - __ bne(opr1_reg, opr2_reg, (int)0); 4.1058 + __ bne_long(opr1_reg, opr2_reg, *target); 4.1059 break; 4.1060 4.1061 case 0x03: //greater 4.1062 __ slt(AT, opr2_reg, opr1_reg); 4.1063 - if(&target) 4.1064 - __ bne(AT, R0, target); 4.1065 - else 4.1066 - __ bne(AT, R0, (int)0); 4.1067 + __ bne_long(AT, R0, *target); 4.1068 break; 4.1069 4.1070 case 0x04: //greater_equal 4.1071 __ slt(AT, opr1_reg, opr2_reg); 4.1072 - if(&target) 4.1073 - __ beq(AT, R0, target); 4.1074 - else 4.1075 - __ beq(AT, R0, (int)0); 4.1076 + __ beq_long(AT, R0, *target); 4.1077 break; 4.1078 4.1079 case 0x05: //less 4.1080 __ slt(AT, opr1_reg, opr2_reg); 4.1081 - if(&target) 4.1082 - __ bne(AT, R0, target); 4.1083 - else 4.1084 - __ bne(AT, R0, (int)0); 4.1085 + __ bne_long(AT, R0, *target); 4.1086 break; 4.1087 4.1088 case 0x06: //less_equal 4.1089 __ slt(AT, opr2_reg, opr1_reg); 4.1090 - if(&target) 4.1091 - __ beq(AT, R0, target); 4.1092 - else 4.1093 - __ beq(AT, R0, (int)0); 4.1094 + __ beq_long(AT, R0, *target); 4.1095 break; 4.1096 4.1097 default: 4.1098 Unimplemented(); 4.1099 } 4.1100 - __ nop(); 4.1101 - __ nop(); 4.1102 %} 4.1103 4.1104 4.1105 @@ -7794,57 +7479,37 @@ 4.1106 ins_encode %{ 4.1107 FloatRegister reg_op1 = $src1$$FloatRegister; 4.1108 FloatRegister reg_op2 = $src2$$FloatRegister; 4.1109 - Label &L = *($labl$$label); 4.1110 + Label* L = $labl$$label; 4.1111 int flag = $cmp$$cmpcode; 4.1112 4.1113 switch(flag) { 4.1114 case 0x01: //equal 4.1115 __ c_eq_s(reg_op1, reg_op2); 4.1116 - if (&L) 4.1117 - __ bc1t(L); 4.1118 - else 4.1119 - __ bc1t((int)0); 4.1120 + __ bc1t_long(*L); 4.1121 break; 4.1122 case 0x02: //not_equal 4.1123 __ c_eq_s(reg_op1, reg_op2); 4.1124 - if (&L) 4.1125 - __ bc1f(L); 4.1126 - else 4.1127 - __ bc1f((int)0); 4.1128 + __ bc1f_long(*L); 4.1129 break; 4.1130 case 0x03: //greater 4.1131 __ c_ule_s(reg_op1, reg_op2); 4.1132 - if(&L) 4.1133 - __ bc1f(L); 4.1134 - else 4.1135 - __ bc1f((int)0); 4.1136 + __ bc1f_long(*L); 4.1137 break; 4.1138 case 0x04: //greater_equal 4.1139 __ c_ult_s(reg_op1, reg_op2); 4.1140 - if(&L) 4.1141 - __ bc1f(L); 4.1142 - else 4.1143 - __ bc1f((int)0); 4.1144 + __ bc1f_long(*L); 4.1145 break; 4.1146 case 0x05: //less 4.1147 __ c_ult_s(reg_op1, reg_op2); 4.1148 - if(&L) 4.1149 - __ bc1t(L); 4.1150 - else 4.1151 - __ bc1t((int)0); 4.1152 + __ bc1t_long(*L); 4.1153 break; 4.1154 case 0x06: //less_equal 4.1155 __ c_ule_s(reg_op1, reg_op2); 4.1156 - if(&L) 4.1157 - __ bc1t(L); 4.1158 - else 4.1159 - __ bc1t((int)0); 4.1160 + __ bc1t_long(*L); 4.1161 break; 4.1162 default: 4.1163 Unimplemented(); 4.1164 } 4.1165 - __ nop(); 4.1166 - __ nop(); 4.1167 %} 4.1168 4.1169 ins_pc_relative(1); 4.1170 @@ -7859,58 +7524,38 @@ 4.1171 ins_encode %{ 4.1172 FloatRegister reg_op1 = $src1$$FloatRegister; 4.1173 FloatRegister reg_op2 = $src2$$FloatRegister; 4.1174 - Label &L = *($labl$$label); 4.1175 + Label* L = $labl$$label; 4.1176 int flag = $cmp$$cmpcode; 4.1177 4.1178 switch(flag) { 4.1179 case 0x01: //equal 4.1180 __ c_eq_d(reg_op1, reg_op2); 4.1181 - if (&L) 4.1182 - __ bc1t(L); 4.1183 - else 4.1184 - __ bc1t((int)0); 4.1185 + __ bc1t_long(*L); 4.1186 break; 4.1187 case 0x02: //not_equal 4.1188 //2016/4/19 aoqi: c_ueq_d cannot distinguish NaN from equal. Double.isNaN(Double) is implemented by 'f != f', so the use of c_ueq_d causes bugs. 4.1189 __ c_eq_d(reg_op1, reg_op2); 4.1190 - if (&L) 4.1191 - __ bc1f(L); 4.1192 - else 4.1193 - __ bc1f((int)0); 4.1194 + __ bc1f_long(*L); 4.1195 break; 4.1196 case 0x03: //greater 4.1197 __ c_ule_d(reg_op1, reg_op2); 4.1198 - if(&L) 4.1199 - __ bc1f(L); 4.1200 - else 4.1201 - __ bc1f((int)0); 4.1202 + __ bc1f_long(*L); 4.1203 break; 4.1204 case 0x04: //greater_equal 4.1205 __ c_ult_d(reg_op1, reg_op2); 4.1206 - if(&L) 4.1207 - __ bc1f(L); 4.1208 - else 4.1209 - __ bc1f((int)0); 4.1210 + __ bc1f_long(*L); 4.1211 break; 4.1212 case 0x05: //less 4.1213 __ c_ult_d(reg_op1, reg_op2); 4.1214 - if(&L) 4.1215 - __ bc1t(L); 4.1216 - else 4.1217 - __ bc1t((int)0); 4.1218 + __ bc1t_long(*L); 4.1219 break; 4.1220 case 0x06: //less_equal 4.1221 __ c_ule_d(reg_op1, reg_op2); 4.1222 - if(&L) 4.1223 - __ bc1t(L); 4.1224 - else 4.1225 - __ bc1t((int)0); 4.1226 + __ bc1t_long(*L); 4.1227 break; 4.1228 default: 4.1229 Unimplemented(); 4.1230 } 4.1231 - __ nop(); 4.1232 - __ nop(); 4.1233 %} 4.1234 4.1235 ins_pc_relative(1); 4.1236 @@ -7934,7 +7579,7 @@ 4.1237 if(&L) 4.1238 __ b(L); 4.1239 else 4.1240 - __ b(int(0)); 4.1241 + __ b(int(0)); 4.1242 __ nop(); 4.1243 %} 4.1244
5.1 --- a/src/cpu/mips/vm/relocInfo_mips.cpp Thu May 24 19:24:53 2018 +0800 5.2 +++ b/src/cpu/mips/vm/relocInfo_mips.cpp Thu May 24 19:26:50 2018 +0800 5.3 @@ -120,7 +120,6 @@ 5.4 5.5 5.6 address Relocation::pd_get_address_from_code() { 5.7 - tty->print_cr("%s: %d", __func__, __LINE__); //aoqi_test 5.8 NativeMovConstReg* ni = nativeMovConstReg_at(addr()); 5.9 return (address)ni->data(); 5.10 }
6.1 --- a/src/share/vm/opto/output.cpp Thu May 24 19:24:53 2018 +0800 6.2 +++ b/src/share/vm/opto/output.cpp Thu May 24 19:26:50 2018 +0800 6.3 @@ -554,10 +554,6 @@ 6.4 DEBUG_ONLY( jmp_target[i] = bnum; ); 6.5 DEBUG_ONLY( jmp_rule[i] = mach->rule(); ); 6.6 } else { 6.7 -#ifdef MIPS64 6.8 - env()->record_method_not_compilable("Branch out of range for MIPS"); 6.9 - return; 6.10 -#endif 6.11 // The jump distance is not short, try again during next iteration. 6.12 has_short_branch_candidate = true; 6.13 } 6.14 @@ -1169,9 +1165,6 @@ 6.15 // Pre-compute the length of blocks and replace 6.16 // long branches with short if machine supports it. 6.17 shorten_branches(blk_starts, code_req, locs_req, stub_req); 6.18 -#ifdef MIPS64 6.19 - if (failing()) return NULL; // Branch out of range for MIPS 6.20 -#endif 6.21 6.22 // nmethod and CodeBuffer count stubs & constants as part of method's code. 6.23 // class HandlerImpl is platform-specific and defined in the *.ad files.
