src/cpu/mips/vm/macroAssembler_mips.cpp

changeset 8862
fd13a567f179
parent 8019
3fb3ceb7398f
child 8865
ffcdff41a92f
     1.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp	Thu May 24 19:24:53 2018 +0800
     1.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp	Thu May 24 19:26:50 2018 +0800
     1.3 @@ -95,6 +95,7 @@
     1.4  
     1.5  void MacroAssembler::pd_patch_instruction(address branch, address target) {
     1.6    jint& stub_inst = *(jint*) branch;
     1.7 +  jint *pc = (jint *)branch;
     1.8  
     1.9  /* *
    1.10    move(AT, RA); // dadd
    1.11 @@ -106,8 +107,7 @@
    1.12    move(RA, AT);
    1.13    jr(T9);
    1.14   */
    1.15 -  if(special(stub_inst) == dadd_op) {
    1.16 -    jint *pc = (jint *)branch;
    1.17 +  if((opcode(stub_inst) == special_op) && (special(stub_inst) == dadd_op)) {
    1.18  
    1.19      assert(opcode(pc[3]) == lui_op
    1.20            && opcode(pc[4]) == ori_op
    1.21 @@ -135,6 +135,14 @@
    1.22        __ nop();
    1.23      }
    1.24      return;
    1.25 +  } else if (special(pc[4]) == jr_op
    1.26 +             && opcode(pc[4]) == special_op
    1.27 +             && (((opcode(pc[0]) == lui_op) || opcode(pc[0]) == daddiu_op) || (opcode(pc[0]) == ori_op))) {
    1.28 +    
    1.29 +    CodeBuffer cb(branch, 4 * 4);
    1.30 +    MacroAssembler masm(&cb);
    1.31 +    masm.patchable_set48(T9, (long)(target));
    1.32 +    return;
    1.33    }
    1.34  
    1.35  #ifndef PRODUCT
    1.36 @@ -332,6 +340,50 @@
    1.37    }
    1.38  }
    1.39  
    1.40 +void MacroAssembler::beq_long(Register rs, Register rt, Label& L) {
    1.41 +  Label not_taken;
    1.42 +
    1.43 +  bne(rs, rt, not_taken);
    1.44 +  nop();
    1.45 +
    1.46 +  jmp_far(L);
    1.47 +
    1.48 +  bind(not_taken);
    1.49 +}
    1.50 +
    1.51 +void MacroAssembler::bne_long(Register rs, Register rt, Label& L) {
    1.52 +  Label not_taken;
    1.53 +
    1.54 +  beq(rs, rt, not_taken);
    1.55 +  nop();
    1.56 +
    1.57 +  jmp_far(L);
    1.58 +
    1.59 +  bind(not_taken);
    1.60 +}
    1.61 +
    1.62 +void MacroAssembler::bc1t_long(Label& L) {
    1.63 +  Label not_taken;
    1.64 +
    1.65 +  bc1f(not_taken);
    1.66 +  nop();
    1.67 +
    1.68 +  jmp_far(L);
    1.69 +
    1.70 +  bind(not_taken);
    1.71 +}
    1.72 +
    1.73 +void MacroAssembler::bc1f_long(Label& L) {
    1.74 +  Label not_taken;
    1.75 +
    1.76 +  bc1t(not_taken);
    1.77 +  nop();
    1.78 +
    1.79 +  jmp_far(L);
    1.80 +
    1.81 +  bind(not_taken);
    1.82 +}
    1.83 +
    1.84  void MacroAssembler::b_far(Label& L) {
    1.85    if (L.is_bound()) {
    1.86      b_far(target(L));
    1.87 @@ -747,6 +799,26 @@
    1.88    }
    1.89  }
    1.90  
    1.91 +void MacroAssembler::jmp_far(Label& L) {
    1.92 +  if (L.is_bound()) {
    1.93 +    address entry = target(L);
    1.94 +    assert(entry != NULL, "jmp most probably wrong");
    1.95 +    InstructionMark im(this);
    1.96 +
    1.97 +    relocate(relocInfo::internal_word_type);
    1.98 +    patchable_set48(T9, (long)entry);
    1.99 +  } else {
   1.100 +    InstructionMark im(this);
   1.101 +    L.add_patch_at(code(), locator());
   1.102 +
   1.103 +    relocate(relocInfo::internal_word_type);
   1.104 +    patchable_set48(T9, (long)pc());
   1.105 +  }
   1.106 +
   1.107 +  jr(T9);
   1.108 +  nop();
   1.109 +}
   1.110 +
   1.111  void MacroAssembler::call(address entry) {
   1.112  // c/c++ code assume T9 is entry point, so we just always move entry to t9
   1.113  // maybe there is some more graceful method to handle this. FIXME

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