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src/share/vm/c1/c1_LIR.hpp@617b86d17edb
src/share/vm/c1/c1_LIR.hpp
Tue, 04 Sep 2018 21:25:12 +0800
- author
- aoqi
- date
- Tue, 04 Sep 2018 21:25:12 +0800
- changeset 9228
- 617b86d17edb
- parent 9157
- 2966b0be4027
- permissions
- -rw-r--r--
#7517 mRegP match a0_RegP
1 /*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 /*
26 * This file has been modified by Loongson Technology in 2018. These
27 * modifications are Copyright (c) 2018 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
30 #ifndef SHARE_VM_C1_C1_LIR_HPP
31 #define SHARE_VM_C1_C1_LIR_HPP
33 #include "c1/c1_Defs.hpp"
34 #include "c1/c1_ValueType.hpp"
35 #include "oops/method.hpp"
37 class BlockBegin;
38 class BlockList;
39 class LIR_Assembler;
40 class CodeEmitInfo;
41 class CodeStub;
42 class CodeStubList;
43 class ArrayCopyStub;
44 class LIR_Op;
45 class ciType;
46 class ValueType;
47 class LIR_OpVisitState;
48 class FpuStackSim;
50 //---------------------------------------------------------------------
51 // LIR Operands
52 // LIR_OprDesc
53 // LIR_OprPtr
54 // LIR_Const
55 // LIR_Address
56 //---------------------------------------------------------------------
57 class LIR_OprDesc;
58 class LIR_OprPtr;
59 class LIR_Const;
60 class LIR_Address;
61 class LIR_OprVisitor;
64 typedef LIR_OprDesc* LIR_Opr;
65 typedef int RegNr;
67 define_array(LIR_OprArray, LIR_Opr)
68 define_stack(LIR_OprList, LIR_OprArray)
70 define_array(LIR_OprRefArray, LIR_Opr*)
71 define_stack(LIR_OprRefList, LIR_OprRefArray)
73 define_array(CodeEmitInfoArray, CodeEmitInfo*)
74 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
76 define_array(LIR_OpArray, LIR_Op*)
77 define_stack(LIR_OpList, LIR_OpArray)
79 // define LIR_OprPtr early so LIR_OprDesc can refer to it
80 class LIR_OprPtr: public CompilationResourceObj {
81 public:
82 bool is_oop_pointer() const { return (type() == T_OBJECT); }
83 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
85 virtual LIR_Const* as_constant() { return NULL; }
86 virtual LIR_Address* as_address() { return NULL; }
87 virtual BasicType type() const = 0;
88 virtual void print_value_on(outputStream* out) const = 0;
89 };
93 // LIR constants
94 class LIR_Const: public LIR_OprPtr {
95 private:
96 JavaValue _value;
98 void type_check(BasicType t) const { assert(type() == t, "type check"); }
99 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
100 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
102 public:
103 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
104 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
105 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
106 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
107 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
108 LIR_Const(void* p) {
109 #ifdef _LP64
110 assert(sizeof(jlong) >= sizeof(p), "too small");;
111 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
112 #else
113 assert(sizeof(jint) >= sizeof(p), "too small");;
114 _value.set_type(T_INT); _value.set_jint((jint)p);
115 #endif
116 }
117 LIR_Const(Metadata* m) {
118 _value.set_type(T_METADATA);
119 #ifdef _LP64
120 _value.set_jlong((jlong)m);
121 #else
122 _value.set_jint((jint)m);
123 #endif // _LP64
124 }
126 virtual BasicType type() const { return _value.get_type(); }
127 virtual LIR_Const* as_constant() { return this; }
129 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
130 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
131 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
132 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
133 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
134 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
135 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
137 #ifdef _LP64
138 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
139 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
140 #else
141 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
142 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
143 #endif
146 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
147 jint as_jint_lo_bits() const {
148 if (type() == T_DOUBLE) {
149 return low(jlong_cast(_value.get_jdouble()));
150 } else {
151 return as_jint_lo();
152 }
153 }
154 jint as_jint_hi_bits() const {
155 if (type() == T_DOUBLE) {
156 return high(jlong_cast(_value.get_jdouble()));
157 } else {
158 return as_jint_hi();
159 }
160 }
161 jlong as_jlong_bits() const {
162 if (type() == T_DOUBLE) {
163 return jlong_cast(_value.get_jdouble());
164 } else {
165 return as_jlong();
166 }
167 }
169 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
172 bool is_zero_float() {
173 jfloat f = as_jfloat();
174 jfloat ok = 0.0f;
175 return jint_cast(f) == jint_cast(ok);
176 }
178 bool is_one_float() {
179 jfloat f = as_jfloat();
180 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
181 }
183 bool is_zero_double() {
184 jdouble d = as_jdouble();
185 jdouble ok = 0.0;
186 return jlong_cast(d) == jlong_cast(ok);
187 }
189 bool is_one_double() {
190 jdouble d = as_jdouble();
191 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
192 }
193 };
196 //---------------------LIR Operand descriptor------------------------------------
197 //
198 // The class LIR_OprDesc represents a LIR instruction operand;
199 // it can be a register (ALU/FPU), stack location or a constant;
200 // Constants and addresses are represented as resource area allocated
201 // structures (see above).
202 // Registers and stack locations are inlined into the this pointer
203 // (see value function).
205 class LIR_OprDesc: public CompilationResourceObj {
206 public:
207 // value structure:
208 // data opr-type opr-kind
209 // +--------------+-------+-------+
210 // [max...........|7 6 5 4|3 2 1 0]
211 // ^
212 // is_pointer bit
213 //
214 // lowest bit cleared, means it is a structure pointer
215 // we need 4 bits to represent types
217 private:
218 friend class LIR_OprFact;
220 // Conversion
221 intptr_t value() const { return (intptr_t) this; }
223 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
224 return (value() & mask) == masked_value;
225 }
227 enum OprKind {
228 pointer_value = 0
229 , stack_value = 1
230 , cpu_register = 3
231 , fpu_register = 5
232 , illegal_value = 7
233 };
235 enum OprBits {
236 pointer_bits = 1
237 , kind_bits = 3
238 , type_bits = 4
239 , size_bits = 2
240 , destroys_bits = 1
241 , virtual_bits = 1
242 , is_xmm_bits = 1
243 , last_use_bits = 1
244 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
245 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
246 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
247 , data_bits = BitsPerInt - non_data_bits
248 , reg_bits = data_bits / 2 // for two registers in one value encoding
249 };
251 enum OprShift {
252 kind_shift = 0
253 , type_shift = kind_shift + kind_bits
254 , size_shift = type_shift + type_bits
255 , destroys_shift = size_shift + size_bits
256 , last_use_shift = destroys_shift + destroys_bits
257 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
258 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
259 , is_xmm_shift = virtual_shift + virtual_bits
260 , data_shift = is_xmm_shift + is_xmm_bits
261 , reg1_shift = data_shift
262 , reg2_shift = data_shift + reg_bits
264 };
266 enum OprSize {
267 single_size = 0 << size_shift
268 , double_size = 1 << size_shift
269 };
271 enum OprMask {
272 kind_mask = right_n_bits(kind_bits)
273 , type_mask = right_n_bits(type_bits) << type_shift
274 , size_mask = right_n_bits(size_bits) << size_shift
275 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
276 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
277 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
278 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
279 , pointer_mask = right_n_bits(pointer_bits)
280 , lower_reg_mask = right_n_bits(reg_bits)
281 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
282 };
284 uintptr_t data() const { return value() >> data_shift; }
285 int lo_reg_half() const { return data() & lower_reg_mask; }
286 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
287 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
288 OprSize size_field() const { return (OprSize)(value() & size_mask); }
290 static char type_char(BasicType t);
292 public:
293 enum {
294 vreg_base = ConcreteRegisterImpl::number_of_registers,
295 vreg_max = (1 << data_bits) - 1
296 };
298 static inline LIR_Opr illegalOpr();
300 enum OprType {
301 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
302 , int_type = 1 << type_shift
303 , long_type = 2 << type_shift
304 , object_type = 3 << type_shift
305 , address_type = 4 << type_shift
306 , float_type = 5 << type_shift
307 , double_type = 6 << type_shift
308 , metadata_type = 7 << type_shift
309 };
310 friend OprType as_OprType(BasicType t);
311 friend BasicType as_BasicType(OprType t);
313 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
314 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
316 static OprSize size_for(BasicType t) {
317 switch (t) {
318 case T_LONG:
319 case T_DOUBLE:
320 return double_size;
321 break;
323 case T_FLOAT:
324 case T_BOOLEAN:
325 case T_CHAR:
326 case T_BYTE:
327 case T_SHORT:
328 case T_INT:
329 case T_ADDRESS:
330 case T_OBJECT:
331 case T_ARRAY:
332 case T_METADATA:
333 return single_size;
334 break;
336 default:
337 ShouldNotReachHere();
338 return single_size;
339 }
340 }
343 void validate_type() const PRODUCT_RETURN;
345 BasicType type() const {
346 if (is_pointer()) {
347 return pointer()->type();
348 }
349 return as_BasicType(type_field());
350 }
353 ValueType* value_type() const { return as_ValueType(type()); }
355 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
357 bool is_equal(LIR_Opr opr) const { return this == opr; }
358 // checks whether types are same
359 bool is_same_type(LIR_Opr opr) const {
360 assert(type_field() != unknown_type &&
361 opr->type_field() != unknown_type, "shouldn't see unknown_type");
362 return type_field() == opr->type_field();
363 }
364 #ifdef MIPS
365 bool is_same_register(LIR_Opr opr) const {
366 #else
367 bool is_same_register(LIR_Opr opr) {
368 #endif
369 return (is_register() && opr->is_register() &&
370 kind_field() == opr->kind_field() &&
371 (value() & no_type_mask) == (opr->value() & no_type_mask));
372 }
374 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
375 bool is_illegal() const { return kind_field() == illegal_value; }
376 bool is_valid() const { return kind_field() != illegal_value; }
378 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
379 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
381 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
382 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
384 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
385 bool is_oop() const;
387 #ifdef MIPS
388 bool has_common_register(LIR_Opr opr) const;
389 #endif
390 // semantic for fpu- and xmm-registers:
391 // * is_float and is_double return true for xmm_registers
392 // (so is_single_fpu and is_single_xmm are true)
393 // * So you must always check for is_???_xmm prior to is_???_fpu to
394 // distinguish between fpu- and xmm-registers
396 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
397 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
398 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
400 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
401 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
402 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
403 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
404 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
406 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
407 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
408 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
409 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
410 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
412 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
413 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
414 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
416 // fast accessor functions for special bits that do not work for pointers
417 // (in this functions, the check for is_pointer() is omitted)
418 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
419 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
420 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
421 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
422 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
424 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
425 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
426 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
427 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
430 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
431 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
432 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
433 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
434 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
435 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
436 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
437 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
438 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
439 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
440 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
441 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
443 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
444 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
445 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
447 Register as_register() const;
448 Register as_register_lo() const;
449 Register as_register_hi() const;
451 Register as_pointer_register() {
452 #ifdef _LP64
453 if (is_double_cpu()) {
454 assert(as_register_lo() == as_register_hi(), "should be a single register");
455 return as_register_lo();
456 }
457 #endif
458 return as_register();
459 }
461 #ifdef X86
462 XMMRegister as_xmm_float_reg() const;
463 XMMRegister as_xmm_double_reg() const;
464 // for compatibility with RInfo
465 int fpu () const { return lo_reg_half(); }
466 #endif // X86
467 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(MIPS)
468 FloatRegister as_float_reg () const;
469 FloatRegister as_double_reg () const;
470 #endif
472 jint as_jint() const { return as_constant_ptr()->as_jint(); }
473 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
474 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
475 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
476 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
478 void print() const PRODUCT_RETURN;
479 void print(outputStream* out) const PRODUCT_RETURN;
480 };
483 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
484 switch (type) {
485 case T_INT: return LIR_OprDesc::int_type;
486 case T_LONG: return LIR_OprDesc::long_type;
487 case T_FLOAT: return LIR_OprDesc::float_type;
488 case T_DOUBLE: return LIR_OprDesc::double_type;
489 case T_OBJECT:
490 case T_ARRAY: return LIR_OprDesc::object_type;
491 case T_ADDRESS: return LIR_OprDesc::address_type;
492 case T_METADATA: return LIR_OprDesc::metadata_type;
493 case T_ILLEGAL: // fall through
494 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
495 }
496 }
498 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
499 switch (t) {
500 case LIR_OprDesc::int_type: return T_INT;
501 case LIR_OprDesc::long_type: return T_LONG;
502 case LIR_OprDesc::float_type: return T_FLOAT;
503 case LIR_OprDesc::double_type: return T_DOUBLE;
504 case LIR_OprDesc::object_type: return T_OBJECT;
505 case LIR_OprDesc::address_type: return T_ADDRESS;
506 case LIR_OprDesc::metadata_type:return T_METADATA;
507 case LIR_OprDesc::unknown_type: // fall through
508 default: ShouldNotReachHere(); return T_ILLEGAL;
509 }
510 }
513 // LIR_Address
514 class LIR_Address: public LIR_OprPtr {
515 friend class LIR_OpVisitState;
517 public:
518 // NOTE: currently these must be the log2 of the scale factor (and
519 // must also be equivalent to the ScaleFactor enum in
520 // assembler_i486.hpp)
521 enum Scale {
522 times_1 = 0,
523 times_2 = 1,
524 times_4 = 2,
525 times_8 = 3
526 };
528 private:
529 LIR_Opr _base;
530 LIR_Opr _index;
531 Scale _scale;
532 intx _disp;
533 BasicType _type;
535 public:
536 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
537 _base(base)
538 , _index(index)
539 , _scale(times_1)
540 , _type(type)
541 , _disp(0) { verify(); }
543 #ifndef MIPS
544 LIR_Address(LIR_Opr base, intx disp, BasicType type):
545 #else
546 LIR_Address(LIR_Opr base, int disp, BasicType type):
547 #endif
548 _base(base)
549 , _index(LIR_OprDesc::illegalOpr())
550 , _scale(times_1)
551 , _type(type)
552 , _disp(disp) { verify(); }
554 LIR_Address(LIR_Opr base, BasicType type):
555 _base(base)
556 , _index(LIR_OprDesc::illegalOpr())
557 , _scale(times_1)
558 , _type(type)
559 , _disp(0) { verify(); }
561 #if defined(X86) || defined(ARM)
562 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
563 _base(base)
564 , _index(index)
565 , _scale(scale)
566 , _type(type)
567 , _disp(disp) { verify(); }
568 #endif // X86 || ARM
570 LIR_Opr base() const { return _base; }
571 LIR_Opr index() const { return _index; }
572 Scale scale() const { return _scale; }
573 intx disp() const { return _disp; }
575 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
577 virtual LIR_Address* as_address() { return this; }
578 virtual BasicType type() const { return _type; }
579 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
581 void verify0() const PRODUCT_RETURN;
582 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
583 void pd_verify() const;
584 void verify() const { pd_verify(); }
585 #else
586 void verify() const { verify0(); }
587 #endif
589 static Scale scale(BasicType type);
590 };
593 // operand factory
594 class LIR_OprFact: public AllStatic {
595 public:
597 static LIR_Opr illegalOpr;
599 static LIR_Opr single_cpu(int reg) {
600 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
601 LIR_OprDesc::int_type |
602 LIR_OprDesc::cpu_register |
603 LIR_OprDesc::single_size);
604 }
605 static LIR_Opr single_cpu_oop(int reg) {
606 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
607 LIR_OprDesc::object_type |
608 LIR_OprDesc::cpu_register |
609 LIR_OprDesc::single_size);
610 }
611 static LIR_Opr single_cpu_address(int reg) {
612 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
613 LIR_OprDesc::address_type |
614 LIR_OprDesc::cpu_register |
615 LIR_OprDesc::single_size);
616 }
617 static LIR_Opr single_cpu_metadata(int reg) {
618 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
619 LIR_OprDesc::metadata_type |
620 LIR_OprDesc::cpu_register |
621 LIR_OprDesc::single_size);
622 }
623 static LIR_Opr double_cpu(int reg1, int reg2) {
624 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
625 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
626 (reg2 << LIR_OprDesc::reg2_shift) |
627 LIR_OprDesc::long_type |
628 LIR_OprDesc::cpu_register |
629 LIR_OprDesc::double_size);
630 }
632 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
633 LIR_OprDesc::float_type |
634 LIR_OprDesc::fpu_register |
635 LIR_OprDesc::single_size); }
636 #if defined(C1_LIR_MD_HPP)
637 # include C1_LIR_MD_HPP
638 #elif defined(SPARC)
639 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
640 (reg2 << LIR_OprDesc::reg2_shift) |
641 LIR_OprDesc::double_type |
642 LIR_OprDesc::fpu_register |
643 LIR_OprDesc::double_size); }
644 #elif defined(X86)
645 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
646 (reg << LIR_OprDesc::reg2_shift) |
647 LIR_OprDesc::double_type |
648 LIR_OprDesc::fpu_register |
649 LIR_OprDesc::double_size); }
651 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
652 LIR_OprDesc::float_type |
653 LIR_OprDesc::fpu_register |
654 LIR_OprDesc::single_size |
655 LIR_OprDesc::is_xmm_mask); }
656 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
657 (reg << LIR_OprDesc::reg2_shift) |
658 LIR_OprDesc::double_type |
659 LIR_OprDesc::fpu_register |
660 LIR_OprDesc::double_size |
661 LIR_OprDesc::is_xmm_mask); }
662 #elif defined(PPC)
663 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
664 (reg << LIR_OprDesc::reg2_shift) |
665 LIR_OprDesc::double_type |
666 LIR_OprDesc::fpu_register |
667 LIR_OprDesc::double_size); }
668 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
669 LIR_OprDesc::float_type |
670 LIR_OprDesc::cpu_register |
671 LIR_OprDesc::single_size); }
672 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
673 (reg1 << LIR_OprDesc::reg2_shift) |
674 LIR_OprDesc::double_type |
675 LIR_OprDesc::cpu_register |
676 LIR_OprDesc::double_size); }
677 #endif // PPC
678 #ifdef MIPS
679 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
680 (reg << LIR_OprDesc::reg2_shift) |
681 LIR_OprDesc::double_type |
682 LIR_OprDesc::fpu_register |
683 LIR_OprDesc::double_size); }
684 #endif
686 static LIR_Opr virtual_register(int index, BasicType type) {
687 LIR_Opr res;
688 switch (type) {
689 case T_OBJECT: // fall through
690 case T_ARRAY:
691 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
692 LIR_OprDesc::object_type |
693 LIR_OprDesc::cpu_register |
694 LIR_OprDesc::single_size |
695 LIR_OprDesc::virtual_mask);
696 break;
698 case T_METADATA:
699 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
700 LIR_OprDesc::metadata_type|
701 LIR_OprDesc::cpu_register |
702 LIR_OprDesc::single_size |
703 LIR_OprDesc::virtual_mask);
704 break;
706 case T_INT:
707 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
708 LIR_OprDesc::int_type |
709 LIR_OprDesc::cpu_register |
710 LIR_OprDesc::single_size |
711 LIR_OprDesc::virtual_mask);
712 break;
714 case T_ADDRESS:
715 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
716 LIR_OprDesc::address_type |
717 LIR_OprDesc::cpu_register |
718 LIR_OprDesc::single_size |
719 LIR_OprDesc::virtual_mask);
720 break;
722 case T_LONG:
723 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
724 LIR_OprDesc::long_type |
725 LIR_OprDesc::cpu_register |
726 LIR_OprDesc::double_size |
727 LIR_OprDesc::virtual_mask);
728 break;
730 #ifdef __SOFTFP__
731 case T_FLOAT:
732 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
733 LIR_OprDesc::float_type |
734 LIR_OprDesc::cpu_register |
735 LIR_OprDesc::single_size |
736 LIR_OprDesc::virtual_mask);
737 break;
738 case T_DOUBLE:
739 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
740 LIR_OprDesc::double_type |
741 LIR_OprDesc::cpu_register |
742 LIR_OprDesc::double_size |
743 LIR_OprDesc::virtual_mask);
744 break;
745 #else // __SOFTFP__
746 case T_FLOAT:
747 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
748 LIR_OprDesc::float_type |
749 LIR_OprDesc::fpu_register |
750 LIR_OprDesc::single_size |
751 LIR_OprDesc::virtual_mask);
752 break;
754 case
755 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
756 LIR_OprDesc::double_type |
757 LIR_OprDesc::fpu_register |
758 LIR_OprDesc::double_size |
759 LIR_OprDesc::virtual_mask);
760 break;
761 #endif // __SOFTFP__
762 default: ShouldNotReachHere(); res = illegalOpr;
763 }
765 #ifdef ASSERT
766 res->validate_type();
767 assert(res->vreg_number() == index, "conversion check");
768 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
769 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
771 // old-style calculation; check if old and new method are equal
772 LIR_OprDesc::OprType t = as_OprType(type);
773 #ifdef __SOFTFP__
774 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
775 t |
776 LIR_OprDesc::cpu_register |
777 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
778 #else // __SOFTFP__
779 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
780 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
781 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
782 assert(res == old_res, "old and new method not equal");
783 #endif // __SOFTFP__
784 #endif // ASSERT
786 return res;
787 }
789 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
790 // the index is platform independent; a double stack useing indeces 2 and 3 has always
791 // index 2.
792 static LIR_Opr stack(int index, BasicType type) {
793 LIR_Opr res;
794 switch (type) {
795 case T_OBJECT: // fall through
796 case T_ARRAY:
797 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
798 LIR_OprDesc::object_type |
799 LIR_OprDesc::stack_value |
800 LIR_OprDesc::single_size);
801 break;
803 case T_METADATA:
804 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
805 LIR_OprDesc::metadata_type |
806 LIR_OprDesc::stack_value |
807 LIR_OprDesc::single_size);
808 break;
809 case T_INT:
810 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
811 LIR_OprDesc::int_type |
812 LIR_OprDesc::stack_value |
813 LIR_OprDesc::single_size);
814 break;
816 case T_ADDRESS:
817 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
818 LIR_OprDesc::address_type |
819 LIR_OprDesc::stack_value |
820 LIR_OprDesc::single_size);
821 break;
823 case T_LONG:
824 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
825 LIR_OprDesc::long_type |
826 LIR_OprDesc::stack_value |
827 LIR_OprDesc::double_size);
828 break;
830 case T_FLOAT:
831 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
832 LIR_OprDesc::float_type |
833 LIR_OprDesc::stack_value |
834 LIR_OprDesc::single_size);
835 break;
836 case T_DOUBLE:
837 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
838 LIR_OprDesc::double_type |
839 LIR_OprDesc::stack_value |
840 LIR_OprDesc::double_size);
841 break;
843 default: ShouldNotReachHere(); res = illegalOpr;
844 }
846 #ifdef ASSERT
847 assert(index >= 0, "index must be positive");
848 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
850 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
851 LIR_OprDesc::stack_value |
852 as_OprType(type) |
853 LIR_OprDesc::size_for(type));
854 assert(res == old_res, "old and new method not equal");
855 #endif
857 return res;
858 }
860 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
861 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
862 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
863 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
864 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
865 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
866 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
867 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
868 static LIR_Opr illegal() { return (LIR_Opr)-1; }
869 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
870 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
872 static LIR_Opr value_type(ValueType* type);
873 static LIR_Opr dummy_value_type(ValueType* type);
874 };
877 //-------------------------------------------------------------------------------
878 // LIR Instructions
879 //-------------------------------------------------------------------------------
880 //
881 // Note:
882 // - every instruction has a result operand
883 // - every instruction has an CodeEmitInfo operand (can be revisited later)
884 // - every instruction has a LIR_OpCode operand
885 // - LIR_OpN, means an instruction that has N input operands
886 //
887 // class hierarchy:
888 //
889 class LIR_Op;
890 class LIR_Op0;
891 class LIR_OpLabel;
892 class LIR_Op1;
893 class LIR_OpBranch;
894 class LIR_OpConvert;
895 class LIR_OpAllocObj;
896 class LIR_OpRoundFP;
897 class LIR_Op2;
898 class LIR_OpDelay;
899 class LIR_Op3;
900 class LIR_OpAllocArray;
901 #ifdef MIPS
902 class LIR_Op4;
903 #endif
904 class LIR_OpCall;
905 class LIR_OpJavaCall;
906 class LIR_OpRTCall;
907 class LIR_OpArrayCopy;
908 class LIR_OpUpdateCRC32;
909 class LIR_OpLock;
910 class LIR_OpTypeCheck;
911 class LIR_OpCompareAndSwap;
912 class LIR_OpProfileCall;
913 class LIR_OpProfileType;
914 #ifdef ASSERT
915 class LIR_OpAssert;
916 #endif
918 // LIR operation codes
919 enum LIR_Code {
920 lir_none
921 , begin_op0
922 , lir_word_align
923 , lir_label
924 , lir_nop
925 , lir_backwardbranch_target
926 , lir_std_entry
927 , lir_osr_entry
928 , lir_build_frame
929 , lir_fpop_raw
930 , lir_24bit_FPU
931 , lir_reset_FPU
932 , lir_breakpoint
933 , lir_rtcall
934 , lir_membar
935 , lir_membar_acquire
936 , lir_membar_release
937 , lir_membar_loadload
938 , lir_membar_storestore
939 , lir_membar_loadstore
940 , lir_membar_storeload
941 , lir_get_thread
942 , end_op0
943 , begin_op1
944 , lir_fxch
945 , lir_fld
946 , lir_ffree
947 , lir_push
948 , lir_pop
949 , lir_null_check
950 , lir_return
951 , lir_leal
952 , lir_neg
953 #ifndef MIPS
954 , lir_branch
955 , lir_cond_float_branch
956 #endif
957 , lir_move
958 , lir_prefetchr
959 , lir_prefetchw
960 , lir_convert
961 , lir_alloc_object
962 , lir_monaddr
963 , lir_roundfp
964 , lir_safepoint
965 , lir_pack64
966 , lir_unpack64
967 , lir_unwind
968 , end_op1
969 , begin_op2
970 #ifdef MIPS
971 , lir_branch
972 , lir_cond_float_branch
973 , lir_null_check_for_branch
974 #else
975 , lir_cmp
976 #endif
977 , lir_cmp_l2i
978 , lir_ucmp_fd2i
979 , lir_cmp_fd2i
980 , lir_cmove
981 , lir_add
982 , lir_sub
983 , lir_mul
984 , lir_mul_strictfp
985 , lir_div
986 , lir_div_strictfp
987 , lir_rem
988 , lir_sqrt
989 , lir_abs
990 , lir_sin
991 , lir_cos
992 , lir_tan
993 , lir_log
994 , lir_log10
995 , lir_exp
996 , lir_pow
997 , lir_logic_and
998 , lir_logic_or
999 , lir_logic_xor
1000 , lir_shl
1001 , lir_shr
1002 , lir_ushr
1003 , lir_alloc_array
1004 , lir_throw
1005 , lir_compare_to
1006 , lir_xadd
1007 , lir_xchg
1008 , end_op2
1009 , begin_op3
1010 #ifdef MIPS
1011 , lir_frem
1012 #endif
1013 , lir_idiv
1014 , lir_irem
1015 , end_op3
1016 #ifdef MIPS
1017 , begin_op4
1018 , lir_cmove_mips
1019 , end_op4
1020 #endif
1021 , begin_opJavaCall
1022 , lir_static_call
1023 , lir_optvirtual_call
1024 , lir_icvirtual_call
1025 , lir_virtual_call
1026 , lir_dynamic_call
1027 , end_opJavaCall
1028 , begin_opArrayCopy
1029 , lir_arraycopy
1030 , end_opArrayCopy
1031 , begin_opUpdateCRC32
1032 , lir_updatecrc32
1033 , end_opUpdateCRC32
1034 , begin_opLock
1035 , lir_lock
1036 , lir_unlock
1037 , end_opLock
1038 , begin_delay_slot
1039 , lir_delay_slot
1040 , end_delay_slot
1041 , begin_opTypeCheck
1042 , lir_instanceof
1043 , lir_checkcast
1044 , lir_store_check
1045 , end_opTypeCheck
1046 , begin_opCompareAndSwap
1047 , lir_cas_long
1048 , lir_cas_obj
1049 , lir_cas_int
1050 , end_opCompareAndSwap
1051 , begin_opMDOProfile
1052 , lir_profile_call
1053 , lir_profile_type
1054 , end_opMDOProfile
1055 , begin_opAssert
1056 , lir_assert
1057 , end_opAssert
1058 };
1061 enum LIR_Condition {
1062 lir_cond_equal
1063 , lir_cond_notEqual
1064 , lir_cond_less
1065 , lir_cond_lessEqual
1066 , lir_cond_greaterEqual
1067 , lir_cond_greater
1068 , lir_cond_belowEqual
1069 , lir_cond_aboveEqual
1070 , lir_cond_always
1071 , lir_cond_unknown = -1
1072 };
1075 enum LIR_PatchCode {
1076 lir_patch_none,
1077 lir_patch_low,
1078 lir_patch_high,
1079 lir_patch_normal
1080 };
1083 enum LIR_MoveKind {
1084 lir_move_normal,
1085 lir_move_volatile,
1086 lir_move_unaligned,
1087 lir_move_wide,
1088 lir_move_max_flag
1089 };
1092 // --------------------------------------------------
1093 // LIR_Op
1094 // --------------------------------------------------
1095 class LIR_Op: public CompilationResourceObj {
1096 friend class LIR_OpVisitState;
1098 #ifdef ASSERT
1099 private:
1100 const char * _file;
1101 int _line;
1102 #endif
1104 protected:
1105 LIR_Opr _result;
1106 unsigned short _code;
1107 unsigned short _flags;
1108 CodeEmitInfo* _info;
1109 int _id; // value id for register allocation
1110 int _fpu_pop_count;
1111 Instruction* _source; // for debugging
1113 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1115 protected:
1116 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1118 public:
1119 LIR_Op()
1120 : _result(LIR_OprFact::illegalOpr)
1121 , _code(lir_none)
1122 , _flags(0)
1123 , _info(NULL)
1124 #ifdef ASSERT
1125 , _file(NULL)
1126 , _line(0)
1127 #endif
1128 , _fpu_pop_count(0)
1129 , _source(NULL)
1130 , _id(-1) {}
1132 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1133 : _result(result)
1134 , _code(code)
1135 , _flags(0)
1136 , _info(info)
1137 #ifdef ASSERT
1138 , _file(NULL)
1139 , _line(0)
1140 #endif
1141 , _fpu_pop_count(0)
1142 , _source(NULL)
1143 , _id(-1) {}
1145 CodeEmitInfo* info() const { return _info; }
1146 LIR_Code code() const { return (LIR_Code)_code; }
1147 LIR_Opr result_opr() const { return _result; }
1148 void set_result_opr(LIR_Opr opr) { _result = opr; }
1150 #ifdef ASSERT
1151 void set_file_and_line(const char * file, int line) {
1152 _file = file;
1153 _line = line;
1154 }
1155 #endif
1157 virtual const char * name() const PRODUCT_RETURN0;
1159 int id() const { return _id; }
1160 void set_id(int id) { _id = id; }
1162 // FPU stack simulation helpers -- only used on Intel
1163 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1164 int fpu_pop_count() const { return _fpu_pop_count; }
1165 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1167 Instruction* source() const { return _source; }
1168 void set_source(Instruction* ins) { _source = ins; }
1170 virtual void emit_code(LIR_Assembler* masm) = 0;
1171 virtual void print_instr(outputStream* out) const = 0;
1172 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1174 virtual bool is_patching() { return false; }
1175 virtual LIR_OpCall* as_OpCall() { return NULL; }
1176 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1177 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1178 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1179 virtual LIR_OpLock* as_OpLock() { return NULL; }
1180 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1181 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1182 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1183 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1184 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1185 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1186 virtual LIR_Op0* as_Op0() { return NULL; }
1187 virtual LIR_Op1* as_Op1() { return NULL; }
1188 virtual LIR_Op2* as_Op2() { return NULL; }
1189 virtual LIR_Op3* as_Op3() { return NULL; }
1190 #ifdef MIPS
1191 virtual LIR_Op4* as_Op4() { return NULL; }
1192 #endif
1193 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1194 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1195 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1196 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1197 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1198 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1199 #ifdef ASSERT
1200 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1201 #endif
1203 virtual void verify() const {}
1204 };
1206 // for calls
1207 class LIR_OpCall: public LIR_Op {
1208 friend class LIR_OpVisitState;
1210 protected:
1211 address _addr;
1212 LIR_OprList* _arguments;
1213 protected:
1214 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1215 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1216 : LIR_Op(code, result, info)
1217 , _arguments(arguments)
1218 , _addr(addr) {}
1220 public:
1221 address addr() const { return _addr; }
1222 const LIR_OprList* arguments() const { return _arguments; }
1223 virtual LIR_OpCall* as_OpCall() { return this; }
1224 };
1227 // --------------------------------------------------
1228 // LIR_OpJavaCall
1229 // --------------------------------------------------
1230 class LIR_OpJavaCall: public LIR_OpCall {
1231 friend class LIR_OpVisitState;
1233 private:
1234 ciMethod* _method;
1235 LIR_Opr _receiver;
1236 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1238 public:
1239 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1240 LIR_Opr receiver, LIR_Opr result,
1241 address addr, LIR_OprList* arguments,
1242 CodeEmitInfo* info)
1243 : LIR_OpCall(code, addr, result, arguments, info)
1244 , _receiver(receiver)
1245 , _method(method)
1246 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1247 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1249 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1250 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1251 LIR_OprList* arguments, CodeEmitInfo* info)
1252 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1253 , _receiver(receiver)
1254 , _method(method)
1255 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1256 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1258 LIR_Opr receiver() const { return _receiver; }
1259 ciMethod* method() const { return _method; }
1261 // JSR 292 support.
1262 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1263 bool is_method_handle_invoke() const {
1264 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1265 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1266 }
1268 intptr_t vtable_offset() const {
1269 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1270 return (intptr_t) addr();
1271 }
1273 virtual void emit_code(LIR_Assembler* masm);
1274 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1275 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1276 };
1278 // --------------------------------------------------
1279 // LIR_OpLabel
1280 // --------------------------------------------------
1281 // Location where a branch can continue
1282 class LIR_OpLabel: public LIR_Op {
1283 friend class LIR_OpVisitState;
1285 private:
1286 Label* _label;
1287 public:
1288 LIR_OpLabel(Label* lbl)
1289 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1290 , _label(lbl) {}
1291 Label* label() const { return _label; }
1293 virtual void emit_code(LIR_Assembler* masm);
1294 virtual LIR_OpLabel* as_OpLabel() { return this; }
1295 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1296 };
1298 // LIR_OpArrayCopy
1299 class LIR_OpArrayCopy: public LIR_Op {
1300 friend class LIR_OpVisitState;
1302 private:
1303 ArrayCopyStub* _stub;
1304 LIR_Opr _src;
1305 LIR_Opr _src_pos;
1306 LIR_Opr _dst;
1307 LIR_Opr _dst_pos;
1308 LIR_Opr _length;
1309 LIR_Opr _tmp;
1310 ciArrayKlass* _expected_type;
1311 int _flags;
1313 public:
1314 enum Flags {
1315 src_null_check = 1 << 0,
1316 dst_null_check = 1 << 1,
1317 src_pos_positive_check = 1 << 2,
1318 dst_pos_positive_check = 1 << 3,
1319 length_positive_check = 1 << 4,
1320 src_range_check = 1 << 5,
1321 dst_range_check = 1 << 6,
1322 type_check = 1 << 7,
1323 overlapping = 1 << 8,
1324 unaligned = 1 << 9,
1325 src_objarray = 1 << 10,
1326 dst_objarray = 1 << 11,
1327 all_flags = (1 << 12) - 1
1328 };
1330 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1331 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1333 LIR_Opr src() const { return _src; }
1334 LIR_Opr src_pos() const { return _src_pos; }
1335 LIR_Opr dst() const { return _dst; }
1336 LIR_Opr dst_pos() const { return _dst_pos; }
1337 LIR_Opr length() const { return _length; }
1338 LIR_Opr tmp() const { return _tmp; }
1339 int flags() const { return _flags; }
1340 ciArrayKlass* expected_type() const { return _expected_type; }
1341 ArrayCopyStub* stub() const { return _stub; }
1343 virtual void emit_code(LIR_Assembler* masm);
1344 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1345 void print_instr(outputStream* out) const PRODUCT_RETURN;
1346 };
1348 // LIR_OpUpdateCRC32
1349 class LIR_OpUpdateCRC32: public LIR_Op {
1350 friend class LIR_OpVisitState;
1352 private:
1353 LIR_Opr _crc;
1354 LIR_Opr _val;
1356 public:
1358 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1360 LIR_Opr crc() const { return _crc; }
1361 LIR_Opr val() const { return _val; }
1363 virtual void emit_code(LIR_Assembler* masm);
1364 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1365 void print_instr(outputStream* out) const PRODUCT_RETURN;
1366 };
1368 // --------------------------------------------------
1369 // LIR_Op0
1370 // --------------------------------------------------
1371 class LIR_Op0: public LIR_Op {
1372 friend class LIR_OpVisitState;
1374 public:
1375 LIR_Op0(LIR_Code code)
1376 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1377 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1378 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1380 virtual void emit_code(LIR_Assembler* masm);
1381 virtual LIR_Op0* as_Op0() { return this; }
1382 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1383 };
1386 // --------------------------------------------------
1387 // LIR_Op1
1388 // --------------------------------------------------
1390 class LIR_Op1: public LIR_Op {
1391 friend class LIR_OpVisitState;
1393 protected:
1394 LIR_Opr _opr; // input operand
1395 BasicType _type; // Operand types
1396 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1398 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1400 void set_kind(LIR_MoveKind kind) {
1401 assert(code() == lir_move, "must be");
1402 _flags = kind;
1403 }
1405 public:
1406 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1407 : LIR_Op(code, result, info)
1408 , _opr(opr)
1409 , _patch(patch)
1410 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1412 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1413 : LIR_Op(code, result, info)
1414 , _opr(opr)
1415 , _patch(patch)
1416 , _type(type) {
1417 assert(code == lir_move, "must be");
1418 set_kind(kind);
1419 }
1421 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1422 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1423 , _opr(opr)
1424 , _patch(lir_patch_none)
1425 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1427 LIR_Opr in_opr() const { return _opr; }
1428 LIR_PatchCode patch_code() const { return _patch; }
1429 BasicType type() const { return _type; }
1431 LIR_MoveKind move_kind() const {
1432 assert(code() == lir_move, "must be");
1433 return (LIR_MoveKind)_flags;
1434 }
1436 virtual bool is_patching() { return _patch != lir_patch_none; }
1437 virtual void emit_code(LIR_Assembler* masm);
1438 virtual LIR_Op1* as_Op1() { return this; }
1439 virtual const char * name() const PRODUCT_RETURN0;
1441 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1443 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1444 virtual void verify() const;
1445 };
1448 // for runtime calls
1449 class LIR_OpRTCall: public LIR_OpCall {
1450 friend class LIR_OpVisitState;
1452 private:
1453 LIR_Opr _tmp;
1454 public:
1455 LIR_OpRTCall(address addr, LIR_Opr tmp,
1456 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1457 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1458 , _tmp(tmp) {}
1460 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1461 virtual void emit_code(LIR_Assembler* masm);
1462 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1464 LIR_Opr tmp() const { return _tmp; }
1466 virtual void verify() const;
1467 };
1470 #ifndef MIPS
1471 class LIR_OpBranch: public LIR_Op {
1472 friend class LIR_OpVisitState;
1474 private:
1475 LIR_Condition _cond;
1476 BasicType _type;
1477 Label* _label;
1478 BlockBegin* _block; // if this is a branch to a block, this is the block
1479 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1480 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1482 public:
1483 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1484 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1485 , _cond(cond)
1486 , _type(type)
1487 , _label(lbl)
1488 , _block(NULL)
1489 , _ublock(NULL)
1490 , _stub(NULL) { }
1492 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1493 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1495 // for unordered comparisons
1496 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1498 LIR_Condition cond() const { return _cond; }
1499 BasicType type() const { return _type; }
1500 Label* label() const { return _label; }
1501 BlockBegin* block() const { return _block; }
1502 BlockBegin* ublock() const { return _ublock; }
1503 CodeStub* stub() const { return _stub; }
1505 void change_block(BlockBegin* b);
1506 void change_ublock(BlockBegin* b);
1507 void negate_cond();
1509 virtual void emit_code(LIR_Assembler* masm);
1510 virtual LIR_OpBranch* as_OpBranch() { return this; }
1511 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1512 };
1513 #endif
1516 class ConversionStub;
1518 class LIR_OpConvert: public LIR_Op1 {
1519 friend class LIR_OpVisitState;
1521 private:
1522 Bytecodes::Code _bytecode;
1523 ConversionStub* _stub;
1524 #ifdef PPC
1525 LIR_Opr _tmp1;
1526 LIR_Opr _tmp2;
1527 #endif
1529 public:
1530 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1531 : LIR_Op1(lir_convert, opr, result)
1532 , _stub(stub)
1533 #ifdef PPC
1534 , _tmp1(LIR_OprDesc::illegalOpr())
1535 , _tmp2(LIR_OprDesc::illegalOpr())
1536 #endif
1537 , _bytecode(code) {}
1539 #ifdef PPC
1540 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1541 ,LIR_Opr tmp1, LIR_Opr tmp2)
1542 : LIR_Op1(lir_convert, opr, result)
1543 , _stub(stub)
1544 , _tmp1(tmp1)
1545 , _tmp2(tmp2)
1546 , _bytecode(code) {}
1547 #endif
1549 Bytecodes::Code bytecode() const { return _bytecode; }
1550 ConversionStub* stub() const { return _stub; }
1551 #ifdef PPC
1552 LIR_Opr tmp1() const { return _tmp1; }
1553 LIR_Opr tmp2() const { return _tmp2; }
1554 #endif
1556 virtual void emit_code(LIR_Assembler* masm);
1557 virtual LIR_OpConvert* as_OpConvert() { return this; }
1558 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1560 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1561 };
1564 #ifndef MIPS
1565 // LIR_OpAllocObj
1566 class LIR_OpAllocObj : public LIR_Op1 {
1567 friend class LIR_OpVisitState;
1569 private:
1570 LIR_Opr _tmp1;
1571 LIR_Opr _tmp2;
1572 LIR_Opr _tmp3;
1573 LIR_Opr _tmp4;
1574 int _hdr_size;
1575 int _obj_size;
1576 CodeStub* _stub;
1577 bool _init_check;
1579 public:
1580 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1581 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1582 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1583 : LIR_Op1(lir_alloc_object, klass, result)
1584 , _tmp1(t1)
1585 , _tmp2(t2)
1586 , _tmp3(t3)
1587 , _tmp4(t4)
1588 , _hdr_size(hdr_size)
1589 , _obj_size(obj_size)
1590 , _init_check(init_check)
1591 , _stub(stub) { }
1593 LIR_Opr klass() const { return in_opr(); }
1594 LIR_Opr obj() const { return result_opr(); }
1595 LIR_Opr tmp1() const { return _tmp1; }
1596 LIR_Opr tmp2() const { return _tmp2; }
1597 LIR_Opr tmp3() const { return _tmp3; }
1598 LIR_Opr tmp4() const { return _tmp4; }
1599 int header_size() const { return _hdr_size; }
1600 int object_size() const { return _obj_size; }
1601 bool init_check() const { return _init_check; }
1602 CodeStub* stub() const { return _stub; }
1604 virtual void emit_code(LIR_Assembler* masm);
1605 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1606 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1607 };
1608 #else
1609 class LIR_OpAllocObj : public LIR_Op1 {
1610 friend class LIR_OpVisitState;
1612 private:
1613 LIR_Opr _tmp1;
1614 LIR_Opr _tmp2;
1615 LIR_Opr _tmp3;
1616 LIR_Opr _tmp4;
1617 LIR_Opr _tmp5;
1618 LIR_Opr _tmp6;
1619 int _hdr_size;
1620 int _obj_size;
1621 CodeStub* _stub;
1622 bool _init_check;
1624 public:
1625 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1626 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1627 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1628 : LIR_Op1(lir_alloc_object, klass, result)
1629 , _tmp1(t1)
1630 , _tmp2(t2)
1631 , _tmp3(t3)
1632 , _tmp4(t4)
1633 , _tmp5(t5)
1634 , _tmp6(t6)
1635 , _hdr_size(hdr_size)
1636 , _obj_size(obj_size)
1637 , _init_check(init_check)
1638 , _stub(stub) { }
1640 LIR_Opr klass() const { return in_opr(); }
1641 LIR_Opr obj() const { return result_opr(); }
1642 LIR_Opr tmp1() const { return _tmp1; }
1643 LIR_Opr tmp2() const { return _tmp2; }
1644 LIR_Opr tmp3() const { return _tmp3; }
1645 LIR_Opr tmp4() const { return _tmp4; }
1646 LIR_Opr tmp5() const { return _tmp5; }
1647 LIR_Opr tmp6() const { return _tmp6; }
1648 int header_size() const { return _hdr_size; }
1649 int object_size() const { return _obj_size; }
1650 bool init_check() const { return _init_check; }
1651 CodeStub* stub() const { return _stub; }
1653 virtual void emit_code(LIR_Assembler* masm);
1654 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1655 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1656 };
1657 #endif
1660 // LIR_OpRoundFP
1661 class LIR_OpRoundFP : public LIR_Op1 {
1662 friend class LIR_OpVisitState;
1664 private:
1665 LIR_Opr _tmp;
1667 public:
1668 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1669 : LIR_Op1(lir_roundfp, reg, result)
1670 , _tmp(stack_loc_temp) {}
1672 LIR_Opr tmp() const { return _tmp; }
1673 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1674 void print_instr(outputStream* out) const PRODUCT_RETURN;
1675 };
1677 // LIR_OpTypeCheck
1678 class LIR_OpTypeCheck: public LIR_Op {
1679 friend class LIR_OpVisitState;
1681 private:
1682 LIR_Opr _object;
1683 LIR_Opr _array;
1684 ciKlass* _klass;
1685 LIR_Opr _tmp1;
1686 LIR_Opr _tmp2;
1687 LIR_Opr _tmp3;
1688 bool _fast_check;
1689 CodeEmitInfo* _info_for_patch;
1690 CodeEmitInfo* _info_for_exception;
1691 CodeStub* _stub;
1692 ciMethod* _profiled_method;
1693 int _profiled_bci;
1694 bool _should_profile;
1696 public:
1697 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1698 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1699 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1700 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1701 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1703 LIR_Opr object() const { return _object; }
1704 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1705 LIR_Opr tmp1() const { return _tmp1; }
1706 LIR_Opr tmp2() const { return _tmp2; }
1707 LIR_Opr tmp3() const { return _tmp3; }
1708 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1709 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1710 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1711 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1712 CodeStub* stub() const { return _stub; }
1714 // MethodData* profiling
1715 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1716 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1717 void set_should_profile(bool b) { _should_profile = b; }
1718 ciMethod* profiled_method() const { return _profiled_method; }
1719 int profiled_bci() const { return _profiled_bci; }
1720 bool should_profile() const { return _should_profile; }
1722 virtual bool is_patching() { return _info_for_patch != NULL; }
1723 virtual void emit_code(LIR_Assembler* masm);
1724 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1725 void print_instr(outputStream* out) const PRODUCT_RETURN;
1726 };
1728 #ifndef MIPS
1729 // LIR_Op2
1730 class LIR_Op2: public LIR_Op {
1731 friend class LIR_OpVisitState;
1733 int _fpu_stack_size; // for sin/cos implementation on Intel
1735 protected:
1736 LIR_Opr _opr1;
1737 LIR_Opr _opr2;
1738 BasicType _type;
1739 LIR_Opr _tmp1;
1740 LIR_Opr _tmp2;
1741 LIR_Opr _tmp3;
1742 LIR_Opr _tmp4;
1743 LIR_Opr _tmp5;
1744 LIR_Condition _condition;
1746 void verify() const;
1748 public:
1749 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1750 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1751 , _opr1(opr1)
1752 , _opr2(opr2)
1753 , _type(T_ILLEGAL)
1754 , _condition(condition)
1755 , _fpu_stack_size(0)
1756 , _tmp1(LIR_OprFact::illegalOpr)
1757 , _tmp2(LIR_OprFact::illegalOpr)
1758 , _tmp3(LIR_OprFact::illegalOpr)
1759 , _tmp4(LIR_OprFact::illegalOpr)
1760 , _tmp5(LIR_OprFact::illegalOpr) {
1761 assert(code == lir_cmp || code == lir_assert, "code check");
1762 }
1764 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1765 : LIR_Op(code, result, NULL)
1766 , _opr1(opr1)
1767 , _opr2(opr2)
1768 , _type(type)
1769 , _condition(condition)
1770 , _fpu_stack_size(0)
1771 , _tmp1(LIR_OprFact::illegalOpr)
1772 , _tmp2(LIR_OprFact::illegalOpr)
1773 , _tmp3(LIR_OprFact::illegalOpr)
1774 , _tmp4(LIR_OprFact::illegalOpr)
1775 , _tmp5(LIR_OprFact::illegalOpr) {
1776 assert(code == lir_cmove, "code check");
1777 assert(type != T_ILLEGAL, "cmove should have type");
1778 }
1780 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1781 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1782 : LIR_Op(code, result, info)
1783 , _opr1(opr1)
1784 , _opr2(opr2)
1785 , _type(type)
1786 , _condition(lir_cond_unknown)
1787 , _fpu_stack_size(0)
1788 , _tmp1(LIR_OprFact::illegalOpr)
1789 , _tmp2(LIR_OprFact::illegalOpr)
1790 , _tmp3(LIR_OprFact::illegalOpr)
1791 , _tmp4(LIR_OprFact::illegalOpr)
1792 , _tmp5(LIR_OprFact::illegalOpr) {
1793 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1794 }
1796 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1797 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1798 : LIR_Op(code, result, NULL)
1799 , _opr1(opr1)
1800 , _opr2(opr2)
1801 , _type(T_ILLEGAL)
1802 , _condition(lir_cond_unknown)
1803 , _fpu_stack_size(0)
1804 , _tmp1(tmp1)
1805 , _tmp2(tmp2)
1806 , _tmp3(tmp3)
1807 , _tmp4(tmp4)
1808 , _tmp5(tmp5) {
1809 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1810 }
1812 LIR_Opr in_opr1() const { return _opr1; }
1813 LIR_Opr in_opr2() const { return _opr2; }
1814 BasicType type() const { return _type; }
1815 LIR_Opr tmp1_opr() const { return _tmp1; }
1816 LIR_Opr tmp2_opr() const { return _tmp2; }
1817 LIR_Opr tmp3_opr() const { return _tmp3; }
1818 LIR_Opr tmp4_opr() const { return _tmp4; }
1819 LIR_Opr tmp5_opr() const { return _tmp5; }
1820 LIR_Condition condition() const {
1821 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1822 }
1823 void set_condition(LIR_Condition condition) {
1824 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1825 }
1827 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1828 int fpu_stack_size() const { return _fpu_stack_size; }
1830 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1831 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1833 virtual void emit_code(LIR_Assembler* masm);
1834 virtual LIR_Op2* as_Op2() { return this; }
1835 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1836 };
1837 #else
1838 class LIR_Op2: public LIR_Op {
1839 friend class LIR_OpVisitState;
1840 protected:
1841 LIR_Opr _opr1;
1842 LIR_Opr _opr2;
1843 BasicType _type;
1844 LIR_Opr _tmp1;
1845 LIR_Opr _tmp2;
1846 LIR_Opr _tmp3;
1847 LIR_Opr _tmp4;
1848 LIR_Opr _tmp5;
1850 virtual void verify() const;
1851 public:
1852 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1853 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1854 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1855 _opr1(opr1), _opr2(opr2),
1856 _type(type),
1857 _tmp1(LIR_OprFact::illegalOpr),
1858 _tmp2(LIR_OprFact::illegalOpr),
1859 _tmp3(LIR_OprFact::illegalOpr),
1860 _tmp4(LIR_OprFact::illegalOpr),
1861 _tmp5(LIR_OprFact::illegalOpr) {
1862 }
1864 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1865 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1866 : LIR_Op(code, result, info),
1867 _opr1(opr1), _opr2(opr2),
1868 _type(type),
1869 _tmp1(LIR_OprFact::illegalOpr),
1870 _tmp2(LIR_OprFact::illegalOpr),
1871 _tmp3(LIR_OprFact::illegalOpr),
1872 _tmp4(LIR_OprFact::illegalOpr),
1873 _tmp5(LIR_OprFact::illegalOpr) {
1875 assert(is_in_range(code, begin_op2, end_op2), "code check");
1876 }
1879 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1880 : LIR_Op(code, result, NULL),
1881 _opr1(opr1), _opr2(opr2),
1882 _type(T_ILLEGAL),
1883 _tmp1(tmp1),
1884 _tmp2(tmp2),
1885 _tmp3(tmp3),
1886 _tmp4(tmp4),
1887 _tmp5(tmp5) {
1888 assert(is_in_range(code, begin_op2, end_op2), "code check");
1889 }
1891 LIR_Opr in_opr1() const { return _opr1; }
1892 LIR_Opr in_opr2() const { return _opr2; }
1893 BasicType type() const { return _type; }
1894 LIR_Opr tmp1_opr() const { return _tmp1; }
1895 LIR_Opr tmp2_opr() const { return _tmp2; }
1896 LIR_Opr tmp3_opr() const { return _tmp3; }
1897 LIR_Opr tmp4_opr() const { return _tmp4; }
1898 LIR_Opr tmp5_opr() const { return _tmp5; }
1901 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1902 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1903 virtual void emit_code(LIR_Assembler* masm);
1904 virtual LIR_Op2* as_Op2() { return this; }
1906 // virtual void print_instr() const PRODUCT_RETURN;
1907 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1908 };
1911 class LIR_OpBranch: public LIR_Op2 {
1912 friend class LIR_OpVisitState;
1913 public:
1915 private:
1916 LIR_Condition _cond;
1917 BasicType _type;
1918 Label* _label;
1919 BlockBegin* _block; // if this is a branch to a block, this is the block
1920 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1921 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1923 public:
1924 // these are temporary constructors until we start using the conditional register
1925 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1926 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1927 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1928 {
1929 }
1931 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1933 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1935 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1937 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1938 BlockBegin *block,BlockBegin *ublock);
1940 LIR_Condition cond() const { return _cond; }
1941 BasicType type() const { return _type; }
1942 LIR_Opr left() const { return in_opr1(); }
1943 LIR_Opr right() const { return in_opr2(); }
1944 Label* label() const { return _label; }
1945 BlockBegin* block() const { return _block; }
1946 BlockBegin* ublock() const { return _ublock; }
1947 CodeStub* stub() const { return _stub; }
1950 void change_block(BlockBegin* b);
1951 void change_ublock(BlockBegin* b);
1952 void negate_cond();
1955 virtual void emit_code(LIR_Assembler* masm);
1956 virtual LIR_OpBranch* as_OpBranch() { return this; }
1957 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1959 };
1960 #endif
1962 #ifndef MIPS
1963 class LIR_OpAllocArray : public LIR_Op {
1964 friend class LIR_OpVisitState;
1966 private:
1967 LIR_Opr _klass;
1968 LIR_Opr _len;
1969 LIR_Opr _tmp1;
1970 LIR_Opr _tmp2;
1971 LIR_Opr _tmp3;
1972 LIR_Opr _tmp4;
1973 BasicType _type;
1974 CodeStub* _stub;
1976 public:
1977 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1978 : LIR_Op(lir_alloc_array, result, NULL)
1979 , _klass(klass)
1980 , _len(len)
1981 , _tmp1(t1)
1982 , _tmp2(t2)
1983 , _tmp3(t3)
1984 , _tmp4(t4)
1985 , _type(type)
1986 , _stub(stub) {}
1988 LIR_Opr klass() const { return _klass; }
1989 LIR_Opr len() const { return _len; }
1990 LIR_Opr obj() const { return result_opr(); }
1991 LIR_Opr tmp1() const { return _tmp1; }
1992 LIR_Opr tmp2() const { return _tmp2; }
1993 LIR_Opr tmp3() const { return _tmp3; }
1994 LIR_Opr tmp4() const { return _tmp4; }
1995 BasicType type() const { return _type; }
1996 CodeStub* stub() const { return _stub; }
1998 virtual void emit_code(LIR_Assembler* masm);
1999 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2000 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2001 };
2002 #else
2003 class LIR_OpAllocArray : public LIR_Op {
2004 friend class LIR_OpVisitState;
2006 private:
2007 LIR_Opr _klass;
2008 LIR_Opr _len;
2009 LIR_Opr _tmp1;
2010 LIR_Opr _tmp2;
2011 LIR_Opr _tmp3;
2012 LIR_Opr _tmp4;
2013 LIR_Opr _tmp5;
2014 BasicType _type;
2015 CodeStub* _stub;
2017 public:
2018 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2019 : LIR_Op(lir_alloc_array, result, NULL)
2020 , _klass(klass)
2021 , _len(len)
2022 , _tmp1(t1)
2023 , _tmp2(t2)
2024 , _tmp3(t3)
2025 , _tmp4(t4)
2026 , _tmp5(t5)
2027 , _type(type)
2028 , _stub(stub) {}
2030 LIR_Opr klass() const { return _klass; }
2031 LIR_Opr len() const { return _len; }
2032 LIR_Opr obj() const { return result_opr(); }
2033 LIR_Opr tmp1() const { return _tmp1; }
2034 LIR_Opr tmp2() const { return _tmp2; }
2035 LIR_Opr tmp3() const { return _tmp3; }
2036 LIR_Opr tmp4() const { return _tmp4; }
2037 LIR_Opr tmp5() const { return _tmp5; }
2038 BasicType type() const { return _type; }
2039 CodeStub* stub() const { return _stub; }
2041 virtual void emit_code(LIR_Assembler* masm);
2042 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2043 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2044 };
2045 #endif
2048 class LIR_Op3: public LIR_Op {
2049 friend class LIR_OpVisitState;
2051 private:
2052 LIR_Opr _opr1;
2053 LIR_Opr _opr2;
2054 LIR_Opr _opr3;
2055 public:
2056 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
2057 : LIR_Op(code, result, info)
2058 , _opr1(opr1)
2059 , _opr2(opr2)
2060 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
2061 LIR_Opr in_opr1() const { return _opr1; }
2062 LIR_Opr in_opr2() const { return _opr2; }
2063 LIR_Opr in_opr3() const { return _opr3; }
2065 virtual void emit_code(LIR_Assembler* masm);
2066 virtual LIR_Op3* as_Op3() { return this; }
2067 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2068 };
2070 #ifdef MIPS
2071 class LIR_Op4: public LIR_Op {
2072 friend class LIR_OpVisitState;
2073 protected:
2074 LIR_Opr _opr1;
2075 LIR_Opr _opr2;
2076 LIR_Opr _opr3;
2077 LIR_Opr _opr4;
2078 BasicType _type;
2079 LIR_Opr _tmp1;
2080 LIR_Opr _tmp2;
2081 LIR_Opr _tmp3;
2082 LIR_Opr _tmp4;
2083 LIR_Opr _tmp5;
2084 LIR_Condition _condition;
2086 public:
2087 LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type)
2088 : LIR_Op(code, result, NULL)
2089 , _opr1(opr1)
2090 , _opr2(opr2)
2091 , _opr3(opr3)
2092 , _opr4(opr4)
2093 , _type(type)
2094 , _condition(condition)
2095 , _tmp1(LIR_OprFact::illegalOpr)
2096 , _tmp2(LIR_OprFact::illegalOpr)
2097 , _tmp3(LIR_OprFact::illegalOpr)
2098 , _tmp4(LIR_OprFact::illegalOpr)
2099 , _tmp5(LIR_OprFact::illegalOpr) {
2100 assert(code == lir_cmove_mips, "code check");
2101 assert(type != T_ILLEGAL, "cmove should have type");
2102 }
2104 LIR_Opr in_opr1() const { return _opr1; }
2105 LIR_Opr in_opr2() const { return _opr2; }
2106 LIR_Opr in_opr3() const { return _opr3; }
2107 LIR_Opr in_opr4() const { return _opr4; }
2108 BasicType type() const { return _type; }
2109 LIR_Opr tmp1_opr() const { return _tmp1; }
2110 LIR_Opr tmp2_opr() const { return _tmp2; }
2111 LIR_Opr tmp3_opr() const { return _tmp3; }
2112 LIR_Opr tmp4_opr() const { return _tmp4; }
2113 LIR_Opr tmp5_opr() const { return _tmp5; }
2114 LIR_Condition cond() const { return _condition; }
2116 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
2117 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
2118 void set_in_opr3(LIR_Opr opr) { _opr3 = opr; }
2119 void set_in_opr4(LIR_Opr opr) { _opr4 = opr; }
2120 virtual void emit_code(LIR_Assembler* masm);
2121 virtual LIR_Op4* as_Op4() { return this; }
2123 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2124 };
2125 #endif
2127 //--------------------------------
2128 class LabelObj: public CompilationResourceObj {
2129 private:
2130 Label _label;
2131 public:
2132 LabelObj() {}
2133 Label* label() { return &_label; }
2134 };
2137 class LIR_OpLock: public LIR_Op {
2138 friend class LIR_OpVisitState;
2140 private:
2141 LIR_Opr _hdr;
2142 LIR_Opr _obj;
2143 LIR_Opr _lock;
2144 LIR_Opr _scratch;
2145 CodeStub* _stub;
2146 public:
2147 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
2148 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
2149 , _hdr(hdr)
2150 , _obj(obj)
2151 , _lock(lock)
2152 , _scratch(scratch)
2153 , _stub(stub) {}
2155 LIR_Opr hdr_opr() const { return _hdr; }
2156 LIR_Opr obj_opr() const { return _obj; }
2157 LIR_Opr lock_opr() const { return _lock; }
2158 LIR_Opr scratch_opr() const { return _scratch; }
2159 CodeStub* stub() const { return _stub; }
2161 virtual void emit_code(LIR_Assembler* masm);
2162 virtual LIR_OpLock* as_OpLock() { return this; }
2163 void print_instr(outputStream* out) const PRODUCT_RETURN;
2164 };
2167 class LIR_OpDelay: public LIR_Op {
2168 friend class LIR_OpVisitState;
2170 private:
2171 LIR_Op* _op;
2173 public:
2174 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
2175 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
2176 _op(op) {
2177 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
2178 }
2179 virtual void emit_code(LIR_Assembler* masm);
2180 virtual LIR_OpDelay* as_OpDelay() { return this; }
2181 void print_instr(outputStream* out) const PRODUCT_RETURN;
2182 LIR_Op* delay_op() const { return _op; }
2183 CodeEmitInfo* call_info() const { return info(); }
2184 };
2186 #ifdef ASSERT
2187 // LIR_OpAssert
2188 class LIR_OpAssert : public LIR_Op2 {
2189 friend class LIR_OpVisitState;
2191 private:
2192 const char* _msg;
2193 bool _halt;
2195 public:
2196 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
2197 : LIR_Op2(lir_assert, condition, opr1, opr2)
2198 , _halt(halt)
2199 , _msg(msg) {
2200 }
2202 const char* msg() const { return _msg; }
2203 bool halt() const { return _halt; }
2205 virtual void emit_code(LIR_Assembler* masm);
2206 virtual LIR_OpAssert* as_OpAssert() { return this; }
2207 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2208 };
2209 #endif
2211 // LIR_OpCompareAndSwap
2212 class LIR_OpCompareAndSwap : public LIR_Op {
2213 friend class LIR_OpVisitState;
2215 private:
2216 LIR_Opr _addr;
2217 LIR_Opr _cmp_value;
2218 LIR_Opr _new_value;
2219 LIR_Opr _tmp1;
2220 LIR_Opr _tmp2;
2222 public:
2223 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2224 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
2225 : LIR_Op(code, result, NULL) // no result, no info
2226 , _addr(addr)
2227 , _cmp_value(cmp_value)
2228 , _new_value(new_value)
2229 , _tmp1(t1)
2230 , _tmp2(t2) { }
2232 LIR_Opr addr() const { return _addr; }
2233 LIR_Opr cmp_value() const { return _cmp_value; }
2234 LIR_Opr new_value() const { return _new_value; }
2235 LIR_Opr tmp1() const { return _tmp1; }
2236 LIR_Opr tmp2() const { return _tmp2; }
2238 virtual void emit_code(LIR_Assembler* masm);
2239 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
2240 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2241 };
2243 // LIR_OpProfileCall
2244 class LIR_OpProfileCall : public LIR_Op {
2245 friend class LIR_OpVisitState;
2247 private:
2248 ciMethod* _profiled_method;
2249 int _profiled_bci;
2250 ciMethod* _profiled_callee;
2251 LIR_Opr _mdo;
2252 LIR_Opr _recv;
2253 LIR_Opr _tmp1;
2254 ciKlass* _known_holder;
2256 public:
2257 // Destroys recv
2258 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
2259 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
2260 , _profiled_method(profiled_method)
2261 , _profiled_bci(profiled_bci)
2262 , _profiled_callee(profiled_callee)
2263 , _mdo(mdo)
2264 , _recv(recv)
2265 , _tmp1(t1)
2266 , _known_holder(known_holder) { }
2268 ciMethod* profiled_method() const { return _profiled_method; }
2269 int profiled_bci() const { return _profiled_bci; }
2270 ciMethod* profiled_callee() const { return _profiled_callee; }
2271 LIR_Opr mdo() const { return _mdo; }
2272 LIR_Opr recv() const { return _recv; }
2273 LIR_Opr tmp1() const { return _tmp1; }
2274 ciKlass* known_holder() const { return _known_holder; }
2276 virtual void emit_code(LIR_Assembler* masm);
2277 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
2278 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2279 };
2281 // LIR_OpProfileType
2282 class LIR_OpProfileType : public LIR_Op {
2283 friend class LIR_OpVisitState;
2285 private:
2286 LIR_Opr _mdp;
2287 LIR_Opr _obj;
2288 LIR_Opr _tmp;
2289 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
2290 intptr_t _current_klass; // what the profiling currently reports
2291 bool _not_null; // true if we know statically that _obj cannot be null
2292 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
2293 // _exact_klass it the only possible type for this parameter in any context.
2295 public:
2296 // Destroys recv
2297 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
2298 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
2299 , _mdp(mdp)
2300 , _obj(obj)
2301 , _exact_klass(exact_klass)
2302 , _current_klass(current_klass)
2303 , _tmp(tmp)
2304 , _not_null(not_null)
2305 , _no_conflict(no_conflict) { }
2307 LIR_Opr mdp() const { return _mdp; }
2308 LIR_Opr obj() const { return _obj; }
2309 LIR_Opr tmp() const { return _tmp; }
2310 ciKlass* exact_klass() const { return _exact_klass; }
2311 intptr_t current_klass() const { return _current_klass; }
2312 bool not_null() const { return _not_null; }
2313 bool no_conflict() const { return _no_conflict; }
2315 virtual void emit_code(LIR_Assembler* masm);
2316 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2317 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2318 };
2320 class LIR_InsertionBuffer;
2322 //--------------------------------LIR_List---------------------------------------------------
2323 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2324 // The LIR instructions are appended by the LIR_List class itself;
2325 //
2326 // Notes:
2327 // - all offsets are(should be) in bytes
2328 // - local positions are specified with an offset, with offset 0 being local 0
2330 class LIR_List: public CompilationResourceObj {
2331 private:
2332 LIR_OpList _operations;
2334 Compilation* _compilation;
2335 #ifndef PRODUCT
2336 BlockBegin* _block;
2337 #endif
2338 #ifdef ASSERT
2339 const char * _file;
2340 int _line;
2341 #endif
2343 void append(LIR_Op* op) {
2344 if (op->source() == NULL)
2345 op->set_source(_compilation->current_instruction());
2346 #ifndef PRODUCT
2347 if (PrintIRWithLIR) {
2348 _compilation->maybe_print_current_instruction();
2349 op->print(); tty->cr();
2350 }
2351 #endif // PRODUCT
2353 _operations.append(op);
2355 #ifdef ASSERT
2356 op->verify();
2357 op->set_file_and_line(_file, _line);
2358 _file = NULL;
2359 _line = 0;
2360 #endif
2361 }
2363 public:
2364 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2366 #ifdef ASSERT
2367 void set_file_and_line(const char * file, int line);
2368 #endif
2370 //---------- accessors ---------------
2371 LIR_OpList* instructions_list() { return &_operations; }
2372 int length() const { return _operations.length(); }
2373 LIR_Op* at(int i) const { return _operations.at(i); }
2375 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2377 // insert LIR_Ops in buffer to right places in LIR_List
2378 void append(LIR_InsertionBuffer* buffer);
2380 //---------- mutators ---------------
2381 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2382 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2383 void remove_at(int i) { _operations.remove_at(i); }
2385 //---------- printing -------------
2386 void print_instructions() PRODUCT_RETURN;
2389 //---------- instructions -------------
2390 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2391 address dest, LIR_OprList* arguments,
2392 CodeEmitInfo* info) {
2393 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2394 }
2395 void call_static(ciMethod* method, LIR_Opr result,
2396 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2397 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2398 }
2399 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2400 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2401 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2402 }
2403 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2404 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2405 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2406 }
2407 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2408 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2409 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2410 }
2412 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2413 void word_align() { append(new LIR_Op0(lir_word_align)); }
2414 void membar() { append(new LIR_Op0(lir_membar)); }
2415 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2416 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2417 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2418 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2419 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2420 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2422 void nop() { append(new LIR_Op0(lir_nop)); }
2423 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2425 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2426 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2428 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2430 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2431 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2433 // result is a stack location for old backend and vreg for UseLinearScan
2434 // stack_loc_temp is an illegal register for old backend
2435 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2436 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2437 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2438 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2439 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2440 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2441 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2442 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2443 if (UseCompressedOops) {
2444 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2445 } else {
2446 move(src, dst, info);
2447 }
2448 }
2449 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2450 if (UseCompressedOops) {
2451 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2452 } else {
2453 move(src, dst, info);
2454 }
2455 }
2456 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2458 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2459 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2461 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2462 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2464 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2466 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2468 #ifdef PPC
2469 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2470 #endif
2471 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2473 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2474 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2475 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2477 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2478 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2480 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2481 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2482 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2483 }
2484 void unwind_exception(LIR_Opr exceptionOop) {
2485 append(new LIR_Op1(lir_unwind, exceptionOop));
2486 }
2488 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2489 append(new LIR_Op2(lir_compare_to, left, right, dst));
2490 }
2492 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2493 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2495 #ifndef MIPS
2496 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2497 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2498 }
2499 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2500 cmp(condition, left, LIR_OprFact::intConst(right), info);
2501 }
2503 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2504 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2506 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2507 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2508 }
2510 #else
2511 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2512 CodeEmitInfo* info = NULL) {
2513 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2514 }
2516 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2517 CodeEmitInfo* info = NULL) {
2518 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2519 }
2521 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2522 CodeEmitInfo* info) {
2523 append(new LIR_Op2(lir_null_check_for_branch, condition,
2524 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2525 LIR_OprFact::intConst(c),
2526 info, T_INT));
2527 }
2529 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2530 CodeEmitInfo* info) {
2531 append(new LIR_Op2(lir_null_check_for_branch, condition,
2532 reg,
2533 LIR_OprFact::address(addr),
2534 info));
2535 }
2537 void cmove_mips(LIR_Condition condition, LIR_Opr cmp1, LIR_Opr cmp2, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2538 append(new LIR_Op4(lir_cmove_mips, condition, cmp1, cmp2, src1, src2, dst, type));
2539 }
2540 #endif
2541 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2542 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2543 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2544 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2545 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2546 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2548 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2549 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2550 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2551 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2552 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2553 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2554 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2555 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2556 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2558 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2559 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2560 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2561 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2562 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2563 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2564 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2566 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2567 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2569 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2571 void prefetch(LIR_Address* addr, bool is_store);
2573 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2574 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2575 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2576 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2577 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2579 #ifdef MIPS
2580 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2581 #endif
2582 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2583 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2584 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2585 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2587 #ifndef MIPS
2588 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2589 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2590 #else
2591 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2592 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2593 #endif
2595 // jump is an unconditional branch
2596 void jump(BlockBegin* block) {
2597 #ifndef MIPS
2598 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2599 #else
2600 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2601 #endif
2602 }
2603 void jump(CodeStub* stub) {
2604 #ifndef MIPS
2605 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2606 #else
2607 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2608 #endif
2609 }
2610 #ifndef MIPS
2611 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2612 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2613 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2614 append(new LIR_OpBranch(cond, type, block));
2615 }
2616 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2617 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2618 append(new LIR_OpBranch(cond, type, stub));
2619 }
2620 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2621 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2622 append(new LIR_OpBranch(cond, type, block, unordered));
2623 }
2624 #else
2625 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2626 append(new LIR_OpBranch(cond, left, right, lbl));
2627 }
2629 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2630 append(new LIR_OpBranch(cond, left, right, type, block));
2631 }
2633 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2634 append(new LIR_OpBranch(cond, left, right, type, stub));
2635 }
2637 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2638 BlockBegin* block, BlockBegin* unordered) {
2639 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2640 }
2642 #endif
2644 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2645 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2646 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2648 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2649 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2650 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2652 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2653 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2655 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2656 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2657 }
2659 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2660 LIR_OprList* arguments, CodeEmitInfo* info) {
2661 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2662 }
2664 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2665 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2666 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2668 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2669 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2670 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2672 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2674 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2676 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2678 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2679 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2681 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2682 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2683 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2684 ciMethod* profiled_method, int profiled_bci);
2685 // MethodData* profiling
2686 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2687 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2688 }
2689 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2690 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2691 }
2693 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2694 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2695 #ifdef ASSERT
2696 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2697 #endif
2698 };
2700 void print_LIR(BlockList* blocks);
2702 class LIR_InsertionBuffer : public CompilationResourceObj {
2703 private:
2704 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2706 // list of insertion points. index and count are stored alternately:
2707 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2708 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2709 intStack _index_and_count;
2711 // the LIR_Ops to be inserted
2712 LIR_OpList _ops;
2714 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2715 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2716 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2718 #ifdef ASSERT
2719 void verify();
2720 #endif
2721 public:
2722 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2724 // must be called before using the insertion buffer
2725 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2726 bool initialized() const { return _lir != NULL; }
2727 // called automatically when the buffer is appended to the LIR_List
2728 void finish() { _lir = NULL; }
2730 // accessors
2731 LIR_List* lir_list() const { return _lir; }
2732 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2733 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2734 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2736 int number_of_ops() const { return _ops.length(); }
2737 LIR_Op* op_at(int i) const { return _ops.at(i); }
2739 // append an instruction to the buffer
2740 void append(int index, LIR_Op* op);
2742 // instruction
2743 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2744 };
2747 //
2748 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2749 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2750 // information about the input, output and temporaries used by the
2751 // op to be recorded. It also records whether the op has call semantics
2752 // and also records all the CodeEmitInfos used by this op.
2753 //
2756 class LIR_OpVisitState: public StackObj {
2757 public:
2758 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2760 enum {
2761 maxNumberOfOperands = 20,
2762 maxNumberOfInfos = 4
2763 };
2765 private:
2766 LIR_Op* _op;
2768 // optimization: the operands and infos are not stored in a variable-length
2769 // list, but in a fixed-size array to save time of size checks and resizing
2770 int _oprs_len[numModes];
2771 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2772 int _info_len;
2773 CodeEmitInfo* _info_new[maxNumberOfInfos];
2775 bool _has_call;
2776 bool _has_slow_case;
2779 // only include register operands
2780 // addresses are decomposed to the base and index registers
2781 // constants and stack operands are ignored
2782 void append(LIR_Opr& opr, OprMode mode) {
2783 assert(opr->is_valid(), "should not call this otherwise");
2784 assert(mode >= 0 && mode < numModes, "bad mode");
2786 if (opr->is_register()) {
2787 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2788 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2790 } else if (opr->is_pointer()) {
2791 LIR_Address* address = opr->as_address_ptr();
2792 if (address != NULL) {
2793 // special handling for addresses: add base and index register of the address
2794 // both are always input operands or temp if we want to extend
2795 // their liveness!
2796 if (mode == outputMode) {
2797 mode = inputMode;
2798 }
2799 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2800 if (address->_base->is_valid()) {
2801 assert(address->_base->is_register(), "must be");
2802 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2803 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2804 }
2805 if (address->_index->is_valid()) {
2806 assert(address->_index->is_register(), "must be");
2807 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2808 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2809 }
2811 } else {
2812 assert(opr->is_constant(), "constant operands are not processed");
2813 }
2814 } else {
2815 assert(opr->is_stack(), "stack operands are not processed");
2816 }
2817 }
2819 void append(CodeEmitInfo* info) {
2820 assert(info != NULL, "should not call this otherwise");
2821 assert(_info_len < maxNumberOfInfos, "array overflow");
2822 _info_new[_info_len++] = info;
2823 }
2825 public:
2826 LIR_OpVisitState() { reset(); }
2828 LIR_Op* op() const { return _op; }
2829 void set_op(LIR_Op* op) { reset(); _op = op; }
2831 bool has_call() const { return _has_call; }
2832 bool has_slow_case() const { return _has_slow_case; }
2834 void reset() {
2835 _op = NULL;
2836 _has_call = false;
2837 _has_slow_case = false;
2839 _oprs_len[inputMode] = 0;
2840 _oprs_len[tempMode] = 0;
2841 _oprs_len[outputMode] = 0;
2842 _info_len = 0;
2843 }
2846 int opr_count(OprMode mode) const {
2847 assert(mode >= 0 && mode < numModes, "bad mode");
2848 return _oprs_len[mode];
2849 }
2851 LIR_Opr opr_at(OprMode mode, int index) const {
2852 assert(mode >= 0 && mode < numModes, "bad mode");
2853 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2854 return *_oprs_new[mode][index];
2855 }
2857 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2858 assert(mode >= 0 && mode < numModes, "bad mode");
2859 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2860 *_oprs_new[mode][index] = opr;
2861 }
2863 int info_count() const {
2864 return _info_len;
2865 }
2867 CodeEmitInfo* info_at(int index) const {
2868 assert(index < _info_len, "index out of bounds");
2869 return _info_new[index];
2870 }
2872 XHandlers* all_xhandler();
2874 // collects all register operands of the instruction
2875 void visit(LIR_Op* op);
2877 #ifdef ASSERT
2878 // check that an operation has no operands
2879 bool no_operands(LIR_Op* op);
2880 #endif
2882 // LIR_Op visitor functions use these to fill in the state
2883 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2884 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2885 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2886 void do_info(CodeEmitInfo* info) { append(info); }
2888 void do_stub(CodeStub* stub);
2889 void do_call() { _has_call = true; }
2890 void do_slow_case() { _has_slow_case = true; }
2891 void do_slow_case(CodeEmitInfo* info) {
2892 _has_slow_case = true;
2893 append(info);
2894 }
2895 };
2898 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2900 #endif // SHARE_VM_C1_C1_LIR_HPP
