src/share/vm/c1/c1_LIR.hpp

changeset 9228
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parent 9157
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equal deleted inserted replaced
9227:f1560009a081 9228:617b86d17edb
25 /* 25 /*
26 * This file has been modified by Loongson Technology in 2018. These 26 * This file has been modified by Loongson Technology in 2018. These
27 * modifications are Copyright (c) 2018 Loongson Technology, and are made 27 * modifications are Copyright (c) 2018 Loongson Technology, and are made
28 * available on the same license terms set forth above. 28 * available on the same license terms set forth above.
29 */ 29 */
30
31 #ifndef SHARE_VM_C1_C1_LIR_HPP 30 #ifndef SHARE_VM_C1_C1_LIR_HPP
32 #define SHARE_VM_C1_C1_LIR_HPP 31 #define SHARE_VM_C1_C1_LIR_HPP
33 32
34 #include "c1/c1_Defs.hpp" 33 #include "c1/c1_Defs.hpp"
35 #include "c1/c1_ValueType.hpp" 34 #include "c1/c1_ValueType.hpp"
386 bool is_oop() const; 385 bool is_oop() const;
387 386
388 #ifdef MIPS 387 #ifdef MIPS
389 bool has_common_register(LIR_Opr opr) const; 388 bool has_common_register(LIR_Opr opr) const;
390 #endif 389 #endif
391
392 // semantic for fpu- and xmm-registers: 390 // semantic for fpu- and xmm-registers:
393 // * is_float and is_double return true for xmm_registers 391 // * is_float and is_double return true for xmm_registers
394 // (so is_single_fpu and is_single_xmm are true) 392 // (so is_single_fpu and is_single_xmm are true)
395 // * So you must always check for is_???_xmm prior to is_???_fpu to 393 // * So you must always check for is_???_xmm prior to is_???_fpu to
396 // distinguish between fpu- and xmm-registers 394 // distinguish between fpu- and xmm-registers
1952 void change_block(BlockBegin* b); 1950 void change_block(BlockBegin* b);
1953 void change_ublock(BlockBegin* b); 1951 void change_ublock(BlockBegin* b);
1954 void negate_cond(); 1952 void negate_cond();
1955 1953
1956 1954
1957 // 12/21,06,jerome
1958 //virtual void emit_code(LIR_AbstractAssembler* masm);
1959 virtual void emit_code(LIR_Assembler* masm); 1955 virtual void emit_code(LIR_Assembler* masm);
1960 virtual LIR_OpBranch* as_OpBranch() { return this; } 1956 virtual LIR_OpBranch* as_OpBranch() { return this; }
1961 //virtual void print_instr() const PRODUCT_RETURN;
1962 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1957 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1963 1958
1964 }; 1959 };
1965 #endif 1960 #endif
1966 1961
2123 void set_in_opr3(LIR_Opr opr) { _opr3 = opr; } 2118 void set_in_opr3(LIR_Opr opr) { _opr3 = opr; }
2124 void set_in_opr4(LIR_Opr opr) { _opr4 = opr; } 2119 void set_in_opr4(LIR_Opr opr) { _opr4 = opr; }
2125 virtual void emit_code(LIR_Assembler* masm); 2120 virtual void emit_code(LIR_Assembler* masm);
2126 virtual LIR_Op4* as_Op4() { return this; } 2121 virtual LIR_Op4* as_Op4() { return this; }
2127 2122
2128 // virtual void print_instr() const PRODUCT_RETURN;
2129 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 2123 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2130 }; 2124 };
2131 #endif 2125 #endif
2132 2126
2133 //-------------------------------- 2127 //--------------------------------
2583 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2577 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2584 2578
2585 #ifdef MIPS 2579 #ifdef MIPS
2586 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL); 2580 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2587 #endif 2581 #endif
2588
2589 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2582 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2590 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2583 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2591 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2584 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2592 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2585 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2593 2586

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