Mercurial > jdk8-mips64-public > hotspot / file revision
src/share/vm/c1/c1_LIR.hpp@2966b0be4027
src/share/vm/c1/c1_LIR.hpp
Mon, 09 Jul 2018 09:20:14 +0800
- author
- fujie
- date
- Mon, 09 Jul 2018 09:20:14 +0800
- changeset 9157
- 2966b0be4027
- parent 9143
- 239e32ede77d
- child 9228
- 617b86d17edb
- permissions
- -rw-r--r--
#7238 [C1] cmove was added for mips to profile branch.
Effect:
java \
-Xcomp \
-XX:-PrintCompilation \
-XX:TieredStopAtLevel=3 \
-version
Exception in thread "main" was fixed.
1 /*
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
25 /*
26 * This file has been modified by Loongson Technology in 2018. These
27 * modifications are Copyright (c) 2018 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
31 #ifndef SHARE_VM_C1_C1_LIR_HPP
32 #define SHARE_VM_C1_C1_LIR_HPP
34 #include "c1/c1_Defs.hpp"
35 #include "c1/c1_ValueType.hpp"
36 #include "oops/method.hpp"
38 class BlockBegin;
39 class BlockList;
40 class LIR_Assembler;
41 class CodeEmitInfo;
42 class CodeStub;
43 class CodeStubList;
44 class ArrayCopyStub;
45 class LIR_Op;
46 class ciType;
47 class ValueType;
48 class LIR_OpVisitState;
49 class FpuStackSim;
51 //---------------------------------------------------------------------
52 // LIR Operands
53 // LIR_OprDesc
54 // LIR_OprPtr
55 // LIR_Const
56 // LIR_Address
57 //---------------------------------------------------------------------
58 class LIR_OprDesc;
59 class LIR_OprPtr;
60 class LIR_Const;
61 class LIR_Address;
62 class LIR_OprVisitor;
65 typedef LIR_OprDesc* LIR_Opr;
66 typedef int RegNr;
68 define_array(LIR_OprArray, LIR_Opr)
69 define_stack(LIR_OprList, LIR_OprArray)
71 define_array(LIR_OprRefArray, LIR_Opr*)
72 define_stack(LIR_OprRefList, LIR_OprRefArray)
74 define_array(CodeEmitInfoArray, CodeEmitInfo*)
75 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
77 define_array(LIR_OpArray, LIR_Op*)
78 define_stack(LIR_OpList, LIR_OpArray)
80 // define LIR_OprPtr early so LIR_OprDesc can refer to it
81 class LIR_OprPtr: public CompilationResourceObj {
82 public:
83 bool is_oop_pointer() const { return (type() == T_OBJECT); }
84 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
86 virtual LIR_Const* as_constant() { return NULL; }
87 virtual LIR_Address* as_address() { return NULL; }
88 virtual BasicType type() const = 0;
89 virtual void print_value_on(outputStream* out) const = 0;
90 };
94 // LIR constants
95 class LIR_Const: public LIR_OprPtr {
96 private:
97 JavaValue _value;
99 void type_check(BasicType t) const { assert(type() == t, "type check"); }
100 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
101 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
103 public:
104 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
105 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
106 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
107 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
108 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
109 LIR_Const(void* p) {
110 #ifdef _LP64
111 assert(sizeof(jlong) >= sizeof(p), "too small");;
112 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
113 #else
114 assert(sizeof(jint) >= sizeof(p), "too small");;
115 _value.set_type(T_INT); _value.set_jint((jint)p);
116 #endif
117 }
118 LIR_Const(Metadata* m) {
119 _value.set_type(T_METADATA);
120 #ifdef _LP64
121 _value.set_jlong((jlong)m);
122 #else
123 _value.set_jint((jint)m);
124 #endif // _LP64
125 }
127 virtual BasicType type() const { return _value.get_type(); }
128 virtual LIR_Const* as_constant() { return this; }
130 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
131 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
132 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
133 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
134 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
135 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
136 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
138 #ifdef _LP64
139 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
140 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
141 #else
142 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
143 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
144 #endif
147 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
148 jint as_jint_lo_bits() const {
149 if (type() == T_DOUBLE) {
150 return low(jlong_cast(_value.get_jdouble()));
151 } else {
152 return as_jint_lo();
153 }
154 }
155 jint as_jint_hi_bits() const {
156 if (type() == T_DOUBLE) {
157 return high(jlong_cast(_value.get_jdouble()));
158 } else {
159 return as_jint_hi();
160 }
161 }
162 jlong as_jlong_bits() const {
163 if (type() == T_DOUBLE) {
164 return jlong_cast(_value.get_jdouble());
165 } else {
166 return as_jlong();
167 }
168 }
170 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
173 bool is_zero_float() {
174 jfloat f = as_jfloat();
175 jfloat ok = 0.0f;
176 return jint_cast(f) == jint_cast(ok);
177 }
179 bool is_one_float() {
180 jfloat f = as_jfloat();
181 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
182 }
184 bool is_zero_double() {
185 jdouble d = as_jdouble();
186 jdouble ok = 0.0;
187 return jlong_cast(d) == jlong_cast(ok);
188 }
190 bool is_one_double() {
191 jdouble d = as_jdouble();
192 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
193 }
194 };
197 //---------------------LIR Operand descriptor------------------------------------
198 //
199 // The class LIR_OprDesc represents a LIR instruction operand;
200 // it can be a register (ALU/FPU), stack location or a constant;
201 // Constants and addresses are represented as resource area allocated
202 // structures (see above).
203 // Registers and stack locations are inlined into the this pointer
204 // (see value function).
206 class LIR_OprDesc: public CompilationResourceObj {
207 public:
208 // value structure:
209 // data opr-type opr-kind
210 // +--------------+-------+-------+
211 // [max...........|7 6 5 4|3 2 1 0]
212 // ^
213 // is_pointer bit
214 //
215 // lowest bit cleared, means it is a structure pointer
216 // we need 4 bits to represent types
218 private:
219 friend class LIR_OprFact;
221 // Conversion
222 intptr_t value() const { return (intptr_t) this; }
224 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
225 return (value() & mask) == masked_value;
226 }
228 enum OprKind {
229 pointer_value = 0
230 , stack_value = 1
231 , cpu_register = 3
232 , fpu_register = 5
233 , illegal_value = 7
234 };
236 enum OprBits {
237 pointer_bits = 1
238 , kind_bits = 3
239 , type_bits = 4
240 , size_bits = 2
241 , destroys_bits = 1
242 , virtual_bits = 1
243 , is_xmm_bits = 1
244 , last_use_bits = 1
245 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
246 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
247 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
248 , data_bits = BitsPerInt - non_data_bits
249 , reg_bits = data_bits / 2 // for two registers in one value encoding
250 };
252 enum OprShift {
253 kind_shift = 0
254 , type_shift = kind_shift + kind_bits
255 , size_shift = type_shift + type_bits
256 , destroys_shift = size_shift + size_bits
257 , last_use_shift = destroys_shift + destroys_bits
258 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
259 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
260 , is_xmm_shift = virtual_shift + virtual_bits
261 , data_shift = is_xmm_shift + is_xmm_bits
262 , reg1_shift = data_shift
263 , reg2_shift = data_shift + reg_bits
265 };
267 enum OprSize {
268 single_size = 0 << size_shift
269 , double_size = 1 << size_shift
270 };
272 enum OprMask {
273 kind_mask = right_n_bits(kind_bits)
274 , type_mask = right_n_bits(type_bits) << type_shift
275 , size_mask = right_n_bits(size_bits) << size_shift
276 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
277 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
278 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
279 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
280 , pointer_mask = right_n_bits(pointer_bits)
281 , lower_reg_mask = right_n_bits(reg_bits)
282 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
283 };
285 uintptr_t data() const { return value() >> data_shift; }
286 int lo_reg_half() const { return data() & lower_reg_mask; }
287 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
288 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
289 OprSize size_field() const { return (OprSize)(value() & size_mask); }
291 static char type_char(BasicType t);
293 public:
294 enum {
295 vreg_base = ConcreteRegisterImpl::number_of_registers,
296 vreg_max = (1 << data_bits) - 1
297 };
299 static inline LIR_Opr illegalOpr();
301 enum OprType {
302 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
303 , int_type = 1 << type_shift
304 , long_type = 2 << type_shift
305 , object_type = 3 << type_shift
306 , address_type = 4 << type_shift
307 , float_type = 5 << type_shift
308 , double_type = 6 << type_shift
309 , metadata_type = 7 << type_shift
310 };
311 friend OprType as_OprType(BasicType t);
312 friend BasicType as_BasicType(OprType t);
314 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
315 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
317 static OprSize size_for(BasicType t) {
318 switch (t) {
319 case T_LONG:
320 case T_DOUBLE:
321 return double_size;
322 break;
324 case T_FLOAT:
325 case T_BOOLEAN:
326 case T_CHAR:
327 case T_BYTE:
328 case T_SHORT:
329 case T_INT:
330 case T_ADDRESS:
331 case T_OBJECT:
332 case T_ARRAY:
333 case T_METADATA:
334 return single_size;
335 break;
337 default:
338 ShouldNotReachHere();
339 return single_size;
340 }
341 }
344 void validate_type() const PRODUCT_RETURN;
346 BasicType type() const {
347 if (is_pointer()) {
348 return pointer()->type();
349 }
350 return as_BasicType(type_field());
351 }
354 ValueType* value_type() const { return as_ValueType(type()); }
356 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
358 bool is_equal(LIR_Opr opr) const { return this == opr; }
359 // checks whether types are same
360 bool is_same_type(LIR_Opr opr) const {
361 assert(type_field() != unknown_type &&
362 opr->type_field() != unknown_type, "shouldn't see unknown_type");
363 return type_field() == opr->type_field();
364 }
365 #ifdef MIPS
366 bool is_same_register(LIR_Opr opr) const {
367 #else
368 bool is_same_register(LIR_Opr opr) {
369 #endif
370 return (is_register() && opr->is_register() &&
371 kind_field() == opr->kind_field() &&
372 (value() & no_type_mask) == (opr->value() & no_type_mask));
373 }
375 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
376 bool is_illegal() const { return kind_field() == illegal_value; }
377 bool is_valid() const { return kind_field() != illegal_value; }
379 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
380 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
382 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
383 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
385 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
386 bool is_oop() const;
388 #ifdef MIPS
389 bool has_common_register(LIR_Opr opr) const;
390 #endif
392 // semantic for fpu- and xmm-registers:
393 // * is_float and is_double return true for xmm_registers
394 // (so is_single_fpu and is_single_xmm are true)
395 // * So you must always check for is_???_xmm prior to is_???_fpu to
396 // distinguish between fpu- and xmm-registers
398 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
399 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
400 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
402 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
403 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
404 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
405 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
406 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
408 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
409 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
410 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
411 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
412 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
414 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
415 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
416 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
418 // fast accessor functions for special bits that do not work for pointers
419 // (in this functions, the check for is_pointer() is omitted)
420 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
421 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
422 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
423 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
424 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
426 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
427 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
428 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
429 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
432 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
433 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
434 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
435 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
436 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
437 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
438 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
439 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
440 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
441 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
442 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
443 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
445 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
446 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
447 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
449 Register as_register() const;
450 Register as_register_lo() const;
451 Register as_register_hi() const;
453 Register as_pointer_register() {
454 #ifdef _LP64
455 if (is_double_cpu()) {
456 assert(as_register_lo() == as_register_hi(), "should be a single register");
457 return as_register_lo();
458 }
459 #endif
460 return as_register();
461 }
463 #ifdef X86
464 XMMRegister as_xmm_float_reg() const;
465 XMMRegister as_xmm_double_reg() const;
466 // for compatibility with RInfo
467 int fpu () const { return lo_reg_half(); }
468 #endif // X86
469 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(MIPS)
470 FloatRegister as_float_reg () const;
471 FloatRegister as_double_reg () const;
472 #endif
474 jint as_jint() const { return as_constant_ptr()->as_jint(); }
475 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
476 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
477 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
478 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
480 void print() const PRODUCT_RETURN;
481 void print(outputStream* out) const PRODUCT_RETURN;
482 };
485 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
486 switch (type) {
487 case T_INT: return LIR_OprDesc::int_type;
488 case T_LONG: return LIR_OprDesc::long_type;
489 case T_FLOAT: return LIR_OprDesc::float_type;
490 case T_DOUBLE: return LIR_OprDesc::double_type;
491 case T_OBJECT:
492 case T_ARRAY: return LIR_OprDesc::object_type;
493 case T_ADDRESS: return LIR_OprDesc::address_type;
494 case T_METADATA: return LIR_OprDesc::metadata_type;
495 case T_ILLEGAL: // fall through
496 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
497 }
498 }
500 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
501 switch (t) {
502 case LIR_OprDesc::int_type: return T_INT;
503 case LIR_OprDesc::long_type: return T_LONG;
504 case LIR_OprDesc::float_type: return T_FLOAT;
505 case LIR_OprDesc::double_type: return T_DOUBLE;
506 case LIR_OprDesc::object_type: return T_OBJECT;
507 case LIR_OprDesc::address_type: return T_ADDRESS;
508 case LIR_OprDesc::metadata_type:return T_METADATA;
509 case LIR_OprDesc::unknown_type: // fall through
510 default: ShouldNotReachHere(); return T_ILLEGAL;
511 }
512 }
515 // LIR_Address
516 class LIR_Address: public LIR_OprPtr {
517 friend class LIR_OpVisitState;
519 public:
520 // NOTE: currently these must be the log2 of the scale factor (and
521 // must also be equivalent to the ScaleFactor enum in
522 // assembler_i486.hpp)
523 enum Scale {
524 times_1 = 0,
525 times_2 = 1,
526 times_4 = 2,
527 times_8 = 3
528 };
530 private:
531 LIR_Opr _base;
532 LIR_Opr _index;
533 Scale _scale;
534 intx _disp;
535 BasicType _type;
537 public:
538 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
539 _base(base)
540 , _index(index)
541 , _scale(times_1)
542 , _type(type)
543 , _disp(0) { verify(); }
545 #ifndef MIPS
546 LIR_Address(LIR_Opr base, intx disp, BasicType type):
547 #else
548 LIR_Address(LIR_Opr base, int disp, BasicType type):
549 #endif
550 _base(base)
551 , _index(LIR_OprDesc::illegalOpr())
552 , _scale(times_1)
553 , _type(type)
554 , _disp(disp) { verify(); }
556 LIR_Address(LIR_Opr base, BasicType type):
557 _base(base)
558 , _index(LIR_OprDesc::illegalOpr())
559 , _scale(times_1)
560 , _type(type)
561 , _disp(0) { verify(); }
563 #if defined(X86) || defined(ARM)
564 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
565 _base(base)
566 , _index(index)
567 , _scale(scale)
568 , _type(type)
569 , _disp(disp) { verify(); }
570 #endif // X86 || ARM
572 LIR_Opr base() const { return _base; }
573 LIR_Opr index() const { return _index; }
574 Scale scale() const { return _scale; }
575 intx disp() const { return _disp; }
577 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
579 virtual LIR_Address* as_address() { return this; }
580 virtual BasicType type() const { return _type; }
581 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
583 void verify0() const PRODUCT_RETURN;
584 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
585 void pd_verify() const;
586 void verify() const { pd_verify(); }
587 #else
588 void verify() const { verify0(); }
589 #endif
591 static Scale scale(BasicType type);
592 };
595 // operand factory
596 class LIR_OprFact: public AllStatic {
597 public:
599 static LIR_Opr illegalOpr;
601 static LIR_Opr single_cpu(int reg) {
602 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
603 LIR_OprDesc::int_type |
604 LIR_OprDesc::cpu_register |
605 LIR_OprDesc::single_size);
606 }
607 static LIR_Opr single_cpu_oop(int reg) {
608 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
609 LIR_OprDesc::object_type |
610 LIR_OprDesc::cpu_register |
611 LIR_OprDesc::single_size);
612 }
613 static LIR_Opr single_cpu_address(int reg) {
614 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
615 LIR_OprDesc::address_type |
616 LIR_OprDesc::cpu_register |
617 LIR_OprDesc::single_size);
618 }
619 static LIR_Opr single_cpu_metadata(int reg) {
620 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
621 LIR_OprDesc::metadata_type |
622 LIR_OprDesc::cpu_register |
623 LIR_OprDesc::single_size);
624 }
625 static LIR_Opr double_cpu(int reg1, int reg2) {
626 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
627 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
628 (reg2 << LIR_OprDesc::reg2_shift) |
629 LIR_OprDesc::long_type |
630 LIR_OprDesc::cpu_register |
631 LIR_OprDesc::double_size);
632 }
634 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
635 LIR_OprDesc::float_type |
636 LIR_OprDesc::fpu_register |
637 LIR_OprDesc::single_size); }
638 #if defined(C1_LIR_MD_HPP)
639 # include C1_LIR_MD_HPP
640 #elif defined(SPARC)
641 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
642 (reg2 << LIR_OprDesc::reg2_shift) |
643 LIR_OprDesc::double_type |
644 LIR_OprDesc::fpu_register |
645 LIR_OprDesc::double_size); }
646 #elif defined(X86)
647 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
648 (reg << LIR_OprDesc::reg2_shift) |
649 LIR_OprDesc::double_type |
650 LIR_OprDesc::fpu_register |
651 LIR_OprDesc::double_size); }
653 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
654 LIR_OprDesc::float_type |
655 LIR_OprDesc::fpu_register |
656 LIR_OprDesc::single_size |
657 LIR_OprDesc::is_xmm_mask); }
658 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
659 (reg << LIR_OprDesc::reg2_shift) |
660 LIR_OprDesc::double_type |
661 LIR_OprDesc::fpu_register |
662 LIR_OprDesc::double_size |
663 LIR_OprDesc::is_xmm_mask); }
664 #elif defined(PPC)
665 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
666 (reg << LIR_OprDesc::reg2_shift) |
667 LIR_OprDesc::double_type |
668 LIR_OprDesc::fpu_register |
669 LIR_OprDesc::double_size); }
670 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
671 LIR_OprDesc::float_type |
672 LIR_OprDesc::cpu_register |
673 LIR_OprDesc::single_size); }
674 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
675 (reg1 << LIR_OprDesc::reg2_shift) |
676 LIR_OprDesc::double_type |
677 LIR_OprDesc::cpu_register |
678 LIR_OprDesc::double_size); }
679 #endif // PPC
680 #ifdef MIPS
681 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
682 (reg << LIR_OprDesc::reg2_shift) |
683 LIR_OprDesc::double_type |
684 LIR_OprDesc::fpu_register |
685 LIR_OprDesc::double_size); }
686 #endif
688 static LIR_Opr virtual_register(int index, BasicType type) {
689 LIR_Opr res;
690 switch (type) {
691 case T_OBJECT: // fall through
692 case T_ARRAY:
693 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
694 LIR_OprDesc::object_type |
695 LIR_OprDesc::cpu_register |
696 LIR_OprDesc::single_size |
697 LIR_OprDesc::virtual_mask);
698 break;
700 case T_METADATA:
701 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
702 LIR_OprDesc::metadata_type|
703 LIR_OprDesc::cpu_register |
704 LIR_OprDesc::single_size |
705 LIR_OprDesc::virtual_mask);
706 break;
708 case T_INT:
709 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
710 LIR_OprDesc::int_type |
711 LIR_OprDesc::cpu_register |
712 LIR_OprDesc::single_size |
713 LIR_OprDesc::virtual_mask);
714 break;
716 case T_ADDRESS:
717 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
718 LIR_OprDesc::address_type |
719 LIR_OprDesc::cpu_register |
720 LIR_OprDesc::single_size |
721 LIR_OprDesc::virtual_mask);
722 break;
724 case T_LONG:
725 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
726 LIR_OprDesc::long_type |
727 LIR_OprDesc::cpu_register |
728 LIR_OprDesc::double_size |
729 LIR_OprDesc::virtual_mask);
730 break;
732 #ifdef __SOFTFP__
733 case T_FLOAT:
734 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
735 LIR_OprDesc::float_type |
736 LIR_OprDesc::cpu_register |
737 LIR_OprDesc::single_size |
738 LIR_OprDesc::virtual_mask);
739 break;
740 case T_DOUBLE:
741 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
742 LIR_OprDesc::double_type |
743 LIR_OprDesc::cpu_register |
744 LIR_OprDesc::double_size |
745 LIR_OprDesc::virtual_mask);
746 break;
747 #else // __SOFTFP__
748 case T_FLOAT:
749 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
750 LIR_OprDesc::float_type |
751 LIR_OprDesc::fpu_register |
752 LIR_OprDesc::single_size |
753 LIR_OprDesc::virtual_mask);
754 break;
756 case
757 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
758 LIR_OprDesc::double_type |
759 LIR_OprDesc::fpu_register |
760 LIR_OprDesc::double_size |
761 LIR_OprDesc::virtual_mask);
762 break;
763 #endif // __SOFTFP__
764 default: ShouldNotReachHere(); res = illegalOpr;
765 }
767 #ifdef ASSERT
768 res->validate_type();
769 assert(res->vreg_number() == index, "conversion check");
770 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
771 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
773 // old-style calculation; check if old and new method are equal
774 LIR_OprDesc::OprType t = as_OprType(type);
775 #ifdef __SOFTFP__
776 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
777 t |
778 LIR_OprDesc::cpu_register |
779 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
780 #else // __SOFTFP__
781 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
782 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
783 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
784 assert(res == old_res, "old and new method not equal");
785 #endif // __SOFTFP__
786 #endif // ASSERT
788 return res;
789 }
791 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
792 // the index is platform independent; a double stack useing indeces 2 and 3 has always
793 // index 2.
794 static LIR_Opr stack(int index, BasicType type) {
795 LIR_Opr res;
796 switch (type) {
797 case T_OBJECT: // fall through
798 case T_ARRAY:
799 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
800 LIR_OprDesc::object_type |
801 LIR_OprDesc::stack_value |
802 LIR_OprDesc::single_size);
803 break;
805 case T_METADATA:
806 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
807 LIR_OprDesc::metadata_type |
808 LIR_OprDesc::stack_value |
809 LIR_OprDesc::single_size);
810 break;
811 case T_INT:
812 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
813 LIR_OprDesc::int_type |
814 LIR_OprDesc::stack_value |
815 LIR_OprDesc::single_size);
816 break;
818 case T_ADDRESS:
819 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
820 LIR_OprDesc::address_type |
821 LIR_OprDesc::stack_value |
822 LIR_OprDesc::single_size);
823 break;
825 case T_LONG:
826 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
827 LIR_OprDesc::long_type |
828 LIR_OprDesc::stack_value |
829 LIR_OprDesc::double_size);
830 break;
832 case T_FLOAT:
833 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
834 LIR_OprDesc::float_type |
835 LIR_OprDesc::stack_value |
836 LIR_OprDesc::single_size);
837 break;
838 case T_DOUBLE:
839 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
840 LIR_OprDesc::double_type |
841 LIR_OprDesc::stack_value |
842 LIR_OprDesc::double_size);
843 break;
845 default: ShouldNotReachHere(); res = illegalOpr;
846 }
848 #ifdef ASSERT
849 assert(index >= 0, "index must be positive");
850 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
852 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
853 LIR_OprDesc::stack_value |
854 as_OprType(type) |
855 LIR_OprDesc::size_for(type));
856 assert(res == old_res, "old and new method not equal");
857 #endif
859 return res;
860 }
862 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
863 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
864 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
865 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
866 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
867 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
868 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
869 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
870 static LIR_Opr illegal() { return (LIR_Opr)-1; }
871 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
872 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
874 static LIR_Opr value_type(ValueType* type);
875 static LIR_Opr dummy_value_type(ValueType* type);
876 };
879 //-------------------------------------------------------------------------------
880 // LIR Instructions
881 //-------------------------------------------------------------------------------
882 //
883 // Note:
884 // - every instruction has a result operand
885 // - every instruction has an CodeEmitInfo operand (can be revisited later)
886 // - every instruction has a LIR_OpCode operand
887 // - LIR_OpN, means an instruction that has N input operands
888 //
889 // class hierarchy:
890 //
891 class LIR_Op;
892 class LIR_Op0;
893 class LIR_OpLabel;
894 class LIR_Op1;
895 class LIR_OpBranch;
896 class LIR_OpConvert;
897 class LIR_OpAllocObj;
898 class LIR_OpRoundFP;
899 class LIR_Op2;
900 class LIR_OpDelay;
901 class LIR_Op3;
902 class LIR_OpAllocArray;
903 #ifdef MIPS
904 class LIR_Op4;
905 #endif
906 class LIR_OpCall;
907 class LIR_OpJavaCall;
908 class LIR_OpRTCall;
909 class LIR_OpArrayCopy;
910 class LIR_OpUpdateCRC32;
911 class LIR_OpLock;
912 class LIR_OpTypeCheck;
913 class LIR_OpCompareAndSwap;
914 class LIR_OpProfileCall;
915 class LIR_OpProfileType;
916 #ifdef ASSERT
917 class LIR_OpAssert;
918 #endif
920 // LIR operation codes
921 enum LIR_Code {
922 lir_none
923 , begin_op0
924 , lir_word_align
925 , lir_label
926 , lir_nop
927 , lir_backwardbranch_target
928 , lir_std_entry
929 , lir_osr_entry
930 , lir_build_frame
931 , lir_fpop_raw
932 , lir_24bit_FPU
933 , lir_reset_FPU
934 , lir_breakpoint
935 , lir_rtcall
936 , lir_membar
937 , lir_membar_acquire
938 , lir_membar_release
939 , lir_membar_loadload
940 , lir_membar_storestore
941 , lir_membar_loadstore
942 , lir_membar_storeload
943 , lir_get_thread
944 , end_op0
945 , begin_op1
946 , lir_fxch
947 , lir_fld
948 , lir_ffree
949 , lir_push
950 , lir_pop
951 , lir_null_check
952 , lir_return
953 , lir_leal
954 , lir_neg
955 #ifndef MIPS
956 , lir_branch
957 , lir_cond_float_branch
958 #endif
959 , lir_move
960 , lir_prefetchr
961 , lir_prefetchw
962 , lir_convert
963 , lir_alloc_object
964 , lir_monaddr
965 , lir_roundfp
966 , lir_safepoint
967 , lir_pack64
968 , lir_unpack64
969 , lir_unwind
970 , end_op1
971 , begin_op2
972 #ifdef MIPS
973 , lir_branch
974 , lir_cond_float_branch
975 , lir_null_check_for_branch
976 #else
977 , lir_cmp
978 #endif
979 , lir_cmp_l2i
980 , lir_ucmp_fd2i
981 , lir_cmp_fd2i
982 , lir_cmove
983 , lir_add
984 , lir_sub
985 , lir_mul
986 , lir_mul_strictfp
987 , lir_div
988 , lir_div_strictfp
989 , lir_rem
990 , lir_sqrt
991 , lir_abs
992 , lir_sin
993 , lir_cos
994 , lir_tan
995 , lir_log
996 , lir_log10
997 , lir_exp
998 , lir_pow
999 , lir_logic_and
1000 , lir_logic_or
1001 , lir_logic_xor
1002 , lir_shl
1003 , lir_shr
1004 , lir_ushr
1005 , lir_alloc_array
1006 , lir_throw
1007 , lir_compare_to
1008 , lir_xadd
1009 , lir_xchg
1010 , end_op2
1011 , begin_op3
1012 #ifdef MIPS
1013 , lir_frem
1014 #endif
1015 , lir_idiv
1016 , lir_irem
1017 , end_op3
1018 #ifdef MIPS
1019 , begin_op4
1020 , lir_cmove_mips
1021 , end_op4
1022 #endif
1023 , begin_opJavaCall
1024 , lir_static_call
1025 , lir_optvirtual_call
1026 , lir_icvirtual_call
1027 , lir_virtual_call
1028 , lir_dynamic_call
1029 , end_opJavaCall
1030 , begin_opArrayCopy
1031 , lir_arraycopy
1032 , end_opArrayCopy
1033 , begin_opUpdateCRC32
1034 , lir_updatecrc32
1035 , end_opUpdateCRC32
1036 , begin_opLock
1037 , lir_lock
1038 , lir_unlock
1039 , end_opLock
1040 , begin_delay_slot
1041 , lir_delay_slot
1042 , end_delay_slot
1043 , begin_opTypeCheck
1044 , lir_instanceof
1045 , lir_checkcast
1046 , lir_store_check
1047 , end_opTypeCheck
1048 , begin_opCompareAndSwap
1049 , lir_cas_long
1050 , lir_cas_obj
1051 , lir_cas_int
1052 , end_opCompareAndSwap
1053 , begin_opMDOProfile
1054 , lir_profile_call
1055 , lir_profile_type
1056 , end_opMDOProfile
1057 , begin_opAssert
1058 , lir_assert
1059 , end_opAssert
1060 };
1063 enum LIR_Condition {
1064 lir_cond_equal
1065 , lir_cond_notEqual
1066 , lir_cond_less
1067 , lir_cond_lessEqual
1068 , lir_cond_greaterEqual
1069 , lir_cond_greater
1070 , lir_cond_belowEqual
1071 , lir_cond_aboveEqual
1072 , lir_cond_always
1073 , lir_cond_unknown = -1
1074 };
1077 enum LIR_PatchCode {
1078 lir_patch_none,
1079 lir_patch_low,
1080 lir_patch_high,
1081 lir_patch_normal
1082 };
1085 enum LIR_MoveKind {
1086 lir_move_normal,
1087 lir_move_volatile,
1088 lir_move_unaligned,
1089 lir_move_wide,
1090 lir_move_max_flag
1091 };
1094 // --------------------------------------------------
1095 // LIR_Op
1096 // --------------------------------------------------
1097 class LIR_Op: public CompilationResourceObj {
1098 friend class LIR_OpVisitState;
1100 #ifdef ASSERT
1101 private:
1102 const char * _file;
1103 int _line;
1104 #endif
1106 protected:
1107 LIR_Opr _result;
1108 unsigned short _code;
1109 unsigned short _flags;
1110 CodeEmitInfo* _info;
1111 int _id; // value id for register allocation
1112 int _fpu_pop_count;
1113 Instruction* _source; // for debugging
1115 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1117 protected:
1118 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1120 public:
1121 LIR_Op()
1122 : _result(LIR_OprFact::illegalOpr)
1123 , _code(lir_none)
1124 , _flags(0)
1125 , _info(NULL)
1126 #ifdef ASSERT
1127 , _file(NULL)
1128 , _line(0)
1129 #endif
1130 , _fpu_pop_count(0)
1131 , _source(NULL)
1132 , _id(-1) {}
1134 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1135 : _result(result)
1136 , _code(code)
1137 , _flags(0)
1138 , _info(info)
1139 #ifdef ASSERT
1140 , _file(NULL)
1141 , _line(0)
1142 #endif
1143 , _fpu_pop_count(0)
1144 , _source(NULL)
1145 , _id(-1) {}
1147 CodeEmitInfo* info() const { return _info; }
1148 LIR_Code code() const { return (LIR_Code)_code; }
1149 LIR_Opr result_opr() const { return _result; }
1150 void set_result_opr(LIR_Opr opr) { _result = opr; }
1152 #ifdef ASSERT
1153 void set_file_and_line(const char * file, int line) {
1154 _file = file;
1155 _line = line;
1156 }
1157 #endif
1159 virtual const char * name() const PRODUCT_RETURN0;
1161 int id() const { return _id; }
1162 void set_id(int id) { _id = id; }
1164 // FPU stack simulation helpers -- only used on Intel
1165 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1166 int fpu_pop_count() const { return _fpu_pop_count; }
1167 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1169 Instruction* source() const { return _source; }
1170 void set_source(Instruction* ins) { _source = ins; }
1172 virtual void emit_code(LIR_Assembler* masm) = 0;
1173 virtual void print_instr(outputStream* out) const = 0;
1174 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1176 virtual bool is_patching() { return false; }
1177 virtual LIR_OpCall* as_OpCall() { return NULL; }
1178 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1179 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1180 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1181 virtual LIR_OpLock* as_OpLock() { return NULL; }
1182 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1183 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1184 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1185 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1186 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1187 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1188 virtual LIR_Op0* as_Op0() { return NULL; }
1189 virtual LIR_Op1* as_Op1() { return NULL; }
1190 virtual LIR_Op2* as_Op2() { return NULL; }
1191 virtual LIR_Op3* as_Op3() { return NULL; }
1192 #ifdef MIPS
1193 virtual LIR_Op4* as_Op4() { return NULL; }
1194 #endif
1195 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1196 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1197 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1198 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1199 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1200 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1201 #ifdef ASSERT
1202 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1203 #endif
1205 virtual void verify() const {}
1206 };
1208 // for calls
1209 class LIR_OpCall: public LIR_Op {
1210 friend class LIR_OpVisitState;
1212 protected:
1213 address _addr;
1214 LIR_OprList* _arguments;
1215 protected:
1216 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1217 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1218 : LIR_Op(code, result, info)
1219 , _arguments(arguments)
1220 , _addr(addr) {}
1222 public:
1223 address addr() const { return _addr; }
1224 const LIR_OprList* arguments() const { return _arguments; }
1225 virtual LIR_OpCall* as_OpCall() { return this; }
1226 };
1229 // --------------------------------------------------
1230 // LIR_OpJavaCall
1231 // --------------------------------------------------
1232 class LIR_OpJavaCall: public LIR_OpCall {
1233 friend class LIR_OpVisitState;
1235 private:
1236 ciMethod* _method;
1237 LIR_Opr _receiver;
1238 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1240 public:
1241 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1242 LIR_Opr receiver, LIR_Opr result,
1243 address addr, LIR_OprList* arguments,
1244 CodeEmitInfo* info)
1245 : LIR_OpCall(code, addr, result, arguments, info)
1246 , _receiver(receiver)
1247 , _method(method)
1248 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1249 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1251 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1252 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1253 LIR_OprList* arguments, CodeEmitInfo* info)
1254 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1255 , _receiver(receiver)
1256 , _method(method)
1257 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1258 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1260 LIR_Opr receiver() const { return _receiver; }
1261 ciMethod* method() const { return _method; }
1263 // JSR 292 support.
1264 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1265 bool is_method_handle_invoke() const {
1266 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1267 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1268 }
1270 intptr_t vtable_offset() const {
1271 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1272 return (intptr_t) addr();
1273 }
1275 virtual void emit_code(LIR_Assembler* masm);
1276 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1277 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1278 };
1280 // --------------------------------------------------
1281 // LIR_OpLabel
1282 // --------------------------------------------------
1283 // Location where a branch can continue
1284 class LIR_OpLabel: public LIR_Op {
1285 friend class LIR_OpVisitState;
1287 private:
1288 Label* _label;
1289 public:
1290 LIR_OpLabel(Label* lbl)
1291 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1292 , _label(lbl) {}
1293 Label* label() const { return _label; }
1295 virtual void emit_code(LIR_Assembler* masm);
1296 virtual LIR_OpLabel* as_OpLabel() { return this; }
1297 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1298 };
1300 // LIR_OpArrayCopy
1301 class LIR_OpArrayCopy: public LIR_Op {
1302 friend class LIR_OpVisitState;
1304 private:
1305 ArrayCopyStub* _stub;
1306 LIR_Opr _src;
1307 LIR_Opr _src_pos;
1308 LIR_Opr _dst;
1309 LIR_Opr _dst_pos;
1310 LIR_Opr _length;
1311 LIR_Opr _tmp;
1312 ciArrayKlass* _expected_type;
1313 int _flags;
1315 public:
1316 enum Flags {
1317 src_null_check = 1 << 0,
1318 dst_null_check = 1 << 1,
1319 src_pos_positive_check = 1 << 2,
1320 dst_pos_positive_check = 1 << 3,
1321 length_positive_check = 1 << 4,
1322 src_range_check = 1 << 5,
1323 dst_range_check = 1 << 6,
1324 type_check = 1 << 7,
1325 overlapping = 1 << 8,
1326 unaligned = 1 << 9,
1327 src_objarray = 1 << 10,
1328 dst_objarray = 1 << 11,
1329 all_flags = (1 << 12) - 1
1330 };
1332 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1333 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1335 LIR_Opr src() const { return _src; }
1336 LIR_Opr src_pos() const { return _src_pos; }
1337 LIR_Opr dst() const { return _dst; }
1338 LIR_Opr dst_pos() const { return _dst_pos; }
1339 LIR_Opr length() const { return _length; }
1340 LIR_Opr tmp() const { return _tmp; }
1341 int flags() const { return _flags; }
1342 ciArrayKlass* expected_type() const { return _expected_type; }
1343 ArrayCopyStub* stub() const { return _stub; }
1345 virtual void emit_code(LIR_Assembler* masm);
1346 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1347 void print_instr(outputStream* out) const PRODUCT_RETURN;
1348 };
1350 // LIR_OpUpdateCRC32
1351 class LIR_OpUpdateCRC32: public LIR_Op {
1352 friend class LIR_OpVisitState;
1354 private:
1355 LIR_Opr _crc;
1356 LIR_Opr _val;
1358 public:
1360 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1362 LIR_Opr crc() const { return _crc; }
1363 LIR_Opr val() const { return _val; }
1365 virtual void emit_code(LIR_Assembler* masm);
1366 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1367 void print_instr(outputStream* out) const PRODUCT_RETURN;
1368 };
1370 // --------------------------------------------------
1371 // LIR_Op0
1372 // --------------------------------------------------
1373 class LIR_Op0: public LIR_Op {
1374 friend class LIR_OpVisitState;
1376 public:
1377 LIR_Op0(LIR_Code code)
1378 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1379 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1380 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1382 virtual void emit_code(LIR_Assembler* masm);
1383 virtual LIR_Op0* as_Op0() { return this; }
1384 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1385 };
1388 // --------------------------------------------------
1389 // LIR_Op1
1390 // --------------------------------------------------
1392 class LIR_Op1: public LIR_Op {
1393 friend class LIR_OpVisitState;
1395 protected:
1396 LIR_Opr _opr; // input operand
1397 BasicType _type; // Operand types
1398 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1400 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1402 void set_kind(LIR_MoveKind kind) {
1403 assert(code() == lir_move, "must be");
1404 _flags = kind;
1405 }
1407 public:
1408 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1409 : LIR_Op(code, result, info)
1410 , _opr(opr)
1411 , _patch(patch)
1412 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1414 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1415 : LIR_Op(code, result, info)
1416 , _opr(opr)
1417 , _patch(patch)
1418 , _type(type) {
1419 assert(code == lir_move, "must be");
1420 set_kind(kind);
1421 }
1423 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1424 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1425 , _opr(opr)
1426 , _patch(lir_patch_none)
1427 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1429 LIR_Opr in_opr() const { return _opr; }
1430 LIR_PatchCode patch_code() const { return _patch; }
1431 BasicType type() const { return _type; }
1433 LIR_MoveKind move_kind() const {
1434 assert(code() == lir_move, "must be");
1435 return (LIR_MoveKind)_flags;
1436 }
1438 virtual bool is_patching() { return _patch != lir_patch_none; }
1439 virtual void emit_code(LIR_Assembler* masm);
1440 virtual LIR_Op1* as_Op1() { return this; }
1441 virtual const char * name() const PRODUCT_RETURN0;
1443 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1445 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1446 virtual void verify() const;
1447 };
1450 // for runtime calls
1451 class LIR_OpRTCall: public LIR_OpCall {
1452 friend class LIR_OpVisitState;
1454 private:
1455 LIR_Opr _tmp;
1456 public:
1457 LIR_OpRTCall(address addr, LIR_Opr tmp,
1458 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1459 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1460 , _tmp(tmp) {}
1462 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1463 virtual void emit_code(LIR_Assembler* masm);
1464 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1466 LIR_Opr tmp() const { return _tmp; }
1468 virtual void verify() const;
1469 };
1472 #ifndef MIPS
1473 class LIR_OpBranch: public LIR_Op {
1474 friend class LIR_OpVisitState;
1476 private:
1477 LIR_Condition _cond;
1478 BasicType _type;
1479 Label* _label;
1480 BlockBegin* _block; // if this is a branch to a block, this is the block
1481 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1482 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1484 public:
1485 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1486 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1487 , _cond(cond)
1488 , _type(type)
1489 , _label(lbl)
1490 , _block(NULL)
1491 , _ublock(NULL)
1492 , _stub(NULL) { }
1494 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1495 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1497 // for unordered comparisons
1498 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1500 LIR_Condition cond() const { return _cond; }
1501 BasicType type() const { return _type; }
1502 Label* label() const { return _label; }
1503 BlockBegin* block() const { return _block; }
1504 BlockBegin* ublock() const { return _ublock; }
1505 CodeStub* stub() const { return _stub; }
1507 void change_block(BlockBegin* b);
1508 void change_ublock(BlockBegin* b);
1509 void negate_cond();
1511 virtual void emit_code(LIR_Assembler* masm);
1512 virtual LIR_OpBranch* as_OpBranch() { return this; }
1513 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1514 };
1515 #endif
1518 class ConversionStub;
1520 class LIR_OpConvert: public LIR_Op1 {
1521 friend class LIR_OpVisitState;
1523 private:
1524 Bytecodes::Code _bytecode;
1525 ConversionStub* _stub;
1526 #ifdef PPC
1527 LIR_Opr _tmp1;
1528 LIR_Opr _tmp2;
1529 #endif
1531 public:
1532 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1533 : LIR_Op1(lir_convert, opr, result)
1534 , _stub(stub)
1535 #ifdef PPC
1536 , _tmp1(LIR_OprDesc::illegalOpr())
1537 , _tmp2(LIR_OprDesc::illegalOpr())
1538 #endif
1539 , _bytecode(code) {}
1541 #ifdef PPC
1542 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1543 ,LIR_Opr tmp1, LIR_Opr tmp2)
1544 : LIR_Op1(lir_convert, opr, result)
1545 , _stub(stub)
1546 , _tmp1(tmp1)
1547 , _tmp2(tmp2)
1548 , _bytecode(code) {}
1549 #endif
1551 Bytecodes::Code bytecode() const { return _bytecode; }
1552 ConversionStub* stub() const { return _stub; }
1553 #ifdef PPC
1554 LIR_Opr tmp1() const { return _tmp1; }
1555 LIR_Opr tmp2() const { return _tmp2; }
1556 #endif
1558 virtual void emit_code(LIR_Assembler* masm);
1559 virtual LIR_OpConvert* as_OpConvert() { return this; }
1560 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1562 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1563 };
1566 #ifndef MIPS
1567 // LIR_OpAllocObj
1568 class LIR_OpAllocObj : public LIR_Op1 {
1569 friend class LIR_OpVisitState;
1571 private:
1572 LIR_Opr _tmp1;
1573 LIR_Opr _tmp2;
1574 LIR_Opr _tmp3;
1575 LIR_Opr _tmp4;
1576 int _hdr_size;
1577 int _obj_size;
1578 CodeStub* _stub;
1579 bool _init_check;
1581 public:
1582 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1583 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1584 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1585 : LIR_Op1(lir_alloc_object, klass, result)
1586 , _tmp1(t1)
1587 , _tmp2(t2)
1588 , _tmp3(t3)
1589 , _tmp4(t4)
1590 , _hdr_size(hdr_size)
1591 , _obj_size(obj_size)
1592 , _init_check(init_check)
1593 , _stub(stub) { }
1595 LIR_Opr klass() const { return in_opr(); }
1596 LIR_Opr obj() const { return result_opr(); }
1597 LIR_Opr tmp1() const { return _tmp1; }
1598 LIR_Opr tmp2() const { return _tmp2; }
1599 LIR_Opr tmp3() const { return _tmp3; }
1600 LIR_Opr tmp4() const { return _tmp4; }
1601 int header_size() const { return _hdr_size; }
1602 int object_size() const { return _obj_size; }
1603 bool init_check() const { return _init_check; }
1604 CodeStub* stub() const { return _stub; }
1606 virtual void emit_code(LIR_Assembler* masm);
1607 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1608 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1609 };
1610 #else
1611 class LIR_OpAllocObj : public LIR_Op1 {
1612 friend class LIR_OpVisitState;
1614 private:
1615 LIR_Opr _tmp1;
1616 LIR_Opr _tmp2;
1617 LIR_Opr _tmp3;
1618 LIR_Opr _tmp4;
1619 LIR_Opr _tmp5;
1620 LIR_Opr _tmp6;
1621 int _hdr_size;
1622 int _obj_size;
1623 CodeStub* _stub;
1624 bool _init_check;
1626 public:
1627 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1628 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1629 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1630 : LIR_Op1(lir_alloc_object, klass, result)
1631 , _tmp1(t1)
1632 , _tmp2(t2)
1633 , _tmp3(t3)
1634 , _tmp4(t4)
1635 , _tmp5(t5)
1636 , _tmp6(t6)
1637 , _hdr_size(hdr_size)
1638 , _obj_size(obj_size)
1639 , _init_check(init_check)
1640 , _stub(stub) { }
1642 LIR_Opr klass() const { return in_opr(); }
1643 LIR_Opr obj() const { return result_opr(); }
1644 LIR_Opr tmp1() const { return _tmp1; }
1645 LIR_Opr tmp2() const { return _tmp2; }
1646 LIR_Opr tmp3() const { return _tmp3; }
1647 LIR_Opr tmp4() const { return _tmp4; }
1648 LIR_Opr tmp5() const { return _tmp5; }
1649 LIR_Opr tmp6() const { return _tmp6; }
1650 int header_size() const { return _hdr_size; }
1651 int object_size() const { return _obj_size; }
1652 bool init_check() const { return _init_check; }
1653 CodeStub* stub() const { return _stub; }
1655 virtual void emit_code(LIR_Assembler* masm);
1656 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1657 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1658 };
1659 #endif
1662 // LIR_OpRoundFP
1663 class LIR_OpRoundFP : public LIR_Op1 {
1664 friend class LIR_OpVisitState;
1666 private:
1667 LIR_Opr _tmp;
1669 public:
1670 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1671 : LIR_Op1(lir_roundfp, reg, result)
1672 , _tmp(stack_loc_temp) {}
1674 LIR_Opr tmp() const { return _tmp; }
1675 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1676 void print_instr(outputStream* out) const PRODUCT_RETURN;
1677 };
1679 // LIR_OpTypeCheck
1680 class LIR_OpTypeCheck: public LIR_Op {
1681 friend class LIR_OpVisitState;
1683 private:
1684 LIR_Opr _object;
1685 LIR_Opr _array;
1686 ciKlass* _klass;
1687 LIR_Opr _tmp1;
1688 LIR_Opr _tmp2;
1689 LIR_Opr _tmp3;
1690 bool _fast_check;
1691 CodeEmitInfo* _info_for_patch;
1692 CodeEmitInfo* _info_for_exception;
1693 CodeStub* _stub;
1694 ciMethod* _profiled_method;
1695 int _profiled_bci;
1696 bool _should_profile;
1698 public:
1699 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1700 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1701 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1702 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1703 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1705 LIR_Opr object() const { return _object; }
1706 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1707 LIR_Opr tmp1() const { return _tmp1; }
1708 LIR_Opr tmp2() const { return _tmp2; }
1709 LIR_Opr tmp3() const { return _tmp3; }
1710 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1711 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1712 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1713 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1714 CodeStub* stub() const { return _stub; }
1716 // MethodData* profiling
1717 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1718 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1719 void set_should_profile(bool b) { _should_profile = b; }
1720 ciMethod* profiled_method() const { return _profiled_method; }
1721 int profiled_bci() const { return _profiled_bci; }
1722 bool should_profile() const { return _should_profile; }
1724 virtual bool is_patching() { return _info_for_patch != NULL; }
1725 virtual void emit_code(LIR_Assembler* masm);
1726 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1727 void print_instr(outputStream* out) const PRODUCT_RETURN;
1728 };
1730 #ifndef MIPS
1731 // LIR_Op2
1732 class LIR_Op2: public LIR_Op {
1733 friend class LIR_OpVisitState;
1735 int _fpu_stack_size; // for sin/cos implementation on Intel
1737 protected:
1738 LIR_Opr _opr1;
1739 LIR_Opr _opr2;
1740 BasicType _type;
1741 LIR_Opr _tmp1;
1742 LIR_Opr _tmp2;
1743 LIR_Opr _tmp3;
1744 LIR_Opr _tmp4;
1745 LIR_Opr _tmp5;
1746 LIR_Condition _condition;
1748 void verify() const;
1750 public:
1751 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1752 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1753 , _opr1(opr1)
1754 , _opr2(opr2)
1755 , _type(T_ILLEGAL)
1756 , _condition(condition)
1757 , _fpu_stack_size(0)
1758 , _tmp1(LIR_OprFact::illegalOpr)
1759 , _tmp2(LIR_OprFact::illegalOpr)
1760 , _tmp3(LIR_OprFact::illegalOpr)
1761 , _tmp4(LIR_OprFact::illegalOpr)
1762 , _tmp5(LIR_OprFact::illegalOpr) {
1763 assert(code == lir_cmp || code == lir_assert, "code check");
1764 }
1766 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1767 : LIR_Op(code, result, NULL)
1768 , _opr1(opr1)
1769 , _opr2(opr2)
1770 , _type(type)
1771 , _condition(condition)
1772 , _fpu_stack_size(0)
1773 , _tmp1(LIR_OprFact::illegalOpr)
1774 , _tmp2(LIR_OprFact::illegalOpr)
1775 , _tmp3(LIR_OprFact::illegalOpr)
1776 , _tmp4(LIR_OprFact::illegalOpr)
1777 , _tmp5(LIR_OprFact::illegalOpr) {
1778 assert(code == lir_cmove, "code check");
1779 assert(type != T_ILLEGAL, "cmove should have type");
1780 }
1782 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1783 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1784 : LIR_Op(code, result, info)
1785 , _opr1(opr1)
1786 , _opr2(opr2)
1787 , _type(type)
1788 , _condition(lir_cond_unknown)
1789 , _fpu_stack_size(0)
1790 , _tmp1(LIR_OprFact::illegalOpr)
1791 , _tmp2(LIR_OprFact::illegalOpr)
1792 , _tmp3(LIR_OprFact::illegalOpr)
1793 , _tmp4(LIR_OprFact::illegalOpr)
1794 , _tmp5(LIR_OprFact::illegalOpr) {
1795 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1796 }
1798 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1799 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1800 : LIR_Op(code, result, NULL)
1801 , _opr1(opr1)
1802 , _opr2(opr2)
1803 , _type(T_ILLEGAL)
1804 , _condition(lir_cond_unknown)
1805 , _fpu_stack_size(0)
1806 , _tmp1(tmp1)
1807 , _tmp2(tmp2)
1808 , _tmp3(tmp3)
1809 , _tmp4(tmp4)
1810 , _tmp5(tmp5) {
1811 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1812 }
1814 LIR_Opr in_opr1() const { return _opr1; }
1815 LIR_Opr in_opr2() const { return _opr2; }
1816 BasicType type() const { return _type; }
1817 LIR_Opr tmp1_opr() const { return _tmp1; }
1818 LIR_Opr tmp2_opr() const { return _tmp2; }
1819 LIR_Opr tmp3_opr() const { return _tmp3; }
1820 LIR_Opr tmp4_opr() const { return _tmp4; }
1821 LIR_Opr tmp5_opr() const { return _tmp5; }
1822 LIR_Condition condition() const {
1823 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1824 }
1825 void set_condition(LIR_Condition condition) {
1826 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1827 }
1829 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1830 int fpu_stack_size() const { return _fpu_stack_size; }
1832 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1833 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1835 virtual void emit_code(LIR_Assembler* masm);
1836 virtual LIR_Op2* as_Op2() { return this; }
1837 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1838 };
1839 #else
1840 class LIR_Op2: public LIR_Op {
1841 friend class LIR_OpVisitState;
1842 protected:
1843 LIR_Opr _opr1;
1844 LIR_Opr _opr2;
1845 BasicType _type;
1846 LIR_Opr _tmp1;
1847 LIR_Opr _tmp2;
1848 LIR_Opr _tmp3;
1849 LIR_Opr _tmp4;
1850 LIR_Opr _tmp5;
1852 virtual void verify() const;
1853 public:
1854 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1855 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1856 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1857 _opr1(opr1), _opr2(opr2),
1858 _type(type),
1859 _tmp1(LIR_OprFact::illegalOpr),
1860 _tmp2(LIR_OprFact::illegalOpr),
1861 _tmp3(LIR_OprFact::illegalOpr),
1862 _tmp4(LIR_OprFact::illegalOpr),
1863 _tmp5(LIR_OprFact::illegalOpr) {
1864 }
1866 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1867 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1868 : LIR_Op(code, result, info),
1869 _opr1(opr1), _opr2(opr2),
1870 _type(type),
1871 _tmp1(LIR_OprFact::illegalOpr),
1872 _tmp2(LIR_OprFact::illegalOpr),
1873 _tmp3(LIR_OprFact::illegalOpr),
1874 _tmp4(LIR_OprFact::illegalOpr),
1875 _tmp5(LIR_OprFact::illegalOpr) {
1877 assert(is_in_range(code, begin_op2, end_op2), "code check");
1878 }
1881 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1882 : LIR_Op(code, result, NULL),
1883 _opr1(opr1), _opr2(opr2),
1884 _type(T_ILLEGAL),
1885 _tmp1(tmp1),
1886 _tmp2(tmp2),
1887 _tmp3(tmp3),
1888 _tmp4(tmp4),
1889 _tmp5(tmp5) {
1890 assert(is_in_range(code, begin_op2, end_op2), "code check");
1891 }
1893 LIR_Opr in_opr1() const { return _opr1; }
1894 LIR_Opr in_opr2() const { return _opr2; }
1895 BasicType type() const { return _type; }
1896 LIR_Opr tmp1_opr() const { return _tmp1; }
1897 LIR_Opr tmp2_opr() const { return _tmp2; }
1898 LIR_Opr tmp3_opr() const { return _tmp3; }
1899 LIR_Opr tmp4_opr() const { return _tmp4; }
1900 LIR_Opr tmp5_opr() const { return _tmp5; }
1903 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1904 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1905 virtual void emit_code(LIR_Assembler* masm);
1906 virtual LIR_Op2* as_Op2() { return this; }
1908 // virtual void print_instr() const PRODUCT_RETURN;
1909 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1910 };
1913 class LIR_OpBranch: public LIR_Op2 {
1914 friend class LIR_OpVisitState;
1915 public:
1917 private:
1918 LIR_Condition _cond;
1919 BasicType _type;
1920 Label* _label;
1921 BlockBegin* _block; // if this is a branch to a block, this is the block
1922 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1923 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1925 public:
1926 // these are temporary constructors until we start using the conditional register
1927 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1928 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1929 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1930 {
1931 }
1933 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1935 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1937 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1939 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1940 BlockBegin *block,BlockBegin *ublock);
1942 LIR_Condition cond() const { return _cond; }
1943 BasicType type() const { return _type; }
1944 LIR_Opr left() const { return in_opr1(); }
1945 LIR_Opr right() const { return in_opr2(); }
1946 Label* label() const { return _label; }
1947 BlockBegin* block() const { return _block; }
1948 BlockBegin* ublock() const { return _ublock; }
1949 CodeStub* stub() const { return _stub; }
1952 void change_block(BlockBegin* b);
1953 void change_ublock(BlockBegin* b);
1954 void negate_cond();
1957 // 12/21,06,jerome
1958 //virtual void emit_code(LIR_AbstractAssembler* masm);
1959 virtual void emit_code(LIR_Assembler* masm);
1960 virtual LIR_OpBranch* as_OpBranch() { return this; }
1961 //virtual void print_instr() const PRODUCT_RETURN;
1962 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1964 };
1965 #endif
1967 #ifndef MIPS
1968 class LIR_OpAllocArray : public LIR_Op {
1969 friend class LIR_OpVisitState;
1971 private:
1972 LIR_Opr _klass;
1973 LIR_Opr _len;
1974 LIR_Opr _tmp1;
1975 LIR_Opr _tmp2;
1976 LIR_Opr _tmp3;
1977 LIR_Opr _tmp4;
1978 BasicType _type;
1979 CodeStub* _stub;
1981 public:
1982 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1983 : LIR_Op(lir_alloc_array, result, NULL)
1984 , _klass(klass)
1985 , _len(len)
1986 , _tmp1(t1)
1987 , _tmp2(t2)
1988 , _tmp3(t3)
1989 , _tmp4(t4)
1990 , _type(type)
1991 , _stub(stub) {}
1993 LIR_Opr klass() const { return _klass; }
1994 LIR_Opr len() const { return _len; }
1995 LIR_Opr obj() const { return result_opr(); }
1996 LIR_Opr tmp1() const { return _tmp1; }
1997 LIR_Opr tmp2() const { return _tmp2; }
1998 LIR_Opr tmp3() const { return _tmp3; }
1999 LIR_Opr tmp4() const { return _tmp4; }
2000 BasicType type() const { return _type; }
2001 CodeStub* stub() const { return _stub; }
2003 virtual void emit_code(LIR_Assembler* masm);
2004 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2005 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2006 };
2007 #else
2008 class LIR_OpAllocArray : public LIR_Op {
2009 friend class LIR_OpVisitState;
2011 private:
2012 LIR_Opr _klass;
2013 LIR_Opr _len;
2014 LIR_Opr _tmp1;
2015 LIR_Opr _tmp2;
2016 LIR_Opr _tmp3;
2017 LIR_Opr _tmp4;
2018 LIR_Opr _tmp5;
2019 BasicType _type;
2020 CodeStub* _stub;
2022 public:
2023 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2024 : LIR_Op(lir_alloc_array, result, NULL)
2025 , _klass(klass)
2026 , _len(len)
2027 , _tmp1(t1)
2028 , _tmp2(t2)
2029 , _tmp3(t3)
2030 , _tmp4(t4)
2031 , _tmp5(t5)
2032 , _type(type)
2033 , _stub(stub) {}
2035 LIR_Opr klass() const { return _klass; }
2036 LIR_Opr len() const { return _len; }
2037 LIR_Opr obj() const { return result_opr(); }
2038 LIR_Opr tmp1() const { return _tmp1; }
2039 LIR_Opr tmp2() const { return _tmp2; }
2040 LIR_Opr tmp3() const { return _tmp3; }
2041 LIR_Opr tmp4() const { return _tmp4; }
2042 LIR_Opr tmp5() const { return _tmp5; }
2043 BasicType type() const { return _type; }
2044 CodeStub* stub() const { return _stub; }
2046 virtual void emit_code(LIR_Assembler* masm);
2047 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2048 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2049 };
2050 #endif
2053 class LIR_Op3: public LIR_Op {
2054 friend class LIR_OpVisitState;
2056 private:
2057 LIR_Opr _opr1;
2058 LIR_Opr _opr2;
2059 LIR_Opr _opr3;
2060 public:
2061 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
2062 : LIR_Op(code, result, info)
2063 , _opr1(opr1)
2064 , _opr2(opr2)
2065 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
2066 LIR_Opr in_opr1() const { return _opr1; }
2067 LIR_Opr in_opr2() const { return _opr2; }
2068 LIR_Opr in_opr3() const { return _opr3; }
2070 virtual void emit_code(LIR_Assembler* masm);
2071 virtual LIR_Op3* as_Op3() { return this; }
2072 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2073 };
2075 #ifdef MIPS
2076 class LIR_Op4: public LIR_Op {
2077 friend class LIR_OpVisitState;
2078 protected:
2079 LIR_Opr _opr1;
2080 LIR_Opr _opr2;
2081 LIR_Opr _opr3;
2082 LIR_Opr _opr4;
2083 BasicType _type;
2084 LIR_Opr _tmp1;
2085 LIR_Opr _tmp2;
2086 LIR_Opr _tmp3;
2087 LIR_Opr _tmp4;
2088 LIR_Opr _tmp5;
2089 LIR_Condition _condition;
2091 public:
2092 LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type)
2093 : LIR_Op(code, result, NULL)
2094 , _opr1(opr1)
2095 , _opr2(opr2)
2096 , _opr3(opr3)
2097 , _opr4(opr4)
2098 , _type(type)
2099 , _condition(condition)
2100 , _tmp1(LIR_OprFact::illegalOpr)
2101 , _tmp2(LIR_OprFact::illegalOpr)
2102 , _tmp3(LIR_OprFact::illegalOpr)
2103 , _tmp4(LIR_OprFact::illegalOpr)
2104 , _tmp5(LIR_OprFact::illegalOpr) {
2105 assert(code == lir_cmove_mips, "code check");
2106 assert(type != T_ILLEGAL, "cmove should have type");
2107 }
2109 LIR_Opr in_opr1() const { return _opr1; }
2110 LIR_Opr in_opr2() const { return _opr2; }
2111 LIR_Opr in_opr3() const { return _opr3; }
2112 LIR_Opr in_opr4() const { return _opr4; }
2113 BasicType type() const { return _type; }
2114 LIR_Opr tmp1_opr() const { return _tmp1; }
2115 LIR_Opr tmp2_opr() const { return _tmp2; }
2116 LIR_Opr tmp3_opr() const { return _tmp3; }
2117 LIR_Opr tmp4_opr() const { return _tmp4; }
2118 LIR_Opr tmp5_opr() const { return _tmp5; }
2119 LIR_Condition cond() const { return _condition; }
2121 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
2122 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
2123 void set_in_opr3(LIR_Opr opr) { _opr3 = opr; }
2124 void set_in_opr4(LIR_Opr opr) { _opr4 = opr; }
2125 virtual void emit_code(LIR_Assembler* masm);
2126 virtual LIR_Op4* as_Op4() { return this; }
2128 // virtual void print_instr() const PRODUCT_RETURN;
2129 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2130 };
2131 #endif
2133 //--------------------------------
2134 class LabelObj: public CompilationResourceObj {
2135 private:
2136 Label _label;
2137 public:
2138 LabelObj() {}
2139 Label* label() { return &_label; }
2140 };
2143 class LIR_OpLock: public LIR_Op {
2144 friend class LIR_OpVisitState;
2146 private:
2147 LIR_Opr _hdr;
2148 LIR_Opr _obj;
2149 LIR_Opr _lock;
2150 LIR_Opr _scratch;
2151 CodeStub* _stub;
2152 public:
2153 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
2154 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
2155 , _hdr(hdr)
2156 , _obj(obj)
2157 , _lock(lock)
2158 , _scratch(scratch)
2159 , _stub(stub) {}
2161 LIR_Opr hdr_opr() const { return _hdr; }
2162 LIR_Opr obj_opr() const { return _obj; }
2163 LIR_Opr lock_opr() const { return _lock; }
2164 LIR_Opr scratch_opr() const { return _scratch; }
2165 CodeStub* stub() const { return _stub; }
2167 virtual void emit_code(LIR_Assembler* masm);
2168 virtual LIR_OpLock* as_OpLock() { return this; }
2169 void print_instr(outputStream* out) const PRODUCT_RETURN;
2170 };
2173 class LIR_OpDelay: public LIR_Op {
2174 friend class LIR_OpVisitState;
2176 private:
2177 LIR_Op* _op;
2179 public:
2180 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
2181 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
2182 _op(op) {
2183 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
2184 }
2185 virtual void emit_code(LIR_Assembler* masm);
2186 virtual LIR_OpDelay* as_OpDelay() { return this; }
2187 void print_instr(outputStream* out) const PRODUCT_RETURN;
2188 LIR_Op* delay_op() const { return _op; }
2189 CodeEmitInfo* call_info() const { return info(); }
2190 };
2192 #ifdef ASSERT
2193 // LIR_OpAssert
2194 class LIR_OpAssert : public LIR_Op2 {
2195 friend class LIR_OpVisitState;
2197 private:
2198 const char* _msg;
2199 bool _halt;
2201 public:
2202 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
2203 : LIR_Op2(lir_assert, condition, opr1, opr2)
2204 , _halt(halt)
2205 , _msg(msg) {
2206 }
2208 const char* msg() const { return _msg; }
2209 bool halt() const { return _halt; }
2211 virtual void emit_code(LIR_Assembler* masm);
2212 virtual LIR_OpAssert* as_OpAssert() { return this; }
2213 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2214 };
2215 #endif
2217 // LIR_OpCompareAndSwap
2218 class LIR_OpCompareAndSwap : public LIR_Op {
2219 friend class LIR_OpVisitState;
2221 private:
2222 LIR_Opr _addr;
2223 LIR_Opr _cmp_value;
2224 LIR_Opr _new_value;
2225 LIR_Opr _tmp1;
2226 LIR_Opr _tmp2;
2228 public:
2229 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2230 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
2231 : LIR_Op(code, result, NULL) // no result, no info
2232 , _addr(addr)
2233 , _cmp_value(cmp_value)
2234 , _new_value(new_value)
2235 , _tmp1(t1)
2236 , _tmp2(t2) { }
2238 LIR_Opr addr() const { return _addr; }
2239 LIR_Opr cmp_value() const { return _cmp_value; }
2240 LIR_Opr new_value() const { return _new_value; }
2241 LIR_Opr tmp1() const { return _tmp1; }
2242 LIR_Opr tmp2() const { return _tmp2; }
2244 virtual void emit_code(LIR_Assembler* masm);
2245 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
2246 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2247 };
2249 // LIR_OpProfileCall
2250 class LIR_OpProfileCall : public LIR_Op {
2251 friend class LIR_OpVisitState;
2253 private:
2254 ciMethod* _profiled_method;
2255 int _profiled_bci;
2256 ciMethod* _profiled_callee;
2257 LIR_Opr _mdo;
2258 LIR_Opr _recv;
2259 LIR_Opr _tmp1;
2260 ciKlass* _known_holder;
2262 public:
2263 // Destroys recv
2264 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
2265 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
2266 , _profiled_method(profiled_method)
2267 , _profiled_bci(profiled_bci)
2268 , _profiled_callee(profiled_callee)
2269 , _mdo(mdo)
2270 , _recv(recv)
2271 , _tmp1(t1)
2272 , _known_holder(known_holder) { }
2274 ciMethod* profiled_method() const { return _profiled_method; }
2275 int profiled_bci() const { return _profiled_bci; }
2276 ciMethod* profiled_callee() const { return _profiled_callee; }
2277 LIR_Opr mdo() const { return _mdo; }
2278 LIR_Opr recv() const { return _recv; }
2279 LIR_Opr tmp1() const { return _tmp1; }
2280 ciKlass* known_holder() const { return _known_holder; }
2282 virtual void emit_code(LIR_Assembler* masm);
2283 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
2284 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2285 };
2287 // LIR_OpProfileType
2288 class LIR_OpProfileType : public LIR_Op {
2289 friend class LIR_OpVisitState;
2291 private:
2292 LIR_Opr _mdp;
2293 LIR_Opr _obj;
2294 LIR_Opr _tmp;
2295 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
2296 intptr_t _current_klass; // what the profiling currently reports
2297 bool _not_null; // true if we know statically that _obj cannot be null
2298 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
2299 // _exact_klass it the only possible type for this parameter in any context.
2301 public:
2302 // Destroys recv
2303 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
2304 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
2305 , _mdp(mdp)
2306 , _obj(obj)
2307 , _exact_klass(exact_klass)
2308 , _current_klass(current_klass)
2309 , _tmp(tmp)
2310 , _not_null(not_null)
2311 , _no_conflict(no_conflict) { }
2313 LIR_Opr mdp() const { return _mdp; }
2314 LIR_Opr obj() const { return _obj; }
2315 LIR_Opr tmp() const { return _tmp; }
2316 ciKlass* exact_klass() const { return _exact_klass; }
2317 intptr_t current_klass() const { return _current_klass; }
2318 bool not_null() const { return _not_null; }
2319 bool no_conflict() const { return _no_conflict; }
2321 virtual void emit_code(LIR_Assembler* masm);
2322 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2323 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2324 };
2326 class LIR_InsertionBuffer;
2328 //--------------------------------LIR_List---------------------------------------------------
2329 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2330 // The LIR instructions are appended by the LIR_List class itself;
2331 //
2332 // Notes:
2333 // - all offsets are(should be) in bytes
2334 // - local positions are specified with an offset, with offset 0 being local 0
2336 class LIR_List: public CompilationResourceObj {
2337 private:
2338 LIR_OpList _operations;
2340 Compilation* _compilation;
2341 #ifndef PRODUCT
2342 BlockBegin* _block;
2343 #endif
2344 #ifdef ASSERT
2345 const char * _file;
2346 int _line;
2347 #endif
2349 void append(LIR_Op* op) {
2350 if (op->source() == NULL)
2351 op->set_source(_compilation->current_instruction());
2352 #ifndef PRODUCT
2353 if (PrintIRWithLIR) {
2354 _compilation->maybe_print_current_instruction();
2355 op->print(); tty->cr();
2356 }
2357 #endif // PRODUCT
2359 _operations.append(op);
2361 #ifdef ASSERT
2362 op->verify();
2363 op->set_file_and_line(_file, _line);
2364 _file = NULL;
2365 _line = 0;
2366 #endif
2367 }
2369 public:
2370 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2372 #ifdef ASSERT
2373 void set_file_and_line(const char * file, int line);
2374 #endif
2376 //---------- accessors ---------------
2377 LIR_OpList* instructions_list() { return &_operations; }
2378 int length() const { return _operations.length(); }
2379 LIR_Op* at(int i) const { return _operations.at(i); }
2381 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2383 // insert LIR_Ops in buffer to right places in LIR_List
2384 void append(LIR_InsertionBuffer* buffer);
2386 //---------- mutators ---------------
2387 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
2388 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
2389 void remove_at(int i) { _operations.remove_at(i); }
2391 //---------- printing -------------
2392 void print_instructions() PRODUCT_RETURN;
2395 //---------- instructions -------------
2396 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2397 address dest, LIR_OprList* arguments,
2398 CodeEmitInfo* info) {
2399 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2400 }
2401 void call_static(ciMethod* method, LIR_Opr result,
2402 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2403 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2404 }
2405 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2406 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2407 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2408 }
2409 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2410 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2411 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2412 }
2413 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2414 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2415 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2416 }
2418 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
2419 void word_align() { append(new LIR_Op0(lir_word_align)); }
2420 void membar() { append(new LIR_Op0(lir_membar)); }
2421 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
2422 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
2423 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
2424 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
2425 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
2426 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2428 void nop() { append(new LIR_Op0(lir_nop)); }
2429 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2431 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
2432 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2434 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2436 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
2437 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
2439 // result is a stack location for old backend and vreg for UseLinearScan
2440 // stack_loc_temp is an illegal register for old backend
2441 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2442 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2443 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2444 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2445 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2446 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2447 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2448 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2449 if (UseCompressedOops) {
2450 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2451 } else {
2452 move(src, dst, info);
2453 }
2454 }
2455 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2456 if (UseCompressedOops) {
2457 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2458 } else {
2459 move(src, dst, info);
2460 }
2461 }
2462 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2464 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2465 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2467 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2468 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2470 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2472 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2474 #ifdef PPC
2475 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2476 #endif
2477 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2479 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
2480 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
2481 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2483 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2484 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2486 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2487 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2488 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2489 }
2490 void unwind_exception(LIR_Opr exceptionOop) {
2491 append(new LIR_Op1(lir_unwind, exceptionOop));
2492 }
2494 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2495 append(new LIR_Op2(lir_compare_to, left, right, dst));
2496 }
2498 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2499 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2501 #ifndef MIPS
2502 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2503 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2504 }
2505 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2506 cmp(condition, left, LIR_OprFact::intConst(right), info);
2507 }
2509 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2510 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2512 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2513 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2514 }
2516 #else
2517 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2518 CodeEmitInfo* info = NULL) {
2519 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2520 }
2522 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2523 CodeEmitInfo* info = NULL) {
2524 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2525 }
2527 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2528 CodeEmitInfo* info) {
2529 append(new LIR_Op2(lir_null_check_for_branch, condition,
2530 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2531 LIR_OprFact::intConst(c),
2532 info, T_INT));
2533 }
2535 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2536 CodeEmitInfo* info) {
2537 append(new LIR_Op2(lir_null_check_for_branch, condition,
2538 reg,
2539 LIR_OprFact::address(addr),
2540 info));
2541 }
2543 void cmove_mips(LIR_Condition condition, LIR_Opr cmp1, LIR_Opr cmp2, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2544 append(new LIR_Op4(lir_cmove_mips, condition, cmp1, cmp2, src1, src2, dst, type));
2545 }
2546 #endif
2547 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2548 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2549 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2550 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2551 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2552 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2554 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2555 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2556 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2557 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2558 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2559 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2560 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2561 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2562 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2564 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2565 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2566 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2567 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2568 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2569 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2570 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2572 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2573 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2575 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2577 void prefetch(LIR_Address* addr, bool is_store);
2579 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2580 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2581 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2582 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2583 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2585 #ifdef MIPS
2586 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2587 #endif
2589 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2590 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2591 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2592 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2594 #ifndef MIPS
2595 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2596 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2597 #else
2598 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2599 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2600 #endif
2602 // jump is an unconditional branch
2603 void jump(BlockBegin* block) {
2604 #ifndef MIPS
2605 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2606 #else
2607 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2608 #endif
2609 }
2610 void jump(CodeStub* stub) {
2611 #ifndef MIPS
2612 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2613 #else
2614 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2615 #endif
2616 }
2617 #ifndef MIPS
2618 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2619 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2620 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2621 append(new LIR_OpBranch(cond, type, block));
2622 }
2623 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2624 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2625 append(new LIR_OpBranch(cond, type, stub));
2626 }
2627 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2628 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2629 append(new LIR_OpBranch(cond, type, block, unordered));
2630 }
2631 #else
2632 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2633 append(new LIR_OpBranch(cond, left, right, lbl));
2634 }
2636 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2637 append(new LIR_OpBranch(cond, left, right, type, block));
2638 }
2640 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2641 append(new LIR_OpBranch(cond, left, right, type, stub));
2642 }
2644 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2645 BlockBegin* block, BlockBegin* unordered) {
2646 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2647 }
2649 #endif
2651 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2652 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2653 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2655 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2656 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2657 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2659 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2660 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2662 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2663 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2664 }
2666 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2667 LIR_OprList* arguments, CodeEmitInfo* info) {
2668 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2669 }
2671 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2672 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2673 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2675 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2676 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2677 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2679 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2681 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2683 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2685 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2686 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2688 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2689 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2690 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2691 ciMethod* profiled_method, int profiled_bci);
2692 // MethodData* profiling
2693 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2694 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2695 }
2696 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2697 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2698 }
2700 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2701 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2702 #ifdef ASSERT
2703 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2704 #endif
2705 };
2707 void print_LIR(BlockList* blocks);
2709 class LIR_InsertionBuffer : public CompilationResourceObj {
2710 private:
2711 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2713 // list of insertion points. index and count are stored alternately:
2714 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2715 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2716 intStack _index_and_count;
2718 // the LIR_Ops to be inserted
2719 LIR_OpList _ops;
2721 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2722 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2723 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2725 #ifdef ASSERT
2726 void verify();
2727 #endif
2728 public:
2729 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2731 // must be called before using the insertion buffer
2732 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2733 bool initialized() const { return _lir != NULL; }
2734 // called automatically when the buffer is appended to the LIR_List
2735 void finish() { _lir = NULL; }
2737 // accessors
2738 LIR_List* lir_list() const { return _lir; }
2739 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2740 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2741 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2743 int number_of_ops() const { return _ops.length(); }
2744 LIR_Op* op_at(int i) const { return _ops.at(i); }
2746 // append an instruction to the buffer
2747 void append(int index, LIR_Op* op);
2749 // instruction
2750 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2751 };
2754 //
2755 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2756 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2757 // information about the input, output and temporaries used by the
2758 // op to be recorded. It also records whether the op has call semantics
2759 // and also records all the CodeEmitInfos used by this op.
2760 //
2763 class LIR_OpVisitState: public StackObj {
2764 public:
2765 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2767 enum {
2768 maxNumberOfOperands = 20,
2769 maxNumberOfInfos = 4
2770 };
2772 private:
2773 LIR_Op* _op;
2775 // optimization: the operands and infos are not stored in a variable-length
2776 // list, but in a fixed-size array to save time of size checks and resizing
2777 int _oprs_len[numModes];
2778 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2779 int _info_len;
2780 CodeEmitInfo* _info_new[maxNumberOfInfos];
2782 bool _has_call;
2783 bool _has_slow_case;
2786 // only include register operands
2787 // addresses are decomposed to the base and index registers
2788 // constants and stack operands are ignored
2789 void append(LIR_Opr& opr, OprMode mode) {
2790 assert(opr->is_valid(), "should not call this otherwise");
2791 assert(mode >= 0 && mode < numModes, "bad mode");
2793 if (opr->is_register()) {
2794 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2795 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2797 } else if (opr->is_pointer()) {
2798 LIR_Address* address = opr->as_address_ptr();
2799 if (address != NULL) {
2800 // special handling for addresses: add base and index register of the address
2801 // both are always input operands or temp if we want to extend
2802 // their liveness!
2803 if (mode == outputMode) {
2804 mode = inputMode;
2805 }
2806 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2807 if (address->_base->is_valid()) {
2808 assert(address->_base->is_register(), "must be");
2809 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2810 _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2811 }
2812 if (address->_index->is_valid()) {
2813 assert(address->_index->is_register(), "must be");
2814 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2815 _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2816 }
2818 } else {
2819 assert(opr->is_constant(), "constant operands are not processed");
2820 }
2821 } else {
2822 assert(opr->is_stack(), "stack operands are not processed");
2823 }
2824 }
2826 void append(CodeEmitInfo* info) {
2827 assert(info != NULL, "should not call this otherwise");
2828 assert(_info_len < maxNumberOfInfos, "array overflow");
2829 _info_new[_info_len++] = info;
2830 }
2832 public:
2833 LIR_OpVisitState() { reset(); }
2835 LIR_Op* op() const { return _op; }
2836 void set_op(LIR_Op* op) { reset(); _op = op; }
2838 bool has_call() const { return _has_call; }
2839 bool has_slow_case() const { return _has_slow_case; }
2841 void reset() {
2842 _op = NULL;
2843 _has_call = false;
2844 _has_slow_case = false;
2846 _oprs_len[inputMode] = 0;
2847 _oprs_len[tempMode] = 0;
2848 _oprs_len[outputMode] = 0;
2849 _info_len = 0;
2850 }
2853 int opr_count(OprMode mode) const {
2854 assert(mode >= 0 && mode < numModes, "bad mode");
2855 return _oprs_len[mode];
2856 }
2858 LIR_Opr opr_at(OprMode mode, int index) const {
2859 assert(mode >= 0 && mode < numModes, "bad mode");
2860 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2861 return *_oprs_new[mode][index];
2862 }
2864 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2865 assert(mode >= 0 && mode < numModes, "bad mode");
2866 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2867 *_oprs_new[mode][index] = opr;
2868 }
2870 int info_count() const {
2871 return _info_len;
2872 }
2874 CodeEmitInfo* info_at(int index) const {
2875 assert(index < _info_len, "index out of bounds");
2876 return _info_new[index];
2877 }
2879 XHandlers* all_xhandler();
2881 // collects all register operands of the instruction
2882 void visit(LIR_Op* op);
2884 #ifdef ASSERT
2885 // check that an operation has no operands
2886 bool no_operands(LIR_Op* op);
2887 #endif
2889 // LIR_Op visitor functions use these to fill in the state
2890 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2891 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2892 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2893 void do_info(CodeEmitInfo* info) { append(info); }
2895 void do_stub(CodeStub* stub);
2896 void do_call() { _has_call = true; }
2897 void do_slow_case() { _has_slow_case = true; }
2898 void do_slow_case(CodeEmitInfo* info) {
2899 _has_slow_case = true;
2900 append(info);
2901 }
2902 };
2905 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2907 #endif // SHARE_VM_C1_C1_LIR_HPP
