src/cpu/x86/vm/c1_Runtime1_x86.cpp

Mon, 27 Feb 2012 11:42:30 +0100

author
roland
date
Mon, 27 Feb 2012 11:42:30 +0100
changeset 3607
bf7796b7367a
parent 3400
22cee0ee8927
child 4037
da91efe96a93
permissions
-rw-r--r--

7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
Summary: stack must be realigned when calling the runtime for exception propagation at a call.
Reviewed-by: kvn, never

duke@435 1 /*
phh@2423 2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
stefank@2314 25 #include "precompiled.hpp"
twisti@2697 26 #include "asm/assembler.hpp"
stefank@2314 27 #include "c1/c1_Defs.hpp"
stefank@2314 28 #include "c1/c1_MacroAssembler.hpp"
stefank@2314 29 #include "c1/c1_Runtime1.hpp"
stefank@2314 30 #include "interpreter/interpreter.hpp"
stefank@2314 31 #include "nativeInst_x86.hpp"
stefank@2314 32 #include "oops/compiledICHolderOop.hpp"
stefank@2314 33 #include "oops/oop.inline.hpp"
stefank@2314 34 #include "prims/jvmtiExport.hpp"
stefank@2314 35 #include "register_x86.hpp"
stefank@2314 36 #include "runtime/sharedRuntime.hpp"
stefank@2314 37 #include "runtime/signature.hpp"
stefank@2314 38 #include "runtime/vframeArray.hpp"
stefank@2314 39 #include "vmreg_x86.inline.hpp"
duke@435 40
duke@435 41
duke@435 42 // Implementation of StubAssembler
duke@435 43
duke@435 44 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) {
duke@435 45 // setup registers
never@739 46 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
duke@435 47 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different");
duke@435 48 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different");
duke@435 49 assert(args_size >= 0, "illegal args_size");
roland@3607 50 bool align_stack = false;
roland@3607 51 #ifdef _LP64
roland@3607 52 // At a method handle call, the stack may not be properly aligned
roland@3607 53 // when returning with an exception.
roland@3607 54 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
roland@3607 55 #endif
duke@435 56
never@739 57 #ifdef _LP64
never@739 58 mov(c_rarg0, thread);
never@739 59 set_num_rt_args(0); // Nothing on stack
never@739 60 #else
duke@435 61 set_num_rt_args(1 + args_size);
duke@435 62
duke@435 63 // push java thread (becomes first argument of C function)
duke@435 64 get_thread(thread);
never@739 65 push(thread);
never@739 66 #endif // _LP64
duke@435 67
roland@3607 68 int call_offset;
roland@3607 69 if (!align_stack) {
roland@3607 70 set_last_Java_frame(thread, noreg, rbp, NULL);
roland@3607 71 } else {
roland@3607 72 address the_pc = pc();
roland@3607 73 call_offset = offset();
roland@3607 74 set_last_Java_frame(thread, noreg, rbp, the_pc);
roland@3607 75 andptr(rsp, -(StackAlignmentInBytes)); // Align stack
roland@3607 76 }
never@739 77
duke@435 78 // do the call
duke@435 79 call(RuntimeAddress(entry));
roland@3607 80 if (!align_stack) {
roland@3607 81 call_offset = offset();
roland@3607 82 }
duke@435 83 // verify callee-saved register
duke@435 84 #ifdef ASSERT
duke@435 85 guarantee(thread != rax, "change this code");
never@739 86 push(rax);
duke@435 87 { Label L;
duke@435 88 get_thread(rax);
never@739 89 cmpptr(thread, rax);
duke@435 90 jcc(Assembler::equal, L);
duke@435 91 int3();
duke@435 92 stop("StubAssembler::call_RT: rdi not callee saved?");
duke@435 93 bind(L);
duke@435 94 }
never@739 95 pop(rax);
duke@435 96 #endif
roland@3607 97 reset_last_Java_frame(thread, true, align_stack);
duke@435 98
duke@435 99 // discard thread and arguments
never@739 100 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
duke@435 101
duke@435 102 // check for pending exceptions
duke@435 103 { Label L;
never@739 104 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
duke@435 105 jcc(Assembler::equal, L);
duke@435 106 // exception pending => remove activation and forward to exception handler
never@739 107 movptr(rax, Address(thread, Thread::pending_exception_offset()));
duke@435 108 // make sure that the vm_results are cleared
duke@435 109 if (oop_result1->is_valid()) {
xlu@947 110 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435 111 }
duke@435 112 if (oop_result2->is_valid()) {
xlu@947 113 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435 114 }
duke@435 115 if (frame_size() == no_frame_size) {
duke@435 116 leave();
duke@435 117 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
duke@435 118 } else if (_stub_id == Runtime1::forward_exception_id) {
duke@435 119 should_not_reach_here();
duke@435 120 } else {
duke@435 121 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
duke@435 122 }
duke@435 123 bind(L);
duke@435 124 }
duke@435 125 // get oop results if there are any and reset the values in the thread
duke@435 126 if (oop_result1->is_valid()) {
never@739 127 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset()));
xlu@947 128 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435 129 verify_oop(oop_result1);
duke@435 130 }
duke@435 131 if (oop_result2->is_valid()) {
never@739 132 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset()));
xlu@947 133 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435 134 verify_oop(oop_result2);
duke@435 135 }
duke@435 136 return call_offset;
duke@435 137 }
duke@435 138
duke@435 139
duke@435 140 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
never@739 141 #ifdef _LP64
never@739 142 mov(c_rarg1, arg1);
never@739 143 #else
never@739 144 push(arg1);
never@739 145 #endif // _LP64
duke@435 146 return call_RT(oop_result1, oop_result2, entry, 1);
duke@435 147 }
duke@435 148
duke@435 149
duke@435 150 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
never@739 151 #ifdef _LP64
never@739 152 if (c_rarg1 == arg2) {
never@739 153 if (c_rarg2 == arg1) {
never@739 154 xchgq(arg1, arg2);
never@739 155 } else {
never@739 156 mov(c_rarg2, arg2);
never@739 157 mov(c_rarg1, arg1);
never@739 158 }
never@739 159 } else {
never@739 160 mov(c_rarg1, arg1);
never@739 161 mov(c_rarg2, arg2);
never@739 162 }
never@739 163 #else
never@739 164 push(arg2);
never@739 165 push(arg1);
never@739 166 #endif // _LP64
duke@435 167 return call_RT(oop_result1, oop_result2, entry, 2);
duke@435 168 }
duke@435 169
duke@435 170
duke@435 171 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
never@739 172 #ifdef _LP64
never@739 173 // if there is any conflict use the stack
never@739 174 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
never@739 175 arg2 == c_rarg1 || arg1 == c_rarg3 ||
never@739 176 arg3 == c_rarg1 || arg1 == c_rarg2) {
never@739 177 push(arg3);
never@739 178 push(arg2);
never@739 179 push(arg1);
never@739 180 pop(c_rarg1);
never@739 181 pop(c_rarg2);
never@739 182 pop(c_rarg3);
never@739 183 } else {
never@739 184 mov(c_rarg1, arg1);
never@739 185 mov(c_rarg2, arg2);
never@739 186 mov(c_rarg3, arg3);
never@739 187 }
never@739 188 #else
never@739 189 push(arg3);
never@739 190 push(arg2);
never@739 191 push(arg1);
never@739 192 #endif // _LP64
duke@435 193 return call_RT(oop_result1, oop_result2, entry, 3);
duke@435 194 }
duke@435 195
duke@435 196
duke@435 197 // Implementation of StubFrame
duke@435 198
duke@435 199 class StubFrame: public StackObj {
duke@435 200 private:
duke@435 201 StubAssembler* _sasm;
duke@435 202
duke@435 203 public:
duke@435 204 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
duke@435 205 void load_argument(int offset_in_words, Register reg);
duke@435 206
duke@435 207 ~StubFrame();
duke@435 208 };
duke@435 209
duke@435 210
duke@435 211 #define __ _sasm->
duke@435 212
duke@435 213 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
duke@435 214 _sasm = sasm;
duke@435 215 __ set_info(name, must_gc_arguments);
duke@435 216 __ enter();
duke@435 217 }
duke@435 218
duke@435 219 // load parameters that were stored with LIR_Assembler::store_parameter
duke@435 220 // Note: offsets for store_parameter and load_argument must match
duke@435 221 void StubFrame::load_argument(int offset_in_words, Register reg) {
duke@435 222 // rbp, + 0: link
duke@435 223 // + 1: return address
duke@435 224 // + 2: argument with offset 0
duke@435 225 // + 3: argument with offset 1
duke@435 226 // + 4: ...
duke@435 227
never@739 228 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
duke@435 229 }
duke@435 230
duke@435 231
duke@435 232 StubFrame::~StubFrame() {
duke@435 233 __ leave();
duke@435 234 __ ret(0);
duke@435 235 }
duke@435 236
duke@435 237 #undef __
duke@435 238
duke@435 239
duke@435 240 // Implementation of Runtime1
duke@435 241
duke@435 242 #define __ sasm->
duke@435 243
never@739 244 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
never@739 245 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
duke@435 246
duke@435 247 // Stack layout for saving/restoring all the registers needed during a runtime
duke@435 248 // call (this includes deoptimization)
duke@435 249 // Note: note that users of this frame may well have arguments to some runtime
duke@435 250 // while these values are on the stack. These positions neglect those arguments
duke@435 251 // but the code in save_live_registers will take the argument count into
duke@435 252 // account.
duke@435 253 //
never@739 254 #ifdef _LP64
never@739 255 #define SLOT2(x) x,
never@739 256 #define SLOT_PER_WORD 2
never@739 257 #else
never@739 258 #define SLOT2(x)
never@739 259 #define SLOT_PER_WORD 1
never@739 260 #endif // _LP64
never@739 261
duke@435 262 enum reg_save_layout {
never@739 263 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
never@739 264 // happen and will assert if the stack size we create is misaligned
never@739 265 #ifdef _LP64
never@739 266 align_dummy_0, align_dummy_1,
never@739 267 #endif // _LP64
twisti@2603 268 #ifdef _WIN64
twisti@2603 269 // Windows always allocates space for it's argument registers (see
twisti@2603 270 // frame::arg_reg_save_area_bytes).
twisti@2603 271 arg_reg_save_1, arg_reg_save_1H, // 0, 4
twisti@2603 272 arg_reg_save_2, arg_reg_save_2H, // 8, 12
twisti@2603 273 arg_reg_save_3, arg_reg_save_3H, // 16, 20
twisti@2603 274 arg_reg_save_4, arg_reg_save_4H, // 24, 28
twisti@2603 275 #endif // _WIN64
never@739 276 xmm_regs_as_doubles_off, // 32
never@739 277 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
never@739 278 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
never@739 279 // fpu_state_end_off is exclusive
never@739 280 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
never@739 281 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
never@739 282 extra_space_offset, // 360
never@739 283 #ifdef _LP64
never@739 284 r15_off = extra_space_offset, r15H_off, // 360, 364
never@739 285 r14_off, r14H_off, // 368, 372
never@739 286 r13_off, r13H_off, // 376, 380
never@739 287 r12_off, r12H_off, // 384, 388
never@739 288 r11_off, r11H_off, // 392, 396
never@739 289 r10_off, r10H_off, // 400, 404
never@739 290 r9_off, r9H_off, // 408, 412
never@739 291 r8_off, r8H_off, // 416, 420
never@739 292 rdi_off, rdiH_off, // 424, 428
never@739 293 #else
duke@435 294 rdi_off = extra_space_offset,
never@739 295 #endif // _LP64
never@739 296 rsi_off, SLOT2(rsiH_off) // 432, 436
never@739 297 rbp_off, SLOT2(rbpH_off) // 440, 444
never@739 298 rsp_off, SLOT2(rspH_off) // 448, 452
never@739 299 rbx_off, SLOT2(rbxH_off) // 456, 460
never@739 300 rdx_off, SLOT2(rdxH_off) // 464, 468
never@739 301 rcx_off, SLOT2(rcxH_off) // 472, 476
never@739 302 rax_off, SLOT2(raxH_off) // 480, 484
never@739 303 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
never@739 304 return_off, SLOT2(returnH_off) // 496, 500
twisti@2603 305 reg_save_frame_size // As noted: neglects any parameters to runtime // 504
duke@435 306 };
duke@435 307
duke@435 308
duke@435 309
duke@435 310 // Save off registers which might be killed by calls into the runtime.
duke@435 311 // Tries to smart of about FP registers. In particular we separate
duke@435 312 // saving and describing the FPU registers for deoptimization since we
duke@435 313 // have to save the FPU registers twice if we describe them and on P4
duke@435 314 // saving FPU registers which don't contain anything appears
duke@435 315 // expensive. The deopt blob is the only thing which needs to
duke@435 316 // describe FPU registers. In all other cases it should be sufficient
duke@435 317 // to simply save their current value.
duke@435 318
duke@435 319 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
duke@435 320 bool save_fpu_registers = true) {
never@739 321
never@739 322 // In 64bit all the args are in regs so there are no additional stack slots
never@739 323 LP64_ONLY(num_rt_args = 0);
never@739 324 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
never@739 325 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
never@739 326 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
duke@435 327
duke@435 328 // record saved value locations in an OopMap
duke@435 329 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
never@739 330 OopMap* map = new OopMap(frame_size_in_slots, 0);
duke@435 331 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
duke@435 332 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
duke@435 333 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
duke@435 334 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
duke@435 335 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
duke@435 336 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
never@739 337 #ifdef _LP64
never@739 338 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
never@739 339 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
never@739 340 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
never@739 341 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
never@739 342 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
never@739 343 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
never@739 344 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
never@739 345 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
never@739 346
never@739 347 // This is stupid but needed.
never@739 348 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
never@739 349 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
never@739 350 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
never@739 351 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
never@739 352 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
never@739 353 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
never@739 354
never@739 355 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
never@739 356 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
never@739 357 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
never@739 358 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
never@739 359 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
never@739 360 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
never@739 361 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
never@739 362 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
never@739 363 #endif // _LP64
duke@435 364
duke@435 365 if (save_fpu_registers) {
duke@435 366 if (UseSSE < 2) {
duke@435 367 int fpu_off = float_regs_as_doubles_off;
duke@435 368 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
duke@435 369 VMReg fpu_name_0 = FrameMap::fpu_regname(n);
duke@435 370 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
duke@435 371 // %%% This is really a waste but we'll keep things as they were for now
duke@435 372 if (true) {
duke@435 373 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
duke@435 374 }
duke@435 375 fpu_off += 2;
duke@435 376 }
duke@435 377 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
duke@435 378 }
duke@435 379
duke@435 380 if (UseSSE >= 2) {
duke@435 381 int xmm_off = xmm_regs_as_doubles_off;
duke@435 382 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
duke@435 383 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
duke@435 384 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
duke@435 385 // %%% This is really a waste but we'll keep things as they were for now
duke@435 386 if (true) {
duke@435 387 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
duke@435 388 }
duke@435 389 xmm_off += 2;
duke@435 390 }
duke@435 391 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
duke@435 392
duke@435 393 } else if (UseSSE == 1) {
duke@435 394 int xmm_off = xmm_regs_as_doubles_off;
duke@435 395 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
duke@435 396 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
duke@435 397 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
duke@435 398 xmm_off += 2;
duke@435 399 }
duke@435 400 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
duke@435 401 }
duke@435 402 }
duke@435 403
duke@435 404 return map;
duke@435 405 }
duke@435 406
duke@435 407 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
duke@435 408 bool save_fpu_registers = true) {
duke@435 409 __ block_comment("save_live_registers");
duke@435 410
never@739 411 __ pusha(); // integer registers
duke@435 412
duke@435 413 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
duke@435 414 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
duke@435 415
never@739 416 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
duke@435 417
duke@435 418 #ifdef ASSERT
never@739 419 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
duke@435 420 #endif
duke@435 421
duke@435 422 if (save_fpu_registers) {
duke@435 423 if (UseSSE < 2) {
duke@435 424 // save FPU stack
never@739 425 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435 426 __ fwait();
duke@435 427
duke@435 428 #ifdef ASSERT
duke@435 429 Label ok;
never@739 430 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
duke@435 431 __ jccb(Assembler::equal, ok);
duke@435 432 __ stop("corrupted control word detected");
duke@435 433 __ bind(ok);
duke@435 434 #endif
duke@435 435
duke@435 436 // Reset the control word to guard against exceptions being unmasked
duke@435 437 // since fstp_d can cause FPU stack underflow exceptions. Write it
duke@435 438 // into the on stack copy and then reload that to make sure that the
duke@435 439 // current and future values are correct.
never@739 440 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
never@739 441 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435 442
duke@435 443 // Save the FPU registers in de-opt-able form
never@739 444 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739 445 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739 446 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739 447 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739 448 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739 449 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739 450 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739 451 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
duke@435 452 }
duke@435 453
duke@435 454 if (UseSSE >= 2) {
duke@435 455 // save XMM registers
duke@435 456 // XMM registers can contain float or double values, but this is not known here,
duke@435 457 // so always save them as doubles.
duke@435 458 // note that float values are _not_ converted automatically, so for float values
duke@435 459 // the second word contains only garbage data.
never@739 460 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
never@739 461 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
never@739 462 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
never@739 463 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
never@739 464 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
never@739 465 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
never@739 466 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
never@739 467 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
never@739 468 #ifdef _LP64
never@739 469 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8);
never@739 470 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9);
never@739 471 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10);
never@739 472 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11);
never@739 473 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12);
never@739 474 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13);
never@739 475 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14);
never@739 476 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15);
never@739 477 #endif // _LP64
duke@435 478 } else if (UseSSE == 1) {
duke@435 479 // save XMM registers as float because double not supported without SSE2
never@739 480 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
never@739 481 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
never@739 482 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
never@739 483 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
never@739 484 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
never@739 485 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
never@739 486 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
never@739 487 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
duke@435 488 }
duke@435 489 }
duke@435 490
duke@435 491 // FPU stack must be empty now
duke@435 492 __ verify_FPU(0, "save_live_registers");
duke@435 493
duke@435 494 return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
duke@435 495 }
duke@435 496
duke@435 497
duke@435 498 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435 499 if (restore_fpu_registers) {
duke@435 500 if (UseSSE >= 2) {
duke@435 501 // restore XMM registers
never@739 502 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739 503 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739 504 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739 505 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739 506 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739 507 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739 508 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739 509 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
never@739 510 #ifdef _LP64
never@739 511 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64));
never@739 512 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72));
never@739 513 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80));
never@739 514 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88));
never@739 515 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96));
never@739 516 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104));
never@739 517 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112));
never@739 518 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120));
never@739 519 #endif // _LP64
duke@435 520 } else if (UseSSE == 1) {
duke@435 521 // restore XMM registers
never@739 522 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739 523 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739 524 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739 525 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739 526 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739 527 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739 528 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739 529 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
duke@435 530 }
duke@435 531
duke@435 532 if (UseSSE < 2) {
never@739 533 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435 534 } else {
duke@435 535 // check that FPU stack is really empty
duke@435 536 __ verify_FPU(0, "restore_live_registers");
duke@435 537 }
duke@435 538
duke@435 539 } else {
duke@435 540 // check that FPU stack is really empty
duke@435 541 __ verify_FPU(0, "restore_live_registers");
duke@435 542 }
duke@435 543
duke@435 544 #ifdef ASSERT
duke@435 545 {
duke@435 546 Label ok;
never@739 547 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
duke@435 548 __ jcc(Assembler::equal, ok);
duke@435 549 __ stop("bad offsets in frame");
duke@435 550 __ bind(ok);
duke@435 551 }
never@739 552 #endif // ASSERT
duke@435 553
never@739 554 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
duke@435 555 }
duke@435 556
duke@435 557
duke@435 558 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435 559 __ block_comment("restore_live_registers");
duke@435 560
duke@435 561 restore_fpu(sasm, restore_fpu_registers);
never@739 562 __ popa();
duke@435 563 }
duke@435 564
duke@435 565
duke@435 566 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435 567 __ block_comment("restore_live_registers_except_rax");
duke@435 568
duke@435 569 restore_fpu(sasm, restore_fpu_registers);
duke@435 570
never@739 571 #ifdef _LP64
never@739 572 __ movptr(r15, Address(rsp, 0));
never@739 573 __ movptr(r14, Address(rsp, wordSize));
never@739 574 __ movptr(r13, Address(rsp, 2 * wordSize));
never@739 575 __ movptr(r12, Address(rsp, 3 * wordSize));
never@739 576 __ movptr(r11, Address(rsp, 4 * wordSize));
never@739 577 __ movptr(r10, Address(rsp, 5 * wordSize));
never@739 578 __ movptr(r9, Address(rsp, 6 * wordSize));
never@739 579 __ movptr(r8, Address(rsp, 7 * wordSize));
never@739 580 __ movptr(rdi, Address(rsp, 8 * wordSize));
never@739 581 __ movptr(rsi, Address(rsp, 9 * wordSize));
never@739 582 __ movptr(rbp, Address(rsp, 10 * wordSize));
never@739 583 // skip rsp
never@739 584 __ movptr(rbx, Address(rsp, 12 * wordSize));
never@739 585 __ movptr(rdx, Address(rsp, 13 * wordSize));
never@739 586 __ movptr(rcx, Address(rsp, 14 * wordSize));
never@739 587
never@739 588 __ addptr(rsp, 16 * wordSize);
never@739 589 #else
never@739 590
never@739 591 __ pop(rdi);
never@739 592 __ pop(rsi);
never@739 593 __ pop(rbp);
never@739 594 __ pop(rbx); // skip this value
never@739 595 __ pop(rbx);
never@739 596 __ pop(rdx);
never@739 597 __ pop(rcx);
never@739 598 __ addptr(rsp, BytesPerWord);
never@739 599 #endif // _LP64
duke@435 600 }
duke@435 601
duke@435 602
duke@435 603 void Runtime1::initialize_pd() {
duke@435 604 // nothing to do
duke@435 605 }
duke@435 606
duke@435 607
duke@435 608 // target: the entry point of the method that creates and posts the exception oop
duke@435 609 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
duke@435 610
duke@435 611 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
duke@435 612 // preserve all registers
duke@435 613 int num_rt_args = has_argument ? 2 : 1;
duke@435 614 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
duke@435 615
duke@435 616 // now all registers are saved and can be used freely
duke@435 617 // verify that no old value is used accidentally
duke@435 618 __ invalidate_registers(true, true, true, true, true, true);
duke@435 619
duke@435 620 // registers used by this stub
duke@435 621 const Register temp_reg = rbx;
duke@435 622
duke@435 623 // load argument for exception that is passed as an argument into the stub
duke@435 624 if (has_argument) {
never@739 625 #ifdef _LP64
never@739 626 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
never@739 627 #else
never@739 628 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
never@739 629 __ push(temp_reg);
never@739 630 #endif // _LP64
duke@435 631 }
duke@435 632 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
duke@435 633
duke@435 634 OopMapSet* oop_maps = new OopMapSet();
duke@435 635 oop_maps->add_gc_map(call_offset, oop_map);
duke@435 636
duke@435 637 __ stop("should not reach here");
duke@435 638
duke@435 639 return oop_maps;
duke@435 640 }
duke@435 641
duke@435 642
twisti@2603 643 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
twisti@2603 644 __ block_comment("generate_handle_exception");
twisti@2603 645
duke@435 646 // incoming parameters
duke@435 647 const Register exception_oop = rax;
twisti@2603 648 const Register exception_pc = rdx;
duke@435 649 // other registers used in this stub
never@739 650 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435 651
twisti@2603 652 // Save registers, if required.
twisti@2603 653 OopMapSet* oop_maps = new OopMapSet();
twisti@2603 654 OopMap* oop_map = NULL;
twisti@2603 655 switch (id) {
twisti@2603 656 case forward_exception_id:
twisti@2603 657 // We're handling an exception in the context of a compiled frame.
twisti@2603 658 // The registers have been saved in the standard places. Perform
twisti@2603 659 // an exception lookup in the caller and dispatch to the handler
twisti@2603 660 // if found. Otherwise unwind and dispatch to the callers
twisti@2603 661 // exception handler.
twisti@2603 662 oop_map = generate_oop_map(sasm, 1 /*thread*/);
twisti@2603 663
twisti@2603 664 // load and clear pending exception oop into RAX
twisti@2603 665 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
twisti@2603 666 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
twisti@2603 667
twisti@2603 668 // load issuing PC (the return address for this stub) into rdx
twisti@2603 669 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
twisti@2603 670
twisti@2603 671 // make sure that the vm_results are cleared (may be unnecessary)
twisti@2603 672 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
twisti@2603 673 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
twisti@2603 674 break;
twisti@2603 675 case handle_exception_nofpu_id:
twisti@2603 676 case handle_exception_id:
twisti@2603 677 // At this point all registers MAY be live.
twisti@2603 678 oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id);
twisti@2603 679 break;
twisti@2603 680 case handle_exception_from_callee_id: {
twisti@2603 681 // At this point all registers except exception oop (RAX) and
twisti@2603 682 // exception pc (RDX) are dead.
twisti@2603 683 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
twisti@2603 684 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
twisti@2603 685 sasm->set_frame_size(frame_size);
twisti@2603 686 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
twisti@2603 687 break;
twisti@2603 688 }
twisti@2603 689 default: ShouldNotReachHere();
twisti@2603 690 }
duke@435 691
duke@435 692 #ifdef TIERED
duke@435 693 // C2 can leave the fpu stack dirty
twisti@2603 694 if (UseSSE < 2) {
duke@435 695 __ empty_FPU_stack();
duke@435 696 }
duke@435 697 #endif // TIERED
duke@435 698
duke@435 699 // verify that only rax, and rdx is valid at this time
duke@435 700 __ invalidate_registers(false, true, true, false, true, true);
duke@435 701 // verify that rax, contains a valid exception
duke@435 702 __ verify_not_null_oop(exception_oop);
duke@435 703
duke@435 704 // load address of JavaThread object for thread-local data
never@739 705 NOT_LP64(__ get_thread(thread);)
duke@435 706
duke@435 707 #ifdef ASSERT
duke@435 708 // check that fields in JavaThread for exception oop and issuing pc are
duke@435 709 // empty before writing to them
duke@435 710 Label oop_empty;
never@739 711 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
duke@435 712 __ jcc(Assembler::equal, oop_empty);
duke@435 713 __ stop("exception oop already set");
duke@435 714 __ bind(oop_empty);
duke@435 715
duke@435 716 Label pc_empty;
never@739 717 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
duke@435 718 __ jcc(Assembler::equal, pc_empty);
duke@435 719 __ stop("exception pc already set");
duke@435 720 __ bind(pc_empty);
duke@435 721 #endif
duke@435 722
duke@435 723 // save exception oop and issuing pc into JavaThread
duke@435 724 // (exception handler will load it from here)
never@739 725 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
twisti@2603 726 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
duke@435 727
duke@435 728 // patch throwing pc into return address (has bci & oop map)
never@739 729 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
duke@435 730
duke@435 731 // compute the exception handler.
duke@435 732 // the exception oop and the throwing pc are read from the fields in JavaThread
duke@435 733 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
duke@435 734 oop_maps->add_gc_map(call_offset, oop_map);
duke@435 735
twisti@2603 736 // rax: handler address
duke@435 737 // will be the deopt blob if nmethod was deoptimized while we looked up
duke@435 738 // handler regardless of whether handler existed in the nmethod.
duke@435 739
duke@435 740 // only rax, is valid at this time, all other registers have been destroyed by the runtime call
duke@435 741 __ invalidate_registers(false, true, true, true, true, true);
duke@435 742
twisti@2603 743 // patch the return address, this stub will directly return to the exception handler
never@739 744 __ movptr(Address(rbp, 1*BytesPerWord), rax);
duke@435 745
twisti@2603 746 switch (id) {
twisti@2603 747 case forward_exception_id:
twisti@2603 748 case handle_exception_nofpu_id:
twisti@2603 749 case handle_exception_id:
twisti@2603 750 // Restore the registers that were saved at the beginning.
twisti@2603 751 restore_live_registers(sasm, id == handle_exception_nofpu_id);
twisti@2603 752 break;
twisti@2603 753 case handle_exception_from_callee_id:
twisti@2603 754 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
twisti@2603 755 // since we do a leave anyway.
duke@435 756
twisti@2603 757 // Pop the return address since we are possibly changing SP (restoring from BP).
twisti@2603 758 __ leave();
twisti@2603 759 __ pop(rcx);
duke@435 760
twisti@2603 761 // Restore SP from BP if the exception PC is a method handle call site.
twisti@2603 762 NOT_LP64(__ get_thread(thread);)
twisti@2603 763 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0);
twisti@2603 764 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save);
twisti@2603 765 __ jmp(rcx); // jump to exception handler
twisti@2603 766 break;
twisti@2603 767 default: ShouldNotReachHere();
twisti@2603 768 }
twisti@2603 769
twisti@2603 770 return oop_maps;
duke@435 771 }
duke@435 772
duke@435 773
duke@435 774 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
duke@435 775 // incoming parameters
duke@435 776 const Register exception_oop = rax;
twisti@1730 777 // callee-saved copy of exception_oop during runtime call
twisti@1730 778 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
duke@435 779 // other registers used in this stub
duke@435 780 const Register exception_pc = rdx;
duke@435 781 const Register handler_addr = rbx;
never@739 782 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435 783
duke@435 784 // verify that only rax, is valid at this time
duke@435 785 __ invalidate_registers(false, true, true, true, true, true);
duke@435 786
duke@435 787 #ifdef ASSERT
duke@435 788 // check that fields in JavaThread for exception oop and issuing pc are empty
never@739 789 NOT_LP64(__ get_thread(thread);)
duke@435 790 Label oop_empty;
never@739 791 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
duke@435 792 __ jcc(Assembler::equal, oop_empty);
duke@435 793 __ stop("exception oop must be empty");
duke@435 794 __ bind(oop_empty);
duke@435 795
duke@435 796 Label pc_empty;
never@739 797 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
duke@435 798 __ jcc(Assembler::equal, pc_empty);
duke@435 799 __ stop("exception pc must be empty");
duke@435 800 __ bind(pc_empty);
duke@435 801 #endif
duke@435 802
duke@435 803 // clear the FPU stack in case any FPU results are left behind
duke@435 804 __ empty_FPU_stack();
duke@435 805
twisti@1730 806 // save exception_oop in callee-saved register to preserve it during runtime calls
twisti@1730 807 __ verify_not_null_oop(exception_oop);
twisti@1730 808 __ movptr(exception_oop_callee_saved, exception_oop);
twisti@1730 809
twisti@1730 810 NOT_LP64(__ get_thread(thread);)
twisti@1730 811 // Get return address (is on top of stack after leave).
never@739 812 __ movptr(exception_pc, Address(rsp, 0));
duke@435 813
twisti@1730 814 // search the exception handler address of the caller (using the return address)
twisti@1730 815 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
twisti@1730 816 // rax: exception handler address of the caller
duke@435 817
twisti@1730 818 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
twisti@1730 819 __ invalidate_registers(false, true, true, true, false, true);
duke@435 820
duke@435 821 // move result of call into correct register
never@739 822 __ movptr(handler_addr, rax);
duke@435 823
twisti@1730 824 // Restore exception oop to RAX (required convention of exception handler).
twisti@1730 825 __ movptr(exception_oop, exception_oop_callee_saved);
duke@435 826
twisti@1730 827 // verify that there is really a valid exception in rax
twisti@1730 828 __ verify_not_null_oop(exception_oop);
duke@435 829
duke@435 830 // get throwing pc (= return address).
duke@435 831 // rdx has been destroyed by the call, so it must be set again
duke@435 832 // the pop is also necessary to simulate the effect of a ret(0)
never@739 833 __ pop(exception_pc);
duke@435 834
twisti@2603 835 // Restore SP from BP if the exception PC is a method handle call site.
twisti@1730 836 NOT_LP64(__ get_thread(thread);)
twisti@1803 837 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0);
twisti@1919 838 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save);
duke@435 839
duke@435 840 // continue at exception handler (return address removed)
duke@435 841 // note: do *not* remove arguments when unwinding the
duke@435 842 // activation since the caller assumes having
duke@435 843 // all arguments on the stack when entering the
duke@435 844 // runtime to determine the exception handler
duke@435 845 // (GC happens at call site with arguments!)
twisti@1730 846 // rax: exception oop
duke@435 847 // rdx: throwing pc
twisti@1730 848 // rbx: exception handler
duke@435 849 __ jmp(handler_addr);
duke@435 850 }
duke@435 851
duke@435 852
duke@435 853 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
duke@435 854 // use the maximum number of runtime-arguments here because it is difficult to
duke@435 855 // distinguish each RT-Call.
duke@435 856 // Note: This number affects also the RT-Call in generate_handle_exception because
duke@435 857 // the oop-map is shared for all calls.
duke@435 858 const int num_rt_args = 2; // thread + dummy
duke@435 859
duke@435 860 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
duke@435 861 assert(deopt_blob != NULL, "deoptimization blob must have been created");
duke@435 862
duke@435 863 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
duke@435 864
never@739 865 #ifdef _LP64
never@739 866 const Register thread = r15_thread;
never@739 867 // No need to worry about dummy
never@739 868 __ mov(c_rarg0, thread);
never@739 869 #else
never@739 870 __ push(rax); // push dummy
duke@435 871
duke@435 872 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
duke@435 873 // push java thread (becomes first argument of C function)
duke@435 874 __ get_thread(thread);
never@739 875 __ push(thread);
never@739 876 #endif // _LP64
duke@435 877 __ set_last_Java_frame(thread, noreg, rbp, NULL);
duke@435 878 // do the call
duke@435 879 __ call(RuntimeAddress(target));
duke@435 880 OopMapSet* oop_maps = new OopMapSet();
duke@435 881 oop_maps->add_gc_map(__ offset(), oop_map);
duke@435 882 // verify callee-saved register
duke@435 883 #ifdef ASSERT
duke@435 884 guarantee(thread != rax, "change this code");
never@739 885 __ push(rax);
duke@435 886 { Label L;
duke@435 887 __ get_thread(rax);
never@739 888 __ cmpptr(thread, rax);
duke@435 889 __ jcc(Assembler::equal, L);
never@739 890 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
duke@435 891 __ bind(L);
duke@435 892 }
never@739 893 __ pop(rax);
duke@435 894 #endif
duke@435 895 __ reset_last_Java_frame(thread, true, false);
never@739 896 #ifndef _LP64
never@739 897 __ pop(rcx); // discard thread arg
never@739 898 __ pop(rcx); // discard dummy
never@739 899 #endif // _LP64
duke@435 900
duke@435 901 // check for pending exceptions
duke@435 902 { Label L;
never@739 903 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
duke@435 904 __ jcc(Assembler::equal, L);
duke@435 905 // exception pending => remove activation and forward to exception handler
duke@435 906
never@739 907 __ testptr(rax, rax); // have we deoptimized?
duke@435 908 __ jump_cc(Assembler::equal,
duke@435 909 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
duke@435 910
duke@435 911 // the deopt blob expects exceptions in the special fields of
duke@435 912 // JavaThread, so copy and clear pending exception.
duke@435 913
duke@435 914 // load and clear pending exception
never@739 915 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
xlu@947 916 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
duke@435 917
duke@435 918 // check that there is really a valid exception
duke@435 919 __ verify_not_null_oop(rax);
duke@435 920
duke@435 921 // load throwing pc: this is the return address of the stub
never@739 922 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
duke@435 923
duke@435 924 #ifdef ASSERT
duke@435 925 // check that fields in JavaThread for exception oop and issuing pc are empty
duke@435 926 Label oop_empty;
never@739 927 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
duke@435 928 __ jcc(Assembler::equal, oop_empty);
duke@435 929 __ stop("exception oop must be empty");
duke@435 930 __ bind(oop_empty);
duke@435 931
duke@435 932 Label pc_empty;
never@739 933 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
duke@435 934 __ jcc(Assembler::equal, pc_empty);
duke@435 935 __ stop("exception pc must be empty");
duke@435 936 __ bind(pc_empty);
duke@435 937 #endif
duke@435 938
duke@435 939 // store exception oop and throwing pc to JavaThread
never@739 940 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
never@739 941 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
duke@435 942
duke@435 943 restore_live_registers(sasm);
duke@435 944
duke@435 945 __ leave();
never@739 946 __ addptr(rsp, BytesPerWord); // remove return address from stack
duke@435 947
duke@435 948 // Forward the exception directly to deopt blob. We can blow no
duke@435 949 // registers and must leave throwing pc on the stack. A patch may
duke@435 950 // have values live in registers so the entry point with the
duke@435 951 // exception in tls.
duke@435 952 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
duke@435 953
duke@435 954 __ bind(L);
duke@435 955 }
duke@435 956
duke@435 957
duke@435 958 // Runtime will return true if the nmethod has been deoptimized during
duke@435 959 // the patching process. In that case we must do a deopt reexecute instead.
duke@435 960
duke@435 961 Label reexecuteEntry, cont;
duke@435 962
never@739 963 __ testptr(rax, rax); // have we deoptimized?
duke@435 964 __ jcc(Assembler::equal, cont); // no
duke@435 965
duke@435 966 // Will reexecute. Proper return address is already on the stack we just restore
duke@435 967 // registers, pop all of our frame but the return address and jump to the deopt blob
duke@435 968 restore_live_registers(sasm);
duke@435 969 __ leave();
duke@435 970 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
duke@435 971
duke@435 972 __ bind(cont);
duke@435 973 restore_live_registers(sasm);
duke@435 974 __ leave();
duke@435 975 __ ret(0);
duke@435 976
duke@435 977 return oop_maps;
duke@435 978 }
duke@435 979
duke@435 980
duke@435 981 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
duke@435 982
duke@435 983 // for better readability
duke@435 984 const bool must_gc_arguments = true;
duke@435 985 const bool dont_gc_arguments = false;
duke@435 986
duke@435 987 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
duke@435 988 bool save_fpu_registers = true;
duke@435 989
duke@435 990 // stub code & info for the different stubs
duke@435 991 OopMapSet* oop_maps = NULL;
duke@435 992 switch (id) {
duke@435 993 case forward_exception_id:
duke@435 994 {
twisti@2603 995 oop_maps = generate_handle_exception(id, sasm);
twisti@2603 996 __ leave();
twisti@2603 997 __ ret(0);
duke@435 998 }
duke@435 999 break;
duke@435 1000
duke@435 1001 case new_instance_id:
duke@435 1002 case fast_new_instance_id:
duke@435 1003 case fast_new_instance_init_check_id:
duke@435 1004 {
duke@435 1005 Register klass = rdx; // Incoming
duke@435 1006 Register obj = rax; // Result
duke@435 1007
duke@435 1008 if (id == new_instance_id) {
duke@435 1009 __ set_info("new_instance", dont_gc_arguments);
duke@435 1010 } else if (id == fast_new_instance_id) {
duke@435 1011 __ set_info("fast new_instance", dont_gc_arguments);
duke@435 1012 } else {
duke@435 1013 assert(id == fast_new_instance_init_check_id, "bad StubID");
duke@435 1014 __ set_info("fast new_instance init check", dont_gc_arguments);
duke@435 1015 }
duke@435 1016
duke@435 1017 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
duke@435 1018 UseTLAB && FastTLABRefill) {
duke@435 1019 Label slow_path;
duke@435 1020 Register obj_size = rcx;
duke@435 1021 Register t1 = rbx;
duke@435 1022 Register t2 = rsi;
duke@435 1023 assert_different_registers(klass, obj, obj_size, t1, t2);
duke@435 1024
never@739 1025 __ push(rdi);
never@739 1026 __ push(rbx);
duke@435 1027
duke@435 1028 if (id == fast_new_instance_init_check_id) {
duke@435 1029 // make sure the klass is initialized
kvn@3400 1030 __ cmpb(Address(klass, instanceKlass::init_state_offset()), instanceKlass::fully_initialized);
duke@435 1031 __ jcc(Assembler::notEqual, slow_path);
duke@435 1032 }
duke@435 1033
duke@435 1034 #ifdef ASSERT
duke@435 1035 // assert object can be fast path allocated
duke@435 1036 {
duke@435 1037 Label ok, not_ok;
stefank@3391 1038 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
duke@435 1039 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0)
duke@435 1040 __ jcc(Assembler::lessEqual, not_ok);
duke@435 1041 __ testl(obj_size, Klass::_lh_instance_slow_path_bit);
duke@435 1042 __ jcc(Assembler::zero, ok);
duke@435 1043 __ bind(not_ok);
duke@435 1044 __ stop("assert(can be fast path allocated)");
duke@435 1045 __ should_not_reach_here();
duke@435 1046 __ bind(ok);
duke@435 1047 }
duke@435 1048 #endif // ASSERT
duke@435 1049
duke@435 1050 // if we got here then the TLAB allocation failed, so try
duke@435 1051 // refilling the TLAB or allocating directly from eden.
duke@435 1052 Label retry_tlab, try_eden;
phh@2423 1053 const Register thread =
phh@2423 1054 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi
duke@435 1055
duke@435 1056 __ bind(retry_tlab);
duke@435 1057
never@739 1058 // get the instance size (size is postive so movl is fine for 64bit)
stefank@3391 1059 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
phh@2423 1060
duke@435 1061 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
phh@2423 1062
duke@435 1063 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
duke@435 1064 __ verify_oop(obj);
never@739 1065 __ pop(rbx);
never@739 1066 __ pop(rdi);
duke@435 1067 __ ret(0);
duke@435 1068
duke@435 1069 __ bind(try_eden);
never@739 1070 // get the instance size (size is postive so movl is fine for 64bit)
stefank@3391 1071 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
phh@2423 1072
duke@435 1073 __ eden_allocate(obj, obj_size, 0, t1, slow_path);
phh@2423 1074 __ incr_allocated_bytes(thread, obj_size, 0);
phh@2423 1075
duke@435 1076 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
duke@435 1077 __ verify_oop(obj);
never@739 1078 __ pop(rbx);
never@739 1079 __ pop(rdi);
duke@435 1080 __ ret(0);
duke@435 1081
duke@435 1082 __ bind(slow_path);
never@739 1083 __ pop(rbx);
never@739 1084 __ pop(rdi);
duke@435 1085 }
duke@435 1086
duke@435 1087 __ enter();
duke@435 1088 OopMap* map = save_live_registers(sasm, 2);
duke@435 1089 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
duke@435 1090 oop_maps = new OopMapSet();
duke@435 1091 oop_maps->add_gc_map(call_offset, map);
duke@435 1092 restore_live_registers_except_rax(sasm);
duke@435 1093 __ verify_oop(obj);
duke@435 1094 __ leave();
duke@435 1095 __ ret(0);
duke@435 1096
duke@435 1097 // rax,: new instance
duke@435 1098 }
duke@435 1099
duke@435 1100 break;
duke@435 1101
duke@435 1102 case counter_overflow_id:
duke@435 1103 {
iveresov@2138 1104 Register bci = rax, method = rbx;
duke@435 1105 __ enter();
iveresov@2138 1106 OopMap* map = save_live_registers(sasm, 3);
duke@435 1107 // Retrieve bci
duke@435 1108 __ movl(bci, Address(rbp, 2*BytesPerWord));
iveresov@2138 1109 // And a pointer to the methodOop
iveresov@2138 1110 __ movptr(method, Address(rbp, 3*BytesPerWord));
iveresov@2138 1111 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
duke@435 1112 oop_maps = new OopMapSet();
duke@435 1113 oop_maps->add_gc_map(call_offset, map);
duke@435 1114 restore_live_registers(sasm);
duke@435 1115 __ leave();
duke@435 1116 __ ret(0);
duke@435 1117 }
duke@435 1118 break;
duke@435 1119
duke@435 1120 case new_type_array_id:
duke@435 1121 case new_object_array_id:
duke@435 1122 {
duke@435 1123 Register length = rbx; // Incoming
duke@435 1124 Register klass = rdx; // Incoming
duke@435 1125 Register obj = rax; // Result
duke@435 1126
duke@435 1127 if (id == new_type_array_id) {
duke@435 1128 __ set_info("new_type_array", dont_gc_arguments);
duke@435 1129 } else {
duke@435 1130 __ set_info("new_object_array", dont_gc_arguments);
duke@435 1131 }
duke@435 1132
duke@435 1133 #ifdef ASSERT
duke@435 1134 // assert object type is really an array of the proper kind
duke@435 1135 {
duke@435 1136 Label ok;
duke@435 1137 Register t0 = obj;
stefank@3391 1138 __ movl(t0, Address(klass, Klass::layout_helper_offset()));
duke@435 1139 __ sarl(t0, Klass::_lh_array_tag_shift);
duke@435 1140 int tag = ((id == new_type_array_id)
duke@435 1141 ? Klass::_lh_array_tag_type_value
duke@435 1142 : Klass::_lh_array_tag_obj_value);
duke@435 1143 __ cmpl(t0, tag);
duke@435 1144 __ jcc(Assembler::equal, ok);
duke@435 1145 __ stop("assert(is an array klass)");
duke@435 1146 __ should_not_reach_here();
duke@435 1147 __ bind(ok);
duke@435 1148 }
duke@435 1149 #endif // ASSERT
duke@435 1150
duke@435 1151 if (UseTLAB && FastTLABRefill) {
duke@435 1152 Register arr_size = rsi;
duke@435 1153 Register t1 = rcx; // must be rcx for use as shift count
duke@435 1154 Register t2 = rdi;
duke@435 1155 Label slow_path;
duke@435 1156 assert_different_registers(length, klass, obj, arr_size, t1, t2);
duke@435 1157
duke@435 1158 // check that array length is small enough for fast path.
duke@435 1159 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length);
duke@435 1160 __ jcc(Assembler::above, slow_path);
duke@435 1161
duke@435 1162 // if we got here then the TLAB allocation failed, so try
duke@435 1163 // refilling the TLAB or allocating directly from eden.
duke@435 1164 Label retry_tlab, try_eden;
phh@2423 1165 const Register thread =
phh@2423 1166 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi
duke@435 1167
duke@435 1168 __ bind(retry_tlab);
duke@435 1169
duke@435 1170 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
phh@2423 1171 // since size is positive movl does right thing on 64bit
stefank@3391 1172 __ movl(t1, Address(klass, Klass::layout_helper_offset()));
never@739 1173 // since size is postive movl does right thing on 64bit
duke@435 1174 __ movl(arr_size, length);
duke@435 1175 assert(t1 == rcx, "fixed register usage");
never@739 1176 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
never@739 1177 __ shrptr(t1, Klass::_lh_header_size_shift);
never@739 1178 __ andptr(t1, Klass::_lh_header_size_mask);
never@739 1179 __ addptr(arr_size, t1);
never@739 1180 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
never@739 1181 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435 1182
duke@435 1183 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
duke@435 1184
duke@435 1185 __ initialize_header(obj, klass, length, t1, t2);
stefank@3391 1186 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
duke@435 1187 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@435 1188 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
never@739 1189 __ andptr(t1, Klass::_lh_header_size_mask);
never@739 1190 __ subptr(arr_size, t1); // body length
never@739 1191 __ addptr(t1, obj); // body start
duke@435 1192 __ initialize_body(t1, arr_size, 0, t2);
duke@435 1193 __ verify_oop(obj);
duke@435 1194 __ ret(0);
duke@435 1195
duke@435 1196 __ bind(try_eden);
duke@435 1197 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
phh@2423 1198 // since size is positive movl does right thing on 64bit
stefank@3391 1199 __ movl(t1, Address(klass, Klass::layout_helper_offset()));
never@739 1200 // since size is postive movl does right thing on 64bit
duke@435 1201 __ movl(arr_size, length);
duke@435 1202 assert(t1 == rcx, "fixed register usage");
never@739 1203 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
never@739 1204 __ shrptr(t1, Klass::_lh_header_size_shift);
never@739 1205 __ andptr(t1, Klass::_lh_header_size_mask);
never@739 1206 __ addptr(arr_size, t1);
never@739 1207 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
never@739 1208 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435 1209
duke@435 1210 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
phh@2423 1211 __ incr_allocated_bytes(thread, arr_size, 0);
duke@435 1212
duke@435 1213 __ initialize_header(obj, klass, length, t1, t2);
stefank@3391 1214 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
duke@435 1215 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@435 1216 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
never@739 1217 __ andptr(t1, Klass::_lh_header_size_mask);
never@739 1218 __ subptr(arr_size, t1); // body length
never@739 1219 __ addptr(t1, obj); // body start
duke@435 1220 __ initialize_body(t1, arr_size, 0, t2);
duke@435 1221 __ verify_oop(obj);
duke@435 1222 __ ret(0);
duke@435 1223
duke@435 1224 __ bind(slow_path);
duke@435 1225 }
duke@435 1226
duke@435 1227 __ enter();
duke@435 1228 OopMap* map = save_live_registers(sasm, 3);
duke@435 1229 int call_offset;
duke@435 1230 if (id == new_type_array_id) {
duke@435 1231 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
duke@435 1232 } else {
duke@435 1233 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
duke@435 1234 }
duke@435 1235
duke@435 1236 oop_maps = new OopMapSet();
duke@435 1237 oop_maps->add_gc_map(call_offset, map);
duke@435 1238 restore_live_registers_except_rax(sasm);
duke@435 1239
duke@435 1240 __ verify_oop(obj);
duke@435 1241 __ leave();
duke@435 1242 __ ret(0);
duke@435 1243
duke@435 1244 // rax,: new array
duke@435 1245 }
duke@435 1246 break;
duke@435 1247
duke@435 1248 case new_multi_array_id:
duke@435 1249 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
duke@435 1250 // rax,: klass
duke@435 1251 // rbx,: rank
duke@435 1252 // rcx: address of 1st dimension
duke@435 1253 OopMap* map = save_live_registers(sasm, 4);
duke@435 1254 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
duke@435 1255
duke@435 1256 oop_maps = new OopMapSet();
duke@435 1257 oop_maps->add_gc_map(call_offset, map);
duke@435 1258 restore_live_registers_except_rax(sasm);
duke@435 1259
duke@435 1260 // rax,: new multi array
duke@435 1261 __ verify_oop(rax);
duke@435 1262 }
duke@435 1263 break;
duke@435 1264
duke@435 1265 case register_finalizer_id:
duke@435 1266 {
duke@435 1267 __ set_info("register_finalizer", dont_gc_arguments);
duke@435 1268
never@739 1269 // This is called via call_runtime so the arguments
never@739 1270 // will be place in C abi locations
never@739 1271
never@739 1272 #ifdef _LP64
never@739 1273 __ verify_oop(c_rarg0);
never@739 1274 __ mov(rax, c_rarg0);
never@739 1275 #else
duke@435 1276 // The object is passed on the stack and we haven't pushed a
duke@435 1277 // frame yet so it's one work away from top of stack.
never@739 1278 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
duke@435 1279 __ verify_oop(rax);
never@739 1280 #endif // _LP64
duke@435 1281
duke@435 1282 // load the klass and check the has finalizer flag
duke@435 1283 Label register_finalizer;
duke@435 1284 Register t = rsi;
iveresov@2344 1285 __ load_klass(t, rax);
stefank@3391 1286 __ movl(t, Address(t, Klass::access_flags_offset()));
duke@435 1287 __ testl(t, JVM_ACC_HAS_FINALIZER);
duke@435 1288 __ jcc(Assembler::notZero, register_finalizer);
duke@435 1289 __ ret(0);
duke@435 1290
duke@435 1291 __ bind(register_finalizer);
duke@435 1292 __ enter();
duke@435 1293 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
duke@435 1294 int call_offset = __ call_RT(noreg, noreg,
duke@435 1295 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
duke@435 1296 oop_maps = new OopMapSet();
duke@435 1297 oop_maps->add_gc_map(call_offset, oop_map);
duke@435 1298
duke@435 1299 // Now restore all the live registers
duke@435 1300 restore_live_registers(sasm);
duke@435 1301
duke@435 1302 __ leave();
duke@435 1303 __ ret(0);
duke@435 1304 }
duke@435 1305 break;
duke@435 1306
duke@435 1307 case throw_range_check_failed_id:
duke@435 1308 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
duke@435 1309 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
duke@435 1310 }
duke@435 1311 break;
duke@435 1312
duke@435 1313 case throw_index_exception_id:
duke@435 1314 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
duke@435 1315 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
duke@435 1316 }
duke@435 1317 break;
duke@435 1318
duke@435 1319 case throw_div0_exception_id:
duke@435 1320 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
duke@435 1321 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
duke@435 1322 }
duke@435 1323 break;
duke@435 1324
duke@435 1325 case throw_null_pointer_exception_id:
duke@435 1326 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
duke@435 1327 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
duke@435 1328 }
duke@435 1329 break;
duke@435 1330
duke@435 1331 case handle_exception_nofpu_id:
duke@435 1332 case handle_exception_id:
duke@435 1333 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
twisti@2603 1334 oop_maps = generate_handle_exception(id, sasm);
twisti@2603 1335 }
twisti@2603 1336 break;
twisti@2603 1337
twisti@2603 1338 case handle_exception_from_callee_id:
twisti@2603 1339 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
twisti@2603 1340 oop_maps = generate_handle_exception(id, sasm);
duke@435 1341 }
duke@435 1342 break;
duke@435 1343
duke@435 1344 case unwind_exception_id:
duke@435 1345 { __ set_info("unwind_exception", dont_gc_arguments);
duke@435 1346 // note: no stubframe since we are about to leave the current
duke@435 1347 // activation and we are calling a leaf VM function only.
duke@435 1348 generate_unwind_exception(sasm);
duke@435 1349 }
duke@435 1350 break;
duke@435 1351
duke@435 1352 case throw_array_store_exception_id:
duke@435 1353 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
duke@435 1354 // tos + 0: link
duke@435 1355 // + 1: return address
never@2488 1356 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
duke@435 1357 }
duke@435 1358 break;
duke@435 1359
duke@435 1360 case throw_class_cast_exception_id:
duke@435 1361 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
duke@435 1362 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
duke@435 1363 }
duke@435 1364 break;
duke@435 1365
duke@435 1366 case throw_incompatible_class_change_error_id:
duke@435 1367 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
duke@435 1368 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
duke@435 1369 }
duke@435 1370 break;
duke@435 1371
duke@435 1372 case slow_subtype_check_id:
duke@435 1373 {
jrose@1079 1374 // Typical calling sequence:
jrose@1079 1375 // __ push(klass_RInfo); // object klass or other subclass
jrose@1079 1376 // __ push(sup_k_RInfo); // array element klass or other superclass
jrose@1079 1377 // __ call(slow_subtype_check);
jrose@1079 1378 // Note that the subclass is pushed first, and is therefore deepest.
jrose@1079 1379 // Previous versions of this code reversed the names 'sub' and 'super'.
jrose@1079 1380 // This was operationally harmless but made the code unreadable.
duke@435 1381 enum layout {
never@739 1382 rax_off, SLOT2(raxH_off)
never@739 1383 rcx_off, SLOT2(rcxH_off)
never@739 1384 rsi_off, SLOT2(rsiH_off)
never@739 1385 rdi_off, SLOT2(rdiH_off)
never@739 1386 // saved_rbp_off, SLOT2(saved_rbpH_off)
never@739 1387 return_off, SLOT2(returnH_off)
jrose@1079 1388 sup_k_off, SLOT2(sup_kH_off)
jrose@1079 1389 klass_off, SLOT2(superH_off)
jrose@1079 1390 framesize,
jrose@1079 1391 result_off = klass_off // deepest argument is also the return value
duke@435 1392 };
duke@435 1393
duke@435 1394 __ set_info("slow_subtype_check", dont_gc_arguments);
never@739 1395 __ push(rdi);
never@739 1396 __ push(rsi);
never@739 1397 __ push(rcx);
never@739 1398 __ push(rax);
duke@435 1399
never@739 1400 // This is called by pushing args and not with C abi
jrose@1079 1401 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
jrose@1079 1402 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
duke@435 1403
duke@435 1404 Label miss;
jrose@1079 1405 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
jrose@1079 1406
jrose@1079 1407 // fallthrough on success:
jrose@1079 1408 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
never@739 1409 __ pop(rax);
never@739 1410 __ pop(rcx);
never@739 1411 __ pop(rsi);
never@739 1412 __ pop(rdi);
duke@435 1413 __ ret(0);
duke@435 1414
duke@435 1415 __ bind(miss);
jrose@1079 1416 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
never@739 1417 __ pop(rax);
never@739 1418 __ pop(rcx);
never@739 1419 __ pop(rsi);
never@739 1420 __ pop(rdi);
duke@435 1421 __ ret(0);
duke@435 1422 }
duke@435 1423 break;
duke@435 1424
duke@435 1425 case monitorenter_nofpu_id:
duke@435 1426 save_fpu_registers = false;
duke@435 1427 // fall through
duke@435 1428 case monitorenter_id:
duke@435 1429 {
duke@435 1430 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
duke@435 1431 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
duke@435 1432
never@739 1433 // Called with store_parameter and not C abi
never@739 1434
duke@435 1435 f.load_argument(1, rax); // rax,: object
duke@435 1436 f.load_argument(0, rbx); // rbx,: lock address
duke@435 1437
duke@435 1438 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
duke@435 1439
duke@435 1440 oop_maps = new OopMapSet();
duke@435 1441 oop_maps->add_gc_map(call_offset, map);
duke@435 1442 restore_live_registers(sasm, save_fpu_registers);
duke@435 1443 }
duke@435 1444 break;
duke@435 1445
duke@435 1446 case monitorexit_nofpu_id:
duke@435 1447 save_fpu_registers = false;
duke@435 1448 // fall through
duke@435 1449 case monitorexit_id:
duke@435 1450 {
duke@435 1451 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
duke@435 1452 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
duke@435 1453
never@739 1454 // Called with store_parameter and not C abi
never@739 1455
duke@435 1456 f.load_argument(0, rax); // rax,: lock address
duke@435 1457
duke@435 1458 // note: really a leaf routine but must setup last java sp
duke@435 1459 // => use call_RT for now (speed can be improved by
duke@435 1460 // doing last java sp setup manually)
duke@435 1461 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
duke@435 1462
duke@435 1463 oop_maps = new OopMapSet();
duke@435 1464 oop_maps->add_gc_map(call_offset, map);
duke@435 1465 restore_live_registers(sasm, save_fpu_registers);
twisti@3244 1466 }
twisti@3244 1467 break;
duke@435 1468
twisti@3244 1469 case deoptimize_id:
twisti@3244 1470 {
twisti@3244 1471 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
twisti@3244 1472 const int num_rt_args = 1; // thread
twisti@3244 1473 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
twisti@3244 1474 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
twisti@3244 1475 oop_maps = new OopMapSet();
twisti@3244 1476 oop_maps->add_gc_map(call_offset, oop_map);
twisti@3244 1477 restore_live_registers(sasm);
twisti@3244 1478 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
twisti@3244 1479 assert(deopt_blob != NULL, "deoptimization blob must have been created");
twisti@3244 1480 __ leave();
twisti@3244 1481 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
duke@435 1482 }
duke@435 1483 break;
duke@435 1484
duke@435 1485 case access_field_patching_id:
duke@435 1486 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
duke@435 1487 // we should set up register map
duke@435 1488 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
duke@435 1489 }
duke@435 1490 break;
duke@435 1491
duke@435 1492 case load_klass_patching_id:
duke@435 1493 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
duke@435 1494 // we should set up register map
duke@435 1495 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
duke@435 1496 }
duke@435 1497 break;
duke@435 1498
duke@435 1499 case dtrace_object_alloc_id:
duke@435 1500 { // rax,: object
duke@435 1501 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
duke@435 1502 // we can't gc here so skip the oopmap but make sure that all
duke@435 1503 // the live registers get saved.
duke@435 1504 save_live_registers(sasm, 1);
duke@435 1505
never@739 1506 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
duke@435 1507 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
never@739 1508 NOT_LP64(__ pop(rax));
duke@435 1509
duke@435 1510 restore_live_registers(sasm);
duke@435 1511 }
duke@435 1512 break;
duke@435 1513
duke@435 1514 case fpu2long_stub_id:
duke@435 1515 {
duke@435 1516 // rax, and rdx are destroyed, but should be free since the result is returned there
duke@435 1517 // preserve rsi,ecx
never@739 1518 __ push(rsi);
never@739 1519 __ push(rcx);
never@739 1520 LP64_ONLY(__ push(rdx);)
duke@435 1521
duke@435 1522 // check for NaN
duke@435 1523 Label return0, do_return, return_min_jlong, do_convert;
duke@435 1524
never@739 1525 Address value_high_word(rsp, wordSize + 4);
never@739 1526 Address value_low_word(rsp, wordSize);
never@739 1527 Address result_high_word(rsp, 3*wordSize + 4);
never@739 1528 Address result_low_word(rsp, 3*wordSize);
duke@435 1529
never@739 1530 __ subptr(rsp, 32); // more than enough on 32bit
duke@435 1531 __ fst_d(value_low_word);
duke@435 1532 __ movl(rax, value_high_word);
duke@435 1533 __ andl(rax, 0x7ff00000);
duke@435 1534 __ cmpl(rax, 0x7ff00000);
duke@435 1535 __ jcc(Assembler::notEqual, do_convert);
duke@435 1536 __ movl(rax, value_high_word);
duke@435 1537 __ andl(rax, 0xfffff);
duke@435 1538 __ orl(rax, value_low_word);
duke@435 1539 __ jcc(Assembler::notZero, return0);
duke@435 1540
duke@435 1541 __ bind(do_convert);
duke@435 1542 __ fnstcw(Address(rsp, 0));
never@739 1543 __ movzwl(rax, Address(rsp, 0));
duke@435 1544 __ orl(rax, 0xc00);
duke@435 1545 __ movw(Address(rsp, 2), rax);
duke@435 1546 __ fldcw(Address(rsp, 2));
duke@435 1547 __ fwait();
duke@435 1548 __ fistp_d(result_low_word);
duke@435 1549 __ fldcw(Address(rsp, 0));
duke@435 1550 __ fwait();
never@739 1551 // This gets the entire long in rax on 64bit
never@739 1552 __ movptr(rax, result_low_word);
never@739 1553 // testing of high bits
duke@435 1554 __ movl(rdx, result_high_word);
never@739 1555 __ mov(rcx, rax);
duke@435 1556 // What the heck is the point of the next instruction???
duke@435 1557 __ xorl(rcx, 0x0);
duke@435 1558 __ movl(rsi, 0x80000000);
duke@435 1559 __ xorl(rsi, rdx);
duke@435 1560 __ orl(rcx, rsi);
duke@435 1561 __ jcc(Assembler::notEqual, do_return);
duke@435 1562 __ fldz();
duke@435 1563 __ fcomp_d(value_low_word);
duke@435 1564 __ fnstsw_ax();
never@739 1565 #ifdef _LP64
never@739 1566 __ testl(rax, 0x4100); // ZF & CF == 0
never@739 1567 __ jcc(Assembler::equal, return_min_jlong);
never@739 1568 #else
duke@435 1569 __ sahf();
duke@435 1570 __ jcc(Assembler::above, return_min_jlong);
never@739 1571 #endif // _LP64
duke@435 1572 // return max_jlong
never@739 1573 #ifndef _LP64
duke@435 1574 __ movl(rdx, 0x7fffffff);
duke@435 1575 __ movl(rax, 0xffffffff);
never@739 1576 #else
never@739 1577 __ mov64(rax, CONST64(0x7fffffffffffffff));
never@739 1578 #endif // _LP64
duke@435 1579 __ jmp(do_return);
duke@435 1580
duke@435 1581 __ bind(return_min_jlong);
never@739 1582 #ifndef _LP64
duke@435 1583 __ movl(rdx, 0x80000000);
duke@435 1584 __ xorl(rax, rax);
never@739 1585 #else
never@739 1586 __ mov64(rax, CONST64(0x8000000000000000));
never@739 1587 #endif // _LP64
duke@435 1588 __ jmp(do_return);
duke@435 1589
duke@435 1590 __ bind(return0);
duke@435 1591 __ fpop();
never@739 1592 #ifndef _LP64
never@739 1593 __ xorptr(rdx,rdx);
never@739 1594 __ xorptr(rax,rax);
never@739 1595 #else
never@739 1596 __ xorptr(rax, rax);
never@739 1597 #endif // _LP64
duke@435 1598
duke@435 1599 __ bind(do_return);
never@739 1600 __ addptr(rsp, 32);
never@739 1601 LP64_ONLY(__ pop(rdx);)
never@739 1602 __ pop(rcx);
never@739 1603 __ pop(rsi);
duke@435 1604 __ ret(0);
duke@435 1605 }
duke@435 1606 break;
duke@435 1607
ysr@777 1608 #ifndef SERIALGC
ysr@777 1609 case g1_pre_barrier_slow_id:
ysr@777 1610 {
ysr@777 1611 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments);
ysr@777 1612 // arg0 : previous value of memory
ysr@777 1613
ysr@777 1614 BarrierSet* bs = Universe::heap()->barrier_set();
ysr@777 1615 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
apetrusenko@797 1616 __ movptr(rax, (int)id);
ysr@777 1617 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
ysr@777 1618 __ should_not_reach_here();
ysr@777 1619 break;
ysr@777 1620 }
apetrusenko@797 1621 __ push(rax);
apetrusenko@797 1622 __ push(rdx);
ysr@777 1623
ysr@777 1624 const Register pre_val = rax;
apetrusenko@797 1625 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
ysr@777 1626 const Register tmp = rdx;
ysr@777 1627
apetrusenko@797 1628 NOT_LP64(__ get_thread(thread);)
ysr@777 1629
ysr@777 1630 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777 1631 PtrQueue::byte_offset_of_active()));
ysr@777 1632
ysr@777 1633 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777 1634 PtrQueue::byte_offset_of_index()));
ysr@777 1635 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777 1636 PtrQueue::byte_offset_of_buf()));
ysr@777 1637
ysr@777 1638
ysr@777 1639 Label done;
ysr@777 1640 Label runtime;
ysr@777 1641
ysr@777 1642 // Can we store original value in the thread's buffer?
ysr@777 1643
apetrusenko@797 1644 #ifdef _LP64
iveresov@1927 1645 __ movslq(tmp, queue_index);
apetrusenko@797 1646 __ cmpq(tmp, 0);
apetrusenko@797 1647 #else
ysr@777 1648 __ cmpl(queue_index, 0);
apetrusenko@797 1649 #endif
ysr@777 1650 __ jcc(Assembler::equal, runtime);
apetrusenko@797 1651 #ifdef _LP64
apetrusenko@797 1652 __ subq(tmp, wordSize);
apetrusenko@797 1653 __ movl(queue_index, tmp);
apetrusenko@797 1654 __ addq(tmp, buffer);
apetrusenko@797 1655 #else
ysr@777 1656 __ subl(queue_index, wordSize);
ysr@777 1657 __ movl(tmp, buffer);
ysr@777 1658 __ addl(tmp, queue_index);
apetrusenko@797 1659 #endif
apetrusenko@797 1660
ysr@777 1661 // prev_val (rax)
ysr@777 1662 f.load_argument(0, pre_val);
apetrusenko@797 1663 __ movptr(Address(tmp, 0), pre_val);
ysr@777 1664 __ jmp(done);
ysr@777 1665
ysr@777 1666 __ bind(runtime);
iveresov@1927 1667 __ push(rcx);
iveresov@1927 1668 #ifdef _LP64
iveresov@1927 1669 __ push(r8);
iveresov@1927 1670 __ push(r9);
iveresov@1927 1671 __ push(r10);
iveresov@1927 1672 __ push(r11);
iveresov@1927 1673 # ifndef _WIN64
iveresov@1927 1674 __ push(rdi);
iveresov@1927 1675 __ push(rsi);
iveresov@1927 1676 # endif
iveresov@1927 1677 #endif
ysr@777 1678 // load the pre-value
ysr@777 1679 f.load_argument(0, rcx);
ysr@777 1680 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread);
iveresov@1927 1681 #ifdef _LP64
iveresov@1927 1682 # ifndef _WIN64
iveresov@1927 1683 __ pop(rsi);
iveresov@1927 1684 __ pop(rdi);
iveresov@1927 1685 # endif
iveresov@1927 1686 __ pop(r11);
iveresov@1927 1687 __ pop(r10);
iveresov@1927 1688 __ pop(r9);
iveresov@1927 1689 __ pop(r8);
iveresov@1927 1690 #endif
apetrusenko@797 1691 __ pop(rcx);
iveresov@1927 1692 __ bind(done);
ysr@777 1693
apetrusenko@797 1694 __ pop(rdx);
apetrusenko@797 1695 __ pop(rax);
ysr@777 1696 }
ysr@777 1697 break;
ysr@777 1698
ysr@777 1699 case g1_post_barrier_slow_id:
ysr@777 1700 {
ysr@777 1701 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments);
ysr@777 1702
ysr@777 1703
ysr@777 1704 // arg0: store_address
ysr@777 1705 Address store_addr(rbp, 2*BytesPerWord);
ysr@777 1706
ysr@777 1707 BarrierSet* bs = Universe::heap()->barrier_set();
ysr@777 1708 CardTableModRefBS* ct = (CardTableModRefBS*)bs;
ysr@777 1709 Label done;
ysr@777 1710 Label runtime;
ysr@777 1711
ysr@777 1712 // At this point we know new_value is non-NULL and the new_value crosses regsion.
ysr@777 1713 // Must check to see if card is already dirty
ysr@777 1714
apetrusenko@797 1715 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
ysr@777 1716
ysr@777 1717 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@777 1718 PtrQueue::byte_offset_of_index()));
ysr@777 1719 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@777 1720 PtrQueue::byte_offset_of_buf()));
ysr@777 1721
apetrusenko@797 1722 __ push(rax);
iveresov@1927 1723 __ push(rcx);
ysr@777 1724
apetrusenko@797 1725 NOT_LP64(__ get_thread(thread);)
apetrusenko@797 1726 ExternalAddress cardtable((address)ct->byte_map_base);
ysr@777 1727 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
ysr@777 1728
iveresov@1927 1729 const Register card_addr = rcx;
apetrusenko@797 1730 #ifdef _LP64
apetrusenko@797 1731 const Register tmp = rscratch1;
apetrusenko@797 1732 f.load_argument(0, card_addr);
apetrusenko@797 1733 __ shrq(card_addr, CardTableModRefBS::card_shift);
apetrusenko@797 1734 __ lea(tmp, cardtable);
apetrusenko@797 1735 // get the address of the card
apetrusenko@797 1736 __ addq(card_addr, tmp);
apetrusenko@797 1737 #else
iveresov@1927 1738 const Register card_index = rcx;
apetrusenko@797 1739 f.load_argument(0, card_index);
apetrusenko@797 1740 __ shrl(card_index, CardTableModRefBS::card_shift);
apetrusenko@797 1741
ysr@777 1742 Address index(noreg, card_index, Address::times_1);
ysr@777 1743 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index)));
apetrusenko@797 1744 #endif
apetrusenko@797 1745
ysr@777 1746 __ cmpb(Address(card_addr, 0), 0);
ysr@777 1747 __ jcc(Assembler::equal, done);
ysr@777 1748
ysr@777 1749 // storing region crossing non-NULL, card is clean.
ysr@777 1750 // dirty card and log.
ysr@777 1751
ysr@777 1752 __ movb(Address(card_addr, 0), 0);
ysr@777 1753
ysr@777 1754 __ cmpl(queue_index, 0);
ysr@777 1755 __ jcc(Assembler::equal, runtime);
ysr@777 1756 __ subl(queue_index, wordSize);
ysr@777 1757
ysr@777 1758 const Register buffer_addr = rbx;
apetrusenko@797 1759 __ push(rbx);
ysr@777 1760
apetrusenko@797 1761 __ movptr(buffer_addr, buffer);
apetrusenko@797 1762
apetrusenko@797 1763 #ifdef _LP64
apetrusenko@797 1764 __ movslq(rscratch1, queue_index);
apetrusenko@797 1765 __ addptr(buffer_addr, rscratch1);
apetrusenko@797 1766 #else
apetrusenko@797 1767 __ addptr(buffer_addr, queue_index);
apetrusenko@797 1768 #endif
apetrusenko@797 1769 __ movptr(Address(buffer_addr, 0), card_addr);
apetrusenko@797 1770
apetrusenko@797 1771 __ pop(rbx);
ysr@777 1772 __ jmp(done);
ysr@777 1773
ysr@777 1774 __ bind(runtime);
iveresov@1927 1775 __ push(rdx);
iveresov@1927 1776 #ifdef _LP64
iveresov@1927 1777 __ push(r8);
iveresov@1927 1778 __ push(r9);
iveresov@1927 1779 __ push(r10);
iveresov@1927 1780 __ push(r11);
iveresov@1927 1781 # ifndef _WIN64
iveresov@1927 1782 __ push(rdi);
iveresov@1927 1783 __ push(rsi);
iveresov@1927 1784 # endif
iveresov@1927 1785 #endif
ysr@777 1786 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
iveresov@1927 1787 #ifdef _LP64
iveresov@1927 1788 # ifndef _WIN64
iveresov@1927 1789 __ pop(rsi);
iveresov@1927 1790 __ pop(rdi);
iveresov@1927 1791 # endif
iveresov@1927 1792 __ pop(r11);
iveresov@1927 1793 __ pop(r10);
iveresov@1927 1794 __ pop(r9);
iveresov@1927 1795 __ pop(r8);
iveresov@1927 1796 #endif
iveresov@1927 1797 __ pop(rdx);
iveresov@1927 1798 __ bind(done);
ysr@777 1799
iveresov@1927 1800 __ pop(rcx);
apetrusenko@797 1801 __ pop(rax);
ysr@777 1802
ysr@777 1803 }
ysr@777 1804 break;
ysr@777 1805 #endif // !SERIALGC
ysr@777 1806
duke@435 1807 default:
duke@435 1808 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
never@739 1809 __ movptr(rax, (int)id);
duke@435 1810 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
duke@435 1811 __ should_not_reach_here();
duke@435 1812 }
duke@435 1813 break;
duke@435 1814 }
duke@435 1815 return oop_maps;
duke@435 1816 }
duke@435 1817
duke@435 1818 #undef __
bobv@2036 1819
bobv@2036 1820 const char *Runtime1::pd_name_for_address(address entry) {
bobv@2036 1821 return "<unknown function>";
bobv@2036 1822 }

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