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src/cpu/x86/vm/c1_Runtime1_x86.cpp@f95d63e2154a (annotated)

src/cpu/x86/vm/c1_Runtime1_x86.cpp

Tue, 23 Nov 2010 13:22:55 -0800

author

stefank

date

Tue, 23 Nov 2010 13:22:55 -0800

changeset 2314

f95d63e2154a

parent 2138

d5d065957597

child 2344

ac637b7220d1

permissions

-rw-r--r--

6989984: Use standard include model for Hospot
Summary: Replaced MakeDeps and the includeDB files with more standardized solutions.
Reviewed-by: coleenp, kvn, kamg

duke@435	1	/*
trims@1907	2	* Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
stefank@2314	25	#include "precompiled.hpp"
stefank@2314	26	#include "c1/c1_Defs.hpp"
stefank@2314	27	#include "c1/c1_MacroAssembler.hpp"
stefank@2314	28	#include "c1/c1_Runtime1.hpp"
stefank@2314	29	#include "interpreter/interpreter.hpp"
stefank@2314	30	#include "nativeInst_x86.hpp"
stefank@2314	31	#include "oops/compiledICHolderOop.hpp"
stefank@2314	32	#include "oops/oop.inline.hpp"
stefank@2314	33	#include "prims/jvmtiExport.hpp"
stefank@2314	34	#include "register_x86.hpp"
stefank@2314	35	#include "runtime/sharedRuntime.hpp"
stefank@2314	36	#include "runtime/signature.hpp"
stefank@2314	37	#include "runtime/vframeArray.hpp"
stefank@2314	38	#include "vmreg_x86.inline.hpp"
duke@435	39
duke@435	40
duke@435	41	// Implementation of StubAssembler
duke@435	42
duke@435	43	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) {
duke@435	44	// setup registers
never@739	45	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
duke@435	46	assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different");
duke@435	47	assert(oop_result1 != thread && oop_result2 != thread, "registers must be different");
duke@435	48	assert(args_size >= 0, "illegal args_size");
duke@435	49
never@739	50	#ifdef _LP64
never@739	51	mov(c_rarg0, thread);
never@739	52	set_num_rt_args(0); // Nothing on stack
never@739	53	#else
duke@435	54	set_num_rt_args(1 + args_size);
duke@435	55
duke@435	56	// push java thread (becomes first argument of C function)
duke@435	57	get_thread(thread);
never@739	58	push(thread);
never@739	59	#endif // _LP64
duke@435	60
duke@435	61	set_last_Java_frame(thread, noreg, rbp, NULL);
never@739	62
duke@435	63	// do the call
duke@435	64	call(RuntimeAddress(entry));
duke@435	65	int call_offset = offset();
duke@435	66	// verify callee-saved register
duke@435	67	#ifdef ASSERT
duke@435	68	guarantee(thread != rax, "change this code");
never@739	69	push(rax);
duke@435	70	{ Label L;
duke@435	71	get_thread(rax);
never@739	72	cmpptr(thread, rax);
duke@435	73	jcc(Assembler::equal, L);
duke@435	74	int3();
duke@435	75	stop("StubAssembler::call_RT: rdi not callee saved?");
duke@435	76	bind(L);
duke@435	77	}
never@739	78	pop(rax);
duke@435	79	#endif
duke@435	80	reset_last_Java_frame(thread, true, false);
duke@435	81
duke@435	82	// discard thread and arguments
never@739	83	NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
duke@435	84
duke@435	85	// check for pending exceptions
duke@435	86	{ Label L;
never@739	87	cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
duke@435	88	jcc(Assembler::equal, L);
duke@435	89	// exception pending => remove activation and forward to exception handler
never@739	90	movptr(rax, Address(thread, Thread::pending_exception_offset()));
duke@435	91	// make sure that the vm_results are cleared
duke@435	92	if (oop_result1->is_valid()) {
xlu@947	93	movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435	94	}
duke@435	95	if (oop_result2->is_valid()) {
xlu@947	96	movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435	97	}
duke@435	98	if (frame_size() == no_frame_size) {
duke@435	99	leave();
duke@435	100	jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
duke@435	101	} else if (_stub_id == Runtime1::forward_exception_id) {
duke@435	102	should_not_reach_here();
duke@435	103	} else {
duke@435	104	jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
duke@435	105	}
duke@435	106	bind(L);
duke@435	107	}
duke@435	108	// get oop results if there are any and reset the values in the thread
duke@435	109	if (oop_result1->is_valid()) {
never@739	110	movptr(oop_result1, Address(thread, JavaThread::vm_result_offset()));
xlu@947	111	movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
duke@435	112	verify_oop(oop_result1);
duke@435	113	}
duke@435	114	if (oop_result2->is_valid()) {
never@739	115	movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset()));
xlu@947	116	movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435	117	verify_oop(oop_result2);
duke@435	118	}
duke@435	119	return call_offset;
duke@435	120	}
duke@435	121
duke@435	122
duke@435	123	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
never@739	124	#ifdef _LP64
never@739	125	mov(c_rarg1, arg1);
never@739	126	#else
never@739	127	push(arg1);
never@739	128	#endif // _LP64
duke@435	129	return call_RT(oop_result1, oop_result2, entry, 1);
duke@435	130	}
duke@435	131
duke@435	132
duke@435	133	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
never@739	134	#ifdef _LP64
never@739	135	if (c_rarg1 == arg2) {
never@739	136	if (c_rarg2 == arg1) {
never@739	137	xchgq(arg1, arg2);
never@739	138	} else {
never@739	139	mov(c_rarg2, arg2);
never@739	140	mov(c_rarg1, arg1);
never@739	141	}
never@739	142	} else {
never@739	143	mov(c_rarg1, arg1);
never@739	144	mov(c_rarg2, arg2);
never@739	145	}
never@739	146	#else
never@739	147	push(arg2);
never@739	148	push(arg1);
never@739	149	#endif // _LP64
duke@435	150	return call_RT(oop_result1, oop_result2, entry, 2);
duke@435	151	}
duke@435	152
duke@435	153
duke@435	154	int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
never@739	155	#ifdef _LP64
never@739	156	// if there is any conflict use the stack
never@739	157	if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
never@739	158	arg2 == c_rarg1 || arg1 == c_rarg3 ||
never@739	159	arg3 == c_rarg1 || arg1 == c_rarg2) {
never@739	160	push(arg3);
never@739	161	push(arg2);
never@739	162	push(arg1);
never@739	163	pop(c_rarg1);
never@739	164	pop(c_rarg2);
never@739	165	pop(c_rarg3);
never@739	166	} else {
never@739	167	mov(c_rarg1, arg1);
never@739	168	mov(c_rarg2, arg2);
never@739	169	mov(c_rarg3, arg3);
never@739	170	}
never@739	171	#else
never@739	172	push(arg3);
never@739	173	push(arg2);
never@739	174	push(arg1);
never@739	175	#endif // _LP64
duke@435	176	return call_RT(oop_result1, oop_result2, entry, 3);
duke@435	177	}
duke@435	178
duke@435	179
duke@435	180	// Implementation of StubFrame
duke@435	181
duke@435	182	class StubFrame: public StackObj {
duke@435	183	private:
duke@435	184	StubAssembler* _sasm;
duke@435	185
duke@435	186	public:
duke@435	187	StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
duke@435	188	void load_argument(int offset_in_words, Register reg);
duke@435	189
duke@435	190	~StubFrame();
duke@435	191	};
duke@435	192
duke@435	193
duke@435	194	#define __ _sasm->
duke@435	195
duke@435	196	StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
duke@435	197	_sasm = sasm;
duke@435	198	__ set_info(name, must_gc_arguments);
duke@435	199	__ enter();
duke@435	200	}
duke@435	201
duke@435	202	// load parameters that were stored with LIR_Assembler::store_parameter
duke@435	203	// Note: offsets for store_parameter and load_argument must match
duke@435	204	void StubFrame::load_argument(int offset_in_words, Register reg) {
duke@435	205	// rbp, + 0: link
duke@435	206	// + 1: return address
duke@435	207	// + 2: argument with offset 0
duke@435	208	// + 3: argument with offset 1
duke@435	209	// + 4: ...
duke@435	210
never@739	211	__ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
duke@435	212	}
duke@435	213
duke@435	214
duke@435	215	StubFrame::~StubFrame() {
duke@435	216	__ leave();
duke@435	217	__ ret(0);
duke@435	218	}
duke@435	219
duke@435	220	#undef __
duke@435	221
duke@435	222
duke@435	223	// Implementation of Runtime1
duke@435	224
duke@435	225	#define __ sasm->
duke@435	226
never@739	227	const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
never@739	228	const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
duke@435	229
duke@435	230	// Stack layout for saving/restoring all the registers needed during a runtime
duke@435	231	// call (this includes deoptimization)
duke@435	232	// Note: note that users of this frame may well have arguments to some runtime
duke@435	233	// while these values are on the stack. These positions neglect those arguments
duke@435	234	// but the code in save_live_registers will take the argument count into
duke@435	235	// account.
duke@435	236	//
never@739	237	#ifdef _LP64
never@739	238	#define SLOT2(x) x,
never@739	239	#define SLOT_PER_WORD 2
never@739	240	#else
never@739	241	#define SLOT2(x)
never@739	242	#define SLOT_PER_WORD 1
never@739	243	#endif // _LP64
never@739	244
duke@435	245	enum reg_save_layout {
never@739	246	// 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
never@739	247	// happen and will assert if the stack size we create is misaligned
never@739	248	#ifdef _LP64
never@739	249	align_dummy_0, align_dummy_1,
never@739	250	#endif // _LP64
never@739	251	dummy1, SLOT2(dummy1H) // 0, 4
never@739	252	dummy2, SLOT2(dummy2H) // 8, 12
duke@435	253	// Two temps to be used as needed by users of save/restore callee registers
never@739	254	temp_2_off, SLOT2(temp_2H_off) // 16, 20
never@739	255	temp_1_off, SLOT2(temp_1H_off) // 24, 28
never@739	256	xmm_regs_as_doubles_off, // 32
never@739	257	float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
never@739	258	fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
never@739	259	// fpu_state_end_off is exclusive
never@739	260	fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
never@739	261	marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
never@739	262	extra_space_offset, // 360
never@739	263	#ifdef _LP64
never@739	264	r15_off = extra_space_offset, r15H_off, // 360, 364
never@739	265	r14_off, r14H_off, // 368, 372
never@739	266	r13_off, r13H_off, // 376, 380
never@739	267	r12_off, r12H_off, // 384, 388
never@739	268	r11_off, r11H_off, // 392, 396
never@739	269	r10_off, r10H_off, // 400, 404
never@739	270	r9_off, r9H_off, // 408, 412
never@739	271	r8_off, r8H_off, // 416, 420
never@739	272	rdi_off, rdiH_off, // 424, 428
never@739	273	#else
duke@435	274	rdi_off = extra_space_offset,
never@739	275	#endif // _LP64
never@739	276	rsi_off, SLOT2(rsiH_off) // 432, 436
never@739	277	rbp_off, SLOT2(rbpH_off) // 440, 444
never@739	278	rsp_off, SLOT2(rspH_off) // 448, 452
never@739	279	rbx_off, SLOT2(rbxH_off) // 456, 460
never@739	280	rdx_off, SLOT2(rdxH_off) // 464, 468
never@739	281	rcx_off, SLOT2(rcxH_off) // 472, 476
never@739	282	rax_off, SLOT2(raxH_off) // 480, 484
never@739	283	saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
never@739	284	return_off, SLOT2(returnH_off) // 496, 500
never@739	285	reg_save_frame_size, // As noted: neglects any parameters to runtime // 504
never@739	286
never@739	287	#ifdef _WIN64
never@739	288	c_rarg0_off = rcx_off,
never@739	289	#else
never@739	290	c_rarg0_off = rdi_off,
never@739	291	#endif // WIN64
duke@435	292
duke@435	293	// equates
duke@435	294
duke@435	295	// illegal instruction handler
duke@435	296	continue_dest_off = temp_1_off,
duke@435	297
duke@435	298	// deoptimization equates
duke@435	299	fp0_off = float_regs_as_doubles_off, // slot for java float/double return value
duke@435	300	xmm0_off = xmm_regs_as_doubles_off, // slot for java float/double return value
duke@435	301	deopt_type = temp_2_off, // slot for type of deopt in progress
duke@435	302	ret_type = temp_1_off // slot for return type
duke@435	303	};
duke@435	304
duke@435	305
duke@435	306
duke@435	307	// Save off registers which might be killed by calls into the runtime.
duke@435	308	// Tries to smart of about FP registers. In particular we separate
duke@435	309	// saving and describing the FPU registers for deoptimization since we
duke@435	310	// have to save the FPU registers twice if we describe them and on P4
duke@435	311	// saving FPU registers which don't contain anything appears
duke@435	312	// expensive. The deopt blob is the only thing which needs to
duke@435	313	// describe FPU registers. In all other cases it should be sufficient
duke@435	314	// to simply save their current value.
duke@435	315
duke@435	316	static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
duke@435	317	bool save_fpu_registers = true) {
never@739	318
never@739	319	// In 64bit all the args are in regs so there are no additional stack slots
never@739	320	LP64_ONLY(num_rt_args = 0);
never@739	321	LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
never@739	322	int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
never@739	323	sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
duke@435	324
duke@435	325	// record saved value locations in an OopMap
duke@435	326	// locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
never@739	327	OopMap* map = new OopMap(frame_size_in_slots, 0);
duke@435	328	map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
duke@435	329	map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
duke@435	330	map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
duke@435	331	map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
duke@435	332	map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
duke@435	333	map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
never@739	334	#ifdef _LP64
never@739	335	map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
never@739	336	map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
never@739	337	map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
never@739	338	map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
never@739	339	map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
never@739	340	map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
never@739	341	map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
never@739	342	map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
never@739	343
never@739	344	// This is stupid but needed.
never@739	345	map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
never@739	346	map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
never@739	347	map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
never@739	348	map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
never@739	349	map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
never@739	350	map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
never@739	351
never@739	352	map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
never@739	353	map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
never@739	354	map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
never@739	355	map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
never@739	356	map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
never@739	357	map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
never@739	358	map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
never@739	359	map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
never@739	360	#endif // _LP64
duke@435	361
duke@435	362	if (save_fpu_registers) {
duke@435	363	if (UseSSE < 2) {
duke@435	364	int fpu_off = float_regs_as_doubles_off;
duke@435	365	for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
duke@435	366	VMReg fpu_name_0 = FrameMap::fpu_regname(n);
duke@435	367	map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
duke@435	368	// %%% This is really a waste but we'll keep things as they were for now
duke@435	369	if (true) {
duke@435	370	map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
duke@435	371	}
duke@435	372	fpu_off += 2;
duke@435	373	}
duke@435	374	assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
duke@435	375	}
duke@435	376
duke@435	377	if (UseSSE >= 2) {
duke@435	378	int xmm_off = xmm_regs_as_doubles_off;
duke@435	379	for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
duke@435	380	VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
duke@435	381	map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
duke@435	382	// %%% This is really a waste but we'll keep things as they were for now
duke@435	383	if (true) {
duke@435	384	map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
duke@435	385	}
duke@435	386	xmm_off += 2;
duke@435	387	}
duke@435	388	assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
duke@435	389
duke@435	390	} else if (UseSSE == 1) {
duke@435	391	int xmm_off = xmm_regs_as_doubles_off;
duke@435	392	for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
duke@435	393	VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
duke@435	394	map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
duke@435	395	xmm_off += 2;
duke@435	396	}
duke@435	397	assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
duke@435	398	}
duke@435	399	}
duke@435	400
duke@435	401	return map;
duke@435	402	}
duke@435	403
duke@435	404	static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
duke@435	405	bool save_fpu_registers = true) {
duke@435	406	__ block_comment("save_live_registers");
duke@435	407
never@739	408	// 64bit passes the args in regs to the c++ runtime
never@739	409	int frame_size_in_slots = reg_save_frame_size NOT_LP64(+ num_rt_args); // args + thread
duke@435	410	// frame_size = round_to(frame_size, 4);
never@739	411	sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
duke@435	412
never@739	413	__ pusha(); // integer registers
duke@435	414
duke@435	415	// assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
duke@435	416	// assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
duke@435	417
never@739	418	__ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
duke@435	419
duke@435	420	#ifdef ASSERT
never@739	421	__ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
duke@435	422	#endif
duke@435	423
duke@435	424	if (save_fpu_registers) {
duke@435	425	if (UseSSE < 2) {
duke@435	426	// save FPU stack
never@739	427	__ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435	428	__ fwait();
duke@435	429
duke@435	430	#ifdef ASSERT
duke@435	431	Label ok;
never@739	432	__ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
duke@435	433	__ jccb(Assembler::equal, ok);
duke@435	434	__ stop("corrupted control word detected");
duke@435	435	__ bind(ok);
duke@435	436	#endif
duke@435	437
duke@435	438	// Reset the control word to guard against exceptions being unmasked
duke@435	439	// since fstp_d can cause FPU stack underflow exceptions. Write it
duke@435	440	// into the on stack copy and then reload that to make sure that the
duke@435	441	// current and future values are correct.
never@739	442	__ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
never@739	443	__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435	444
duke@435	445	// Save the FPU registers in de-opt-able form
never@739	446	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739	447	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739	448	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739	449	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739	450	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739	451	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739	452	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739	453	__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
duke@435	454	}
duke@435	455
duke@435	456	if (UseSSE >= 2) {
duke@435	457	// save XMM registers
duke@435	458	// XMM registers can contain float or double values, but this is not known here,
duke@435	459	// so always save them as doubles.
duke@435	460	// note that float values are _not_ converted automatically, so for float values
duke@435	461	// the second word contains only garbage data.
never@739	462	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
never@739	463	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
never@739	464	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
never@739	465	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
never@739	466	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
never@739	467	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
never@739	468	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
never@739	469	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
never@739	470	#ifdef _LP64
never@739	471	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8);
never@739	472	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9);
never@739	473	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10);
never@739	474	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11);
never@739	475	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12);
never@739	476	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13);
never@739	477	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14);
never@739	478	__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15);
never@739	479	#endif // _LP64
duke@435	480	} else if (UseSSE == 1) {
duke@435	481	// save XMM registers as float because double not supported without SSE2
never@739	482	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
never@739	483	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
never@739	484	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
never@739	485	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
never@739	486	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
never@739	487	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
never@739	488	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
never@739	489	__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
duke@435	490	}
duke@435	491	}
duke@435	492
duke@435	493	// FPU stack must be empty now
duke@435	494	__ verify_FPU(0, "save_live_registers");
duke@435	495
duke@435	496	return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
duke@435	497	}
duke@435	498
duke@435	499
duke@435	500	static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435	501	if (restore_fpu_registers) {
duke@435	502	if (UseSSE >= 2) {
duke@435	503	// restore XMM registers
never@739	504	__ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739	505	__ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739	506	__ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739	507	__ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739	508	__ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739	509	__ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739	510	__ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739	511	__ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
never@739	512	#ifdef _LP64
never@739	513	__ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64));
never@739	514	__ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72));
never@739	515	__ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80));
never@739	516	__ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88));
never@739	517	__ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96));
never@739	518	__ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104));
never@739	519	__ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112));
never@739	520	__ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120));
never@739	521	#endif // _LP64
duke@435	522	} else if (UseSSE == 1) {
duke@435	523	// restore XMM registers
never@739	524	__ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
never@739	525	__ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
never@739	526	__ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
never@739	527	__ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
never@739	528	__ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
never@739	529	__ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
never@739	530	__ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
never@739	531	__ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
duke@435	532	}
duke@435	533
duke@435	534	if (UseSSE < 2) {
never@739	535	__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
duke@435	536	} else {
duke@435	537	// check that FPU stack is really empty
duke@435	538	__ verify_FPU(0, "restore_live_registers");
duke@435	539	}
duke@435	540
duke@435	541	} else {
duke@435	542	// check that FPU stack is really empty
duke@435	543	__ verify_FPU(0, "restore_live_registers");
duke@435	544	}
duke@435	545
duke@435	546	#ifdef ASSERT
duke@435	547	{
duke@435	548	Label ok;
never@739	549	__ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
duke@435	550	__ jcc(Assembler::equal, ok);
duke@435	551	__ stop("bad offsets in frame");
duke@435	552	__ bind(ok);
duke@435	553	}
never@739	554	#endif // ASSERT
duke@435	555
never@739	556	__ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
duke@435	557	}
duke@435	558
duke@435	559
duke@435	560	static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435	561	__ block_comment("restore_live_registers");
duke@435	562
duke@435	563	restore_fpu(sasm, restore_fpu_registers);
never@739	564	__ popa();
duke@435	565	}
duke@435	566
duke@435	567
duke@435	568	static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@435	569	__ block_comment("restore_live_registers_except_rax");
duke@435	570
duke@435	571	restore_fpu(sasm, restore_fpu_registers);
duke@435	572
never@739	573	#ifdef _LP64
never@739	574	__ movptr(r15, Address(rsp, 0));
never@739	575	__ movptr(r14, Address(rsp, wordSize));
never@739	576	__ movptr(r13, Address(rsp, 2 * wordSize));
never@739	577	__ movptr(r12, Address(rsp, 3 * wordSize));
never@739	578	__ movptr(r11, Address(rsp, 4 * wordSize));
never@739	579	__ movptr(r10, Address(rsp, 5 * wordSize));
never@739	580	__ movptr(r9, Address(rsp, 6 * wordSize));
never@739	581	__ movptr(r8, Address(rsp, 7 * wordSize));
never@739	582	__ movptr(rdi, Address(rsp, 8 * wordSize));
never@739	583	__ movptr(rsi, Address(rsp, 9 * wordSize));
never@739	584	__ movptr(rbp, Address(rsp, 10 * wordSize));
never@739	585	// skip rsp
never@739	586	__ movptr(rbx, Address(rsp, 12 * wordSize));
never@739	587	__ movptr(rdx, Address(rsp, 13 * wordSize));
never@739	588	__ movptr(rcx, Address(rsp, 14 * wordSize));
never@739	589
never@739	590	__ addptr(rsp, 16 * wordSize);
never@739	591	#else
never@739	592
never@739	593	__ pop(rdi);
never@739	594	__ pop(rsi);
never@739	595	__ pop(rbp);
never@739	596	__ pop(rbx); // skip this value
never@739	597	__ pop(rbx);
never@739	598	__ pop(rdx);
never@739	599	__ pop(rcx);
never@739	600	__ addptr(rsp, BytesPerWord);
never@739	601	#endif // _LP64
duke@435	602	}
duke@435	603
duke@435	604
duke@435	605	void Runtime1::initialize_pd() {
duke@435	606	// nothing to do
duke@435	607	}
duke@435	608
duke@435	609
duke@435	610	// target: the entry point of the method that creates and posts the exception oop
duke@435	611	// has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
duke@435	612
duke@435	613	OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
duke@435	614	// preserve all registers
duke@435	615	int num_rt_args = has_argument ? 2 : 1;
duke@435	616	OopMap* oop_map = save_live_registers(sasm, num_rt_args);
duke@435	617
duke@435	618	// now all registers are saved and can be used freely
duke@435	619	// verify that no old value is used accidentally
duke@435	620	__ invalidate_registers(true, true, true, true, true, true);
duke@435	621
duke@435	622	// registers used by this stub
duke@435	623	const Register temp_reg = rbx;
duke@435	624
duke@435	625	// load argument for exception that is passed as an argument into the stub
duke@435	626	if (has_argument) {
never@739	627	#ifdef _LP64
never@739	628	__ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
never@739	629	#else
never@739	630	__ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
never@739	631	__ push(temp_reg);
never@739	632	#endif // _LP64
duke@435	633	}
duke@435	634	int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
duke@435	635
duke@435	636	OopMapSet* oop_maps = new OopMapSet();
duke@435	637	oop_maps->add_gc_map(call_offset, oop_map);
duke@435	638
duke@435	639	__ stop("should not reach here");
duke@435	640
duke@435	641	return oop_maps;
duke@435	642	}
duke@435	643
duke@435	644
duke@435	645	void Runtime1::generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map, bool save_fpu_registers) {
duke@435	646	// incoming parameters
duke@435	647	const Register exception_oop = rax;
duke@435	648	const Register exception_pc = rdx;
duke@435	649	// other registers used in this stub
duke@435	650	const Register real_return_addr = rbx;
never@739	651	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435	652
duke@435	653	__ block_comment("generate_handle_exception");
duke@435	654
duke@435	655	#ifdef TIERED
duke@435	656	// C2 can leave the fpu stack dirty
duke@435	657	if (UseSSE < 2 ) {
duke@435	658	__ empty_FPU_stack();
duke@435	659	}
duke@435	660	#endif // TIERED
duke@435	661
duke@435	662	// verify that only rax, and rdx is valid at this time
duke@435	663	__ invalidate_registers(false, true, true, false, true, true);
duke@435	664	// verify that rax, contains a valid exception
duke@435	665	__ verify_not_null_oop(exception_oop);
duke@435	666
duke@435	667	// load address of JavaThread object for thread-local data
never@739	668	NOT_LP64(__ get_thread(thread);)
duke@435	669
duke@435	670	#ifdef ASSERT
duke@435	671	// check that fields in JavaThread for exception oop and issuing pc are
duke@435	672	// empty before writing to them
duke@435	673	Label oop_empty;
never@739	674	__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
duke@435	675	__ jcc(Assembler::equal, oop_empty);
duke@435	676	__ stop("exception oop already set");
duke@435	677	__ bind(oop_empty);
duke@435	678
duke@435	679	Label pc_empty;
never@739	680	__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
duke@435	681	__ jcc(Assembler::equal, pc_empty);
duke@435	682	__ stop("exception pc already set");
duke@435	683	__ bind(pc_empty);
duke@435	684	#endif
duke@435	685
duke@435	686	// save exception oop and issuing pc into JavaThread
duke@435	687	// (exception handler will load it from here)
never@739	688	__ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
never@739	689	__ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
duke@435	690
duke@435	691	// save real return address (pc that called this stub)
never@739	692	__ movptr(real_return_addr, Address(rbp, 1*BytesPerWord));
never@739	693	__ movptr(Address(rsp, temp_1_off * VMRegImpl::stack_slot_size), real_return_addr);
duke@435	694
duke@435	695	// patch throwing pc into return address (has bci & oop map)
never@739	696	__ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
duke@435	697
duke@435	698	// compute the exception handler.
duke@435	699	// the exception oop and the throwing pc are read from the fields in JavaThread
duke@435	700	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
duke@435	701	oop_maps->add_gc_map(call_offset, oop_map);
duke@435	702
twisti@1730	703	// rax,: handler address
duke@435	704	// will be the deopt blob if nmethod was deoptimized while we looked up
duke@435	705	// handler regardless of whether handler existed in the nmethod.
duke@435	706
duke@435	707	// only rax, is valid at this time, all other registers have been destroyed by the runtime call
duke@435	708	__ invalidate_registers(false, true, true, true, true, true);
duke@435	709
twisti@1730	710	#ifdef ASSERT
duke@435	711	// Do we have an exception handler in the nmethod?
duke@435	712	Label done;
never@739	713	__ testptr(rax, rax);
twisti@1730	714	__ jcc(Assembler::notZero, done);
twisti@1730	715	__ stop("no handler found");
twisti@1730	716	__ bind(done);
twisti@1730	717	#endif
duke@435	718
duke@435	719	// exception handler found
duke@435	720	// patch the return address -> the stub will directly return to the exception handler
never@739	721	__ movptr(Address(rbp, 1*BytesPerWord), rax);
duke@435	722
duke@435	723	// restore registers
duke@435	724	restore_live_registers(sasm, save_fpu_registers);
duke@435	725
duke@435	726	// return to exception handler
duke@435	727	__ leave();
duke@435	728	__ ret(0);
duke@435	729
duke@435	730	}
duke@435	731
duke@435	732
duke@435	733	void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
duke@435	734	// incoming parameters
duke@435	735	const Register exception_oop = rax;
twisti@1730	736	// callee-saved copy of exception_oop during runtime call
twisti@1730	737	const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
duke@435	738	// other registers used in this stub
duke@435	739	const Register exception_pc = rdx;
duke@435	740	const Register handler_addr = rbx;
never@739	741	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435	742
duke@435	743	// verify that only rax, is valid at this time
duke@435	744	__ invalidate_registers(false, true, true, true, true, true);
duke@435	745
duke@435	746	#ifdef ASSERT
duke@435	747	// check that fields in JavaThread for exception oop and issuing pc are empty
never@739	748	NOT_LP64(__ get_thread(thread);)
duke@435	749	Label oop_empty;
never@739	750	__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
duke@435	751	__ jcc(Assembler::equal, oop_empty);
duke@435	752	__ stop("exception oop must be empty");
duke@435	753	__ bind(oop_empty);
duke@435	754
duke@435	755	Label pc_empty;
never@739	756	__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
duke@435	757	__ jcc(Assembler::equal, pc_empty);
duke@435	758	__ stop("exception pc must be empty");
duke@435	759	__ bind(pc_empty);
duke@435	760	#endif
duke@435	761
duke@435	762	// clear the FPU stack in case any FPU results are left behind
duke@435	763	__ empty_FPU_stack();
duke@435	764
twisti@1730	765	// save exception_oop in callee-saved register to preserve it during runtime calls
twisti@1730	766	__ verify_not_null_oop(exception_oop);
twisti@1730	767	__ movptr(exception_oop_callee_saved, exception_oop);
twisti@1730	768
twisti@1730	769	NOT_LP64(__ get_thread(thread);)
twisti@1730	770	// Get return address (is on top of stack after leave).
never@739	771	__ movptr(exception_pc, Address(rsp, 0));
duke@435	772
twisti@1730	773	// search the exception handler address of the caller (using the return address)
twisti@1730	774	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
twisti@1730	775	// rax: exception handler address of the caller
duke@435	776
twisti@1730	777	// Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
twisti@1730	778	__ invalidate_registers(false, true, true, true, false, true);
duke@435	779
duke@435	780	// move result of call into correct register
never@739	781	__ movptr(handler_addr, rax);
duke@435	782
twisti@1730	783	// Restore exception oop to RAX (required convention of exception handler).
twisti@1730	784	__ movptr(exception_oop, exception_oop_callee_saved);
duke@435	785
twisti@1730	786	// verify that there is really a valid exception in rax
twisti@1730	787	__ verify_not_null_oop(exception_oop);
duke@435	788
duke@435	789	// get throwing pc (= return address).
duke@435	790	// rdx has been destroyed by the call, so it must be set again
duke@435	791	// the pop is also necessary to simulate the effect of a ret(0)
never@739	792	__ pop(exception_pc);
duke@435	793
twisti@1730	794	// Restore SP from BP if the exception PC is a MethodHandle call site.
twisti@1730	795	NOT_LP64(__ get_thread(thread);)
twisti@1803	796	__ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0);
twisti@1919	797	__ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save);
duke@435	798
duke@435	799	// continue at exception handler (return address removed)
duke@435	800	// note: do *not* remove arguments when unwinding the
duke@435	801	// activation since the caller assumes having
duke@435	802	// all arguments on the stack when entering the
duke@435	803	// runtime to determine the exception handler
duke@435	804	// (GC happens at call site with arguments!)
twisti@1730	805	// rax: exception oop
duke@435	806	// rdx: throwing pc
twisti@1730	807	// rbx: exception handler
duke@435	808	__ jmp(handler_addr);
duke@435	809	}
duke@435	810
duke@435	811
duke@435	812	OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
duke@435	813	// use the maximum number of runtime-arguments here because it is difficult to
duke@435	814	// distinguish each RT-Call.
duke@435	815	// Note: This number affects also the RT-Call in generate_handle_exception because
duke@435	816	// the oop-map is shared for all calls.
duke@435	817	const int num_rt_args = 2; // thread + dummy
duke@435	818
duke@435	819	DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
duke@435	820	assert(deopt_blob != NULL, "deoptimization blob must have been created");
duke@435	821
duke@435	822	OopMap* oop_map = save_live_registers(sasm, num_rt_args);
duke@435	823
never@739	824	#ifdef _LP64
never@739	825	const Register thread = r15_thread;
never@739	826	// No need to worry about dummy
never@739	827	__ mov(c_rarg0, thread);
never@739	828	#else
never@739	829	__ push(rax); // push dummy
duke@435	830
duke@435	831	const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
duke@435	832	// push java thread (becomes first argument of C function)
duke@435	833	__ get_thread(thread);
never@739	834	__ push(thread);
never@739	835	#endif // _LP64
duke@435	836	__ set_last_Java_frame(thread, noreg, rbp, NULL);
duke@435	837	// do the call
duke@435	838	__ call(RuntimeAddress(target));
duke@435	839	OopMapSet* oop_maps = new OopMapSet();
duke@435	840	oop_maps->add_gc_map(__ offset(), oop_map);
duke@435	841	// verify callee-saved register
duke@435	842	#ifdef ASSERT
duke@435	843	guarantee(thread != rax, "change this code");
never@739	844	__ push(rax);
duke@435	845	{ Label L;
duke@435	846	__ get_thread(rax);
never@739	847	__ cmpptr(thread, rax);
duke@435	848	__ jcc(Assembler::equal, L);
never@739	849	__ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
duke@435	850	__ bind(L);
duke@435	851	}
never@739	852	__ pop(rax);
duke@435	853	#endif
duke@435	854	__ reset_last_Java_frame(thread, true, false);
never@739	855	#ifndef _LP64
never@739	856	__ pop(rcx); // discard thread arg
never@739	857	__ pop(rcx); // discard dummy
never@739	858	#endif // _LP64
duke@435	859
duke@435	860	// check for pending exceptions
duke@435	861	{ Label L;
never@739	862	__ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
duke@435	863	__ jcc(Assembler::equal, L);
duke@435	864	// exception pending => remove activation and forward to exception handler
duke@435	865
never@739	866	__ testptr(rax, rax); // have we deoptimized?
duke@435	867	__ jump_cc(Assembler::equal,
duke@435	868	RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
duke@435	869
duke@435	870	// the deopt blob expects exceptions in the special fields of
duke@435	871	// JavaThread, so copy and clear pending exception.
duke@435	872
duke@435	873	// load and clear pending exception
never@739	874	__ movptr(rax, Address(thread, Thread::pending_exception_offset()));
xlu@947	875	__ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
duke@435	876
duke@435	877	// check that there is really a valid exception
duke@435	878	__ verify_not_null_oop(rax);
duke@435	879
duke@435	880	// load throwing pc: this is the return address of the stub
never@739	881	__ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
duke@435	882
duke@435	883	#ifdef ASSERT
duke@435	884	// check that fields in JavaThread for exception oop and issuing pc are empty
duke@435	885	Label oop_empty;
never@739	886	__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
duke@435	887	__ jcc(Assembler::equal, oop_empty);
duke@435	888	__ stop("exception oop must be empty");
duke@435	889	__ bind(oop_empty);
duke@435	890
duke@435	891	Label pc_empty;
never@739	892	__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
duke@435	893	__ jcc(Assembler::equal, pc_empty);
duke@435	894	__ stop("exception pc must be empty");
duke@435	895	__ bind(pc_empty);
duke@435	896	#endif
duke@435	897
duke@435	898	// store exception oop and throwing pc to JavaThread
never@739	899	__ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
never@739	900	__ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
duke@435	901
duke@435	902	restore_live_registers(sasm);
duke@435	903
duke@435	904	__ leave();
never@739	905	__ addptr(rsp, BytesPerWord); // remove return address from stack
duke@435	906
duke@435	907	// Forward the exception directly to deopt blob. We can blow no
duke@435	908	// registers and must leave throwing pc on the stack. A patch may
duke@435	909	// have values live in registers so the entry point with the
duke@435	910	// exception in tls.
duke@435	911	__ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
duke@435	912
duke@435	913	__ bind(L);
duke@435	914	}
duke@435	915
duke@435	916
duke@435	917	// Runtime will return true if the nmethod has been deoptimized during
duke@435	918	// the patching process. In that case we must do a deopt reexecute instead.
duke@435	919
duke@435	920	Label reexecuteEntry, cont;
duke@435	921
never@739	922	__ testptr(rax, rax); // have we deoptimized?
duke@435	923	__ jcc(Assembler::equal, cont); // no
duke@435	924
duke@435	925	// Will reexecute. Proper return address is already on the stack we just restore
duke@435	926	// registers, pop all of our frame but the return address and jump to the deopt blob
duke@435	927	restore_live_registers(sasm);
duke@435	928	__ leave();
duke@435	929	__ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
duke@435	930
duke@435	931	__ bind(cont);
duke@435	932	restore_live_registers(sasm);
duke@435	933	__ leave();
duke@435	934	__ ret(0);
duke@435	935
duke@435	936	return oop_maps;
duke@435	937
duke@435	938	}
duke@435	939
duke@435	940
duke@435	941	OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
duke@435	942
duke@435	943	// for better readability
duke@435	944	const bool must_gc_arguments = true;
duke@435	945	const bool dont_gc_arguments = false;
duke@435	946
duke@435	947	// default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
duke@435	948	bool save_fpu_registers = true;
duke@435	949
duke@435	950	// stub code & info for the different stubs
duke@435	951	OopMapSet* oop_maps = NULL;
duke@435	952	switch (id) {
duke@435	953	case forward_exception_id:
duke@435	954	{
duke@435	955	// we're handling an exception in the context of a compiled
duke@435	956	// frame. The registers have been saved in the standard
duke@435	957	// places. Perform an exception lookup in the caller and
duke@435	958	// dispatch to the handler if found. Otherwise unwind and
duke@435	959	// dispatch to the callers exception handler.
duke@435	960
never@739	961	const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
duke@435	962	const Register exception_oop = rax;
duke@435	963	const Register exception_pc = rdx;
duke@435	964
duke@435	965	// load pending exception oop into rax,
never@739	966	__ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
duke@435	967	// clear pending exception
xlu@947	968	__ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
duke@435	969
duke@435	970	// load issuing PC (the return address for this stub) into rdx
never@739	971	__ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
duke@435	972
duke@435	973	// make sure that the vm_results are cleared (may be unnecessary)
xlu@947	974	__ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
xlu@947	975	__ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
duke@435	976
duke@435	977	// verify that that there is really a valid exception in rax,
duke@435	978	__ verify_not_null_oop(exception_oop);
duke@435	979
duke@435	980
duke@435	981	oop_maps = new OopMapSet();
duke@435	982	OopMap* oop_map = generate_oop_map(sasm, 1);
duke@435	983	generate_handle_exception(sasm, oop_maps, oop_map);
duke@435	984	__ stop("should not reach here");
duke@435	985	}
duke@435	986	break;
duke@435	987
duke@435	988	case new_instance_id:
duke@435	989	case fast_new_instance_id:
duke@435	990	case fast_new_instance_init_check_id:
duke@435	991	{
duke@435	992	Register klass = rdx; // Incoming
duke@435	993	Register obj = rax; // Result
duke@435	994
duke@435	995	if (id == new_instance_id) {
duke@435	996	__ set_info("new_instance", dont_gc_arguments);
duke@435	997	} else if (id == fast_new_instance_id) {
duke@435	998	__ set_info("fast new_instance", dont_gc_arguments);
duke@435	999	} else {
duke@435	1000	assert(id == fast_new_instance_init_check_id, "bad StubID");
duke@435	1001	__ set_info("fast new_instance init check", dont_gc_arguments);
duke@435	1002	}
duke@435	1003
duke@435	1004	if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
duke@435	1005	UseTLAB && FastTLABRefill) {
duke@435	1006	Label slow_path;
duke@435	1007	Register obj_size = rcx;
duke@435	1008	Register t1 = rbx;
duke@435	1009	Register t2 = rsi;
duke@435	1010	assert_different_registers(klass, obj, obj_size, t1, t2);
duke@435	1011
never@739	1012	__ push(rdi);
never@739	1013	__ push(rbx);
duke@435	1014
duke@435	1015	if (id == fast_new_instance_init_check_id) {
duke@435	1016	// make sure the klass is initialized
duke@435	1017	__ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized);
duke@435	1018	__ jcc(Assembler::notEqual, slow_path);
duke@435	1019	}
duke@435	1020
duke@435	1021	#ifdef ASSERT
duke@435	1022	// assert object can be fast path allocated
duke@435	1023	{
duke@435	1024	Label ok, not_ok;
duke@435	1025	__ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc)));
duke@435	1026	__ cmpl(obj_size, 0); // make sure it's an instance (LH > 0)
duke@435	1027	__ jcc(Assembler::lessEqual, not_ok);
duke@435	1028	__ testl(obj_size, Klass::_lh_instance_slow_path_bit);
duke@435	1029	__ jcc(Assembler::zero, ok);
duke@435	1030	__ bind(not_ok);
duke@435	1031	__ stop("assert(can be fast path allocated)");
duke@435	1032	__ should_not_reach_here();
duke@435	1033	__ bind(ok);
duke@435	1034	}
duke@435	1035	#endif // ASSERT
duke@435	1036
duke@435	1037	// if we got here then the TLAB allocation failed, so try
duke@435	1038	// refilling the TLAB or allocating directly from eden.
duke@435	1039	Label retry_tlab, try_eden;
duke@435	1040	__ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass)
duke@435	1041
duke@435	1042	__ bind(retry_tlab);
duke@435	1043
never@739	1044	// get the instance size (size is postive so movl is fine for 64bit)
duke@435	1045	__ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
duke@435	1046	__ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
duke@435	1047	__ initialize_object(obj, klass, obj_size, 0, t1, t2);
duke@435	1048	__ verify_oop(obj);
never@739	1049	__ pop(rbx);
never@739	1050	__ pop(rdi);
duke@435	1051	__ ret(0);
duke@435	1052
duke@435	1053	__ bind(try_eden);
never@739	1054	// get the instance size (size is postive so movl is fine for 64bit)
duke@435	1055	__ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
duke@435	1056	__ eden_allocate(obj, obj_size, 0, t1, slow_path);
duke@435	1057	__ initialize_object(obj, klass, obj_size, 0, t1, t2);
duke@435	1058	__ verify_oop(obj);
never@739	1059	__ pop(rbx);
never@739	1060	__ pop(rdi);
duke@435	1061	__ ret(0);
duke@435	1062
duke@435	1063	__ bind(slow_path);
never@739	1064	__ pop(rbx);
never@739	1065	__ pop(rdi);
duke@435	1066	}
duke@435	1067
duke@435	1068	__ enter();
duke@435	1069	OopMap* map = save_live_registers(sasm, 2);
duke@435	1070	int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
duke@435	1071	oop_maps = new OopMapSet();
duke@435	1072	oop_maps->add_gc_map(call_offset, map);
duke@435	1073	restore_live_registers_except_rax(sasm);
duke@435	1074	__ verify_oop(obj);
duke@435	1075	__ leave();
duke@435	1076	__ ret(0);
duke@435	1077
duke@435	1078	// rax,: new instance
duke@435	1079	}
duke@435	1080
duke@435	1081	break;
duke@435	1082
duke@435	1083	case counter_overflow_id:
duke@435	1084	{
iveresov@2138	1085	Register bci = rax, method = rbx;
duke@435	1086	__ enter();
iveresov@2138	1087	OopMap* map = save_live_registers(sasm, 3);
duke@435	1088	// Retrieve bci
duke@435	1089	__ movl(bci, Address(rbp, 2*BytesPerWord));
iveresov@2138	1090	// And a pointer to the methodOop
iveresov@2138	1091	__ movptr(method, Address(rbp, 3*BytesPerWord));
iveresov@2138	1092	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
duke@435	1093	oop_maps = new OopMapSet();
duke@435	1094	oop_maps->add_gc_map(call_offset, map);
duke@435	1095	restore_live_registers(sasm);
duke@435	1096	__ leave();
duke@435	1097	__ ret(0);
duke@435	1098	}
duke@435	1099	break;
duke@435	1100
duke@435	1101	case new_type_array_id:
duke@435	1102	case new_object_array_id:
duke@435	1103	{
duke@435	1104	Register length = rbx; // Incoming
duke@435	1105	Register klass = rdx; // Incoming
duke@435	1106	Register obj = rax; // Result
duke@435	1107
duke@435	1108	if (id == new_type_array_id) {
duke@435	1109	__ set_info("new_type_array", dont_gc_arguments);
duke@435	1110	} else {
duke@435	1111	__ set_info("new_object_array", dont_gc_arguments);
duke@435	1112	}
duke@435	1113
duke@435	1114	#ifdef ASSERT
duke@435	1115	// assert object type is really an array of the proper kind
duke@435	1116	{
duke@435	1117	Label ok;
duke@435	1118	Register t0 = obj;
duke@435	1119	__ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc)));
duke@435	1120	__ sarl(t0, Klass::_lh_array_tag_shift);
duke@435	1121	int tag = ((id == new_type_array_id)
duke@435	1122	? Klass::_lh_array_tag_type_value
duke@435	1123	: Klass::_lh_array_tag_obj_value);
duke@435	1124	__ cmpl(t0, tag);
duke@435	1125	__ jcc(Assembler::equal, ok);
duke@435	1126	__ stop("assert(is an array klass)");
duke@435	1127	__ should_not_reach_here();
duke@435	1128	__ bind(ok);
duke@435	1129	}
duke@435	1130	#endif // ASSERT
duke@435	1131
duke@435	1132	if (UseTLAB && FastTLABRefill) {
duke@435	1133	Register arr_size = rsi;
duke@435	1134	Register t1 = rcx; // must be rcx for use as shift count
duke@435	1135	Register t2 = rdi;
duke@435	1136	Label slow_path;
duke@435	1137	assert_different_registers(length, klass, obj, arr_size, t1, t2);
duke@435	1138
duke@435	1139	// check that array length is small enough for fast path.
duke@435	1140	__ cmpl(length, C1_MacroAssembler::max_array_allocation_length);
duke@435	1141	__ jcc(Assembler::above, slow_path);
duke@435	1142
duke@435	1143	// if we got here then the TLAB allocation failed, so try
duke@435	1144	// refilling the TLAB or allocating directly from eden.
duke@435	1145	Label retry_tlab, try_eden;
duke@435	1146	__ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx, & rdx
duke@435	1147
duke@435	1148	__ bind(retry_tlab);
duke@435	1149
duke@435	1150	// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
never@739	1151	// since size is postive movl does right thing on 64bit
duke@435	1152	__ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
never@739	1153	// since size is postive movl does right thing on 64bit
duke@435	1154	__ movl(arr_size, length);
duke@435	1155	assert(t1 == rcx, "fixed register usage");
never@739	1156	__ shlptr(arr_size /* by t1=rcx, mod 32 */);
never@739	1157	__ shrptr(t1, Klass::_lh_header_size_shift);
never@739	1158	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1159	__ addptr(arr_size, t1);
never@739	1160	__ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
never@739	1161	__ andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435	1162
duke@435	1163	__ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
duke@435	1164
duke@435	1165	__ initialize_header(obj, klass, length, t1, t2);
duke@435	1166	__ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte)));
duke@435	1167	assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@435	1168	assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
never@739	1169	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1170	__ subptr(arr_size, t1); // body length
never@739	1171	__ addptr(t1, obj); // body start
duke@435	1172	__ initialize_body(t1, arr_size, 0, t2);
duke@435	1173	__ verify_oop(obj);
duke@435	1174	__ ret(0);
duke@435	1175
duke@435	1176	__ bind(try_eden);
duke@435	1177	// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
never@739	1178	// since size is postive movl does right thing on 64bit
duke@435	1179	__ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()));
never@739	1180	// since size is postive movl does right thing on 64bit
duke@435	1181	__ movl(arr_size, length);
duke@435	1182	assert(t1 == rcx, "fixed register usage");
never@739	1183	__ shlptr(arr_size /* by t1=rcx, mod 32 */);
never@739	1184	__ shrptr(t1, Klass::_lh_header_size_shift);
never@739	1185	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1186	__ addptr(arr_size, t1);
never@739	1187	__ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
never@739	1188	__ andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@435	1189
duke@435	1190	__ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
duke@435	1191
duke@435	1192	__ initialize_header(obj, klass, length, t1, t2);
duke@435	1193	__ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte)));
duke@435	1194	assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@435	1195	assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
never@739	1196	__ andptr(t1, Klass::_lh_header_size_mask);
never@739	1197	__ subptr(arr_size, t1); // body length
never@739	1198	__ addptr(t1, obj); // body start
duke@435	1199	__ initialize_body(t1, arr_size, 0, t2);
duke@435	1200	__ verify_oop(obj);
duke@435	1201	__ ret(0);
duke@435	1202
duke@435	1203	__ bind(slow_path);
duke@435	1204	}
duke@435	1205
duke@435	1206	__ enter();
duke@435	1207	OopMap* map = save_live_registers(sasm, 3);
duke@435	1208	int call_offset;
duke@435	1209	if (id == new_type_array_id) {
duke@435	1210	call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
duke@435	1211	} else {
duke@435	1212	call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
duke@435	1213	}
duke@435	1214
duke@435	1215	oop_maps = new OopMapSet();
duke@435	1216	oop_maps->add_gc_map(call_offset, map);
duke@435	1217	restore_live_registers_except_rax(sasm);
duke@435	1218
duke@435	1219	__ verify_oop(obj);
duke@435	1220	__ leave();
duke@435	1221	__ ret(0);
duke@435	1222
duke@435	1223	// rax,: new array
duke@435	1224	}
duke@435	1225	break;
duke@435	1226
duke@435	1227	case new_multi_array_id:
duke@435	1228	{ StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
duke@435	1229	// rax,: klass
duke@435	1230	// rbx,: rank
duke@435	1231	// rcx: address of 1st dimension
duke@435	1232	OopMap* map = save_live_registers(sasm, 4);
duke@435	1233	int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
duke@435	1234
duke@435	1235	oop_maps = new OopMapSet();
duke@435	1236	oop_maps->add_gc_map(call_offset, map);
duke@435	1237	restore_live_registers_except_rax(sasm);
duke@435	1238
duke@435	1239	// rax,: new multi array
duke@435	1240	__ verify_oop(rax);
duke@435	1241	}
duke@435	1242	break;
duke@435	1243
duke@435	1244	case register_finalizer_id:
duke@435	1245	{
duke@435	1246	__ set_info("register_finalizer", dont_gc_arguments);
duke@435	1247
never@739	1248	// This is called via call_runtime so the arguments
never@739	1249	// will be place in C abi locations
never@739	1250
never@739	1251	#ifdef _LP64
never@739	1252	__ verify_oop(c_rarg0);
never@739	1253	__ mov(rax, c_rarg0);
never@739	1254	#else
duke@435	1255	// The object is passed on the stack and we haven't pushed a
duke@435	1256	// frame yet so it's one work away from top of stack.
never@739	1257	__ movptr(rax, Address(rsp, 1 * BytesPerWord));
duke@435	1258	__ verify_oop(rax);
never@739	1259	#endif // _LP64
duke@435	1260
duke@435	1261	// load the klass and check the has finalizer flag
duke@435	1262	Label register_finalizer;
duke@435	1263	Register t = rsi;
never@739	1264	__ movptr(t, Address(rax, oopDesc::klass_offset_in_bytes()));
duke@435	1265	__ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc)));
duke@435	1266	__ testl(t, JVM_ACC_HAS_FINALIZER);
duke@435	1267	__ jcc(Assembler::notZero, register_finalizer);
duke@435	1268	__ ret(0);
duke@435	1269
duke@435	1270	__ bind(register_finalizer);
duke@435	1271	__ enter();
duke@435	1272	OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
duke@435	1273	int call_offset = __ call_RT(noreg, noreg,
duke@435	1274	CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
duke@435	1275	oop_maps = new OopMapSet();
duke@435	1276	oop_maps->add_gc_map(call_offset, oop_map);
duke@435	1277
duke@435	1278	// Now restore all the live registers
duke@435	1279	restore_live_registers(sasm);
duke@435	1280
duke@435	1281	__ leave();
duke@435	1282	__ ret(0);
duke@435	1283	}
duke@435	1284	break;
duke@435	1285
duke@435	1286	case throw_range_check_failed_id:
duke@435	1287	{ StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
duke@435	1288	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
duke@435	1289	}
duke@435	1290	break;
duke@435	1291
duke@435	1292	case throw_index_exception_id:
duke@435	1293	{ StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
duke@435	1294	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
duke@435	1295	}
duke@435	1296	break;
duke@435	1297
duke@435	1298	case throw_div0_exception_id:
duke@435	1299	{ StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
duke@435	1300	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
duke@435	1301	}
duke@435	1302	break;
duke@435	1303
duke@435	1304	case throw_null_pointer_exception_id:
duke@435	1305	{ StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
duke@435	1306	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
duke@435	1307	}
duke@435	1308	break;
duke@435	1309
duke@435	1310	case handle_exception_nofpu_id:
duke@435	1311	save_fpu_registers = false;
duke@435	1312	// fall through
duke@435	1313	case handle_exception_id:
duke@435	1314	{ StubFrame f(sasm, "handle_exception", dont_gc_arguments);
duke@435	1315	oop_maps = new OopMapSet();
duke@435	1316	OopMap* oop_map = save_live_registers(sasm, 1, save_fpu_registers);
duke@435	1317	generate_handle_exception(sasm, oop_maps, oop_map, save_fpu_registers);
duke@435	1318	}
duke@435	1319	break;
duke@435	1320
duke@435	1321	case unwind_exception_id:
duke@435	1322	{ __ set_info("unwind_exception", dont_gc_arguments);
duke@435	1323	// note: no stubframe since we are about to leave the current
duke@435	1324	// activation and we are calling a leaf VM function only.
duke@435	1325	generate_unwind_exception(sasm);
duke@435	1326	}
duke@435	1327	break;
duke@435	1328
duke@435	1329	case throw_array_store_exception_id:
duke@435	1330	{ StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
duke@435	1331	// tos + 0: link
duke@435	1332	// + 1: return address
duke@435	1333	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false);
duke@435	1334	}
duke@435	1335	break;
duke@435	1336
duke@435	1337	case throw_class_cast_exception_id:
duke@435	1338	{ StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
duke@435	1339	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
duke@435	1340	}
duke@435	1341	break;
duke@435	1342
duke@435	1343	case throw_incompatible_class_change_error_id:
duke@435	1344	{ StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
duke@435	1345	oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
duke@435	1346	}
duke@435	1347	break;
duke@435	1348
duke@435	1349	case slow_subtype_check_id:
duke@435	1350	{
jrose@1079	1351	// Typical calling sequence:
jrose@1079	1352	// __ push(klass_RInfo); // object klass or other subclass
jrose@1079	1353	// __ push(sup_k_RInfo); // array element klass or other superclass
jrose@1079	1354	// __ call(slow_subtype_check);
jrose@1079	1355	// Note that the subclass is pushed first, and is therefore deepest.
jrose@1079	1356	// Previous versions of this code reversed the names 'sub' and 'super'.
jrose@1079	1357	// This was operationally harmless but made the code unreadable.
duke@435	1358	enum layout {
never@739	1359	rax_off, SLOT2(raxH_off)
never@739	1360	rcx_off, SLOT2(rcxH_off)
never@739	1361	rsi_off, SLOT2(rsiH_off)
never@739	1362	rdi_off, SLOT2(rdiH_off)
never@739	1363	// saved_rbp_off, SLOT2(saved_rbpH_off)
never@739	1364	return_off, SLOT2(returnH_off)
jrose@1079	1365	sup_k_off, SLOT2(sup_kH_off)
jrose@1079	1366	klass_off, SLOT2(superH_off)
jrose@1079	1367	framesize,
jrose@1079	1368	result_off = klass_off // deepest argument is also the return value
duke@435	1369	};
duke@435	1370
duke@435	1371	__ set_info("slow_subtype_check", dont_gc_arguments);
never@739	1372	__ push(rdi);
never@739	1373	__ push(rsi);
never@739	1374	__ push(rcx);
never@739	1375	__ push(rax);
duke@435	1376
never@739	1377	// This is called by pushing args and not with C abi
jrose@1079	1378	__ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
jrose@1079	1379	__ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
duke@435	1380
duke@435	1381	Label miss;
jrose@1079	1382	__ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
jrose@1079	1383
jrose@1079	1384	// fallthrough on success:
jrose@1079	1385	__ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
never@739	1386	__ pop(rax);
never@739	1387	__ pop(rcx);
never@739	1388	__ pop(rsi);
never@739	1389	__ pop(rdi);
duke@435	1390	__ ret(0);
duke@435	1391
duke@435	1392	__ bind(miss);
jrose@1079	1393	__ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
never@739	1394	__ pop(rax);
never@739	1395	__ pop(rcx);
never@739	1396	__ pop(rsi);
never@739	1397	__ pop(rdi);
duke@435	1398	__ ret(0);
duke@435	1399	}
duke@435	1400	break;
duke@435	1401
duke@435	1402	case monitorenter_nofpu_id:
duke@435	1403	save_fpu_registers = false;
duke@435	1404	// fall through
duke@435	1405	case monitorenter_id:
duke@435	1406	{
duke@435	1407	StubFrame f(sasm, "monitorenter", dont_gc_arguments);
duke@435	1408	OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
duke@435	1409
never@739	1410	// Called with store_parameter and not C abi
never@739	1411
duke@435	1412	f.load_argument(1, rax); // rax,: object
duke@435	1413	f.load_argument(0, rbx); // rbx,: lock address
duke@435	1414
duke@435	1415	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
duke@435	1416
duke@435	1417	oop_maps = new OopMapSet();
duke@435	1418	oop_maps->add_gc_map(call_offset, map);
duke@435	1419	restore_live_registers(sasm, save_fpu_registers);
duke@435	1420	}
duke@435	1421	break;
duke@435	1422
duke@435	1423	case monitorexit_nofpu_id:
duke@435	1424	save_fpu_registers = false;
duke@435	1425	// fall through
duke@435	1426	case monitorexit_id:
duke@435	1427	{
duke@435	1428	StubFrame f(sasm, "monitorexit", dont_gc_arguments);
duke@435	1429	OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
duke@435	1430
never@739	1431	// Called with store_parameter and not C abi
never@739	1432
duke@435	1433	f.load_argument(0, rax); // rax,: lock address
duke@435	1434
duke@435	1435	// note: really a leaf routine but must setup last java sp
duke@435	1436	// => use call_RT for now (speed can be improved by
duke@435	1437	// doing last java sp setup manually)
duke@435	1438	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
duke@435	1439
duke@435	1440	oop_maps = new OopMapSet();
duke@435	1441	oop_maps->add_gc_map(call_offset, map);
duke@435	1442	restore_live_registers(sasm, save_fpu_registers);
duke@435	1443
duke@435	1444	}
duke@435	1445	break;
duke@435	1446
duke@435	1447	case access_field_patching_id:
duke@435	1448	{ StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
duke@435	1449	// we should set up register map
duke@435	1450	oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
duke@435	1451	}
duke@435	1452	break;
duke@435	1453
duke@435	1454	case load_klass_patching_id:
duke@435	1455	{ StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
duke@435	1456	// we should set up register map
duke@435	1457	oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
duke@435	1458	}
duke@435	1459	break;
duke@435	1460
duke@435	1461	case jvmti_exception_throw_id:
duke@435	1462	{ // rax,: exception oop
duke@435	1463	StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments);
duke@435	1464	// Preserve all registers across this potentially blocking call
duke@435	1465	const int num_rt_args = 2; // thread, exception oop
duke@435	1466	OopMap* map = save_live_registers(sasm, num_rt_args);
duke@435	1467	int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), rax);
duke@435	1468	oop_maps = new OopMapSet();
duke@435	1469	oop_maps->add_gc_map(call_offset, map);
duke@435	1470	restore_live_registers(sasm);
duke@435	1471	}
duke@435	1472	break;
duke@435	1473
duke@435	1474	case dtrace_object_alloc_id:
duke@435	1475	{ // rax,: object
duke@435	1476	StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
duke@435	1477	// we can't gc here so skip the oopmap but make sure that all
duke@435	1478	// the live registers get saved.
duke@435	1479	save_live_registers(sasm, 1);
duke@435	1480
never@739	1481	__ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
duke@435	1482	__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
never@739	1483	NOT_LP64(__ pop(rax));
duke@435	1484
duke@435	1485	restore_live_registers(sasm);
duke@435	1486	}
duke@435	1487	break;
duke@435	1488
duke@435	1489	case fpu2long_stub_id:
duke@435	1490	{
duke@435	1491	// rax, and rdx are destroyed, but should be free since the result is returned there
duke@435	1492	// preserve rsi,ecx
never@739	1493	__ push(rsi);
never@739	1494	__ push(rcx);
never@739	1495	LP64_ONLY(__ push(rdx);)
duke@435	1496
duke@435	1497	// check for NaN
duke@435	1498	Label return0, do_return, return_min_jlong, do_convert;
duke@435	1499
never@739	1500	Address value_high_word(rsp, wordSize + 4);
never@739	1501	Address value_low_word(rsp, wordSize);
never@739	1502	Address result_high_word(rsp, 3*wordSize + 4);
never@739	1503	Address result_low_word(rsp, 3*wordSize);
duke@435	1504
never@739	1505	__ subptr(rsp, 32); // more than enough on 32bit
duke@435	1506	__ fst_d(value_low_word);
duke@435	1507	__ movl(rax, value_high_word);
duke@435	1508	__ andl(rax, 0x7ff00000);
duke@435	1509	__ cmpl(rax, 0x7ff00000);
duke@435	1510	__ jcc(Assembler::notEqual, do_convert);
duke@435	1511	__ movl(rax, value_high_word);
duke@435	1512	__ andl(rax, 0xfffff);
duke@435	1513	__ orl(rax, value_low_word);
duke@435	1514	__ jcc(Assembler::notZero, return0);
duke@435	1515
duke@435	1516	__ bind(do_convert);
duke@435	1517	__ fnstcw(Address(rsp, 0));
never@739	1518	__ movzwl(rax, Address(rsp, 0));
duke@435	1519	__ orl(rax, 0xc00);
duke@435	1520	__ movw(Address(rsp, 2), rax);
duke@435	1521	__ fldcw(Address(rsp, 2));
duke@435	1522	__ fwait();
duke@435	1523	__ fistp_d(result_low_word);
duke@435	1524	__ fldcw(Address(rsp, 0));
duke@435	1525	__ fwait();
never@739	1526	// This gets the entire long in rax on 64bit
never@739	1527	__ movptr(rax, result_low_word);
never@739	1528	// testing of high bits
duke@435	1529	__ movl(rdx, result_high_word);
never@739	1530	__ mov(rcx, rax);
duke@435	1531	// What the heck is the point of the next instruction???
duke@435	1532	__ xorl(rcx, 0x0);
duke@435	1533	__ movl(rsi, 0x80000000);
duke@435	1534	__ xorl(rsi, rdx);
duke@435	1535	__ orl(rcx, rsi);
duke@435	1536	__ jcc(Assembler::notEqual, do_return);
duke@435	1537	__ fldz();
duke@435	1538	__ fcomp_d(value_low_word);
duke@435	1539	__ fnstsw_ax();
never@739	1540	#ifdef _LP64
never@739	1541	__ testl(rax, 0x4100); // ZF & CF == 0
never@739	1542	__ jcc(Assembler::equal, return_min_jlong);
never@739	1543	#else
duke@435	1544	__ sahf();
duke@435	1545	__ jcc(Assembler::above, return_min_jlong);
never@739	1546	#endif // _LP64
duke@435	1547	// return max_jlong
never@739	1548	#ifndef _LP64
duke@435	1549	__ movl(rdx, 0x7fffffff);
duke@435	1550	__ movl(rax, 0xffffffff);
never@739	1551	#else
never@739	1552	__ mov64(rax, CONST64(0x7fffffffffffffff));
never@739	1553	#endif // _LP64
duke@435	1554	__ jmp(do_return);
duke@435	1555
duke@435	1556	__ bind(return_min_jlong);
never@739	1557	#ifndef _LP64
duke@435	1558	__ movl(rdx, 0x80000000);
duke@435	1559	__ xorl(rax, rax);
never@739	1560	#else
never@739	1561	__ mov64(rax, CONST64(0x8000000000000000));
never@739	1562	#endif // _LP64
duke@435	1563	__ jmp(do_return);
duke@435	1564
duke@435	1565	__ bind(return0);
duke@435	1566	__ fpop();
never@739	1567	#ifndef _LP64
never@739	1568	__ xorptr(rdx,rdx);
never@739	1569	__ xorptr(rax,rax);
never@739	1570	#else
never@739	1571	__ xorptr(rax, rax);
never@739	1572	#endif // _LP64
duke@435	1573
duke@435	1574	__ bind(do_return);
never@739	1575	__ addptr(rsp, 32);
never@739	1576	LP64_ONLY(__ pop(rdx);)
never@739	1577	__ pop(rcx);
never@739	1578	__ pop(rsi);
duke@435	1579	__ ret(0);
duke@435	1580	}
duke@435	1581	break;
duke@435	1582
ysr@777	1583	#ifndef SERIALGC
ysr@777	1584	case g1_pre_barrier_slow_id:
ysr@777	1585	{
ysr@777	1586	StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments);
ysr@777	1587	// arg0 : previous value of memory
ysr@777	1588
ysr@777	1589	BarrierSet* bs = Universe::heap()->barrier_set();
ysr@777	1590	if (bs->kind() != BarrierSet::G1SATBCTLogging) {
apetrusenko@797	1591	__ movptr(rax, (int)id);
ysr@777	1592	__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
ysr@777	1593	__ should_not_reach_here();
ysr@777	1594	break;
ysr@777	1595	}
apetrusenko@797	1596	__ push(rax);
apetrusenko@797	1597	__ push(rdx);
ysr@777	1598
ysr@777	1599	const Register pre_val = rax;
apetrusenko@797	1600	const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
ysr@777	1601	const Register tmp = rdx;
ysr@777	1602
apetrusenko@797	1603	NOT_LP64(__ get_thread(thread);)
ysr@777	1604
ysr@777	1605	Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777	1606	PtrQueue::byte_offset_of_active()));
ysr@777	1607
ysr@777	1608	Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777	1609	PtrQueue::byte_offset_of_index()));
ysr@777	1610	Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@777	1611	PtrQueue::byte_offset_of_buf()));
ysr@777	1612
ysr@777	1613
ysr@777	1614	Label done;
ysr@777	1615	Label runtime;
ysr@777	1616
ysr@777	1617	// Can we store original value in the thread's buffer?
ysr@777	1618
apetrusenko@797	1619	#ifdef _LP64
iveresov@1927	1620	__ movslq(tmp, queue_index);
apetrusenko@797	1621	__ cmpq(tmp, 0);
apetrusenko@797	1622	#else
ysr@777	1623	__ cmpl(queue_index, 0);
apetrusenko@797	1624	#endif
ysr@777	1625	__ jcc(Assembler::equal, runtime);
apetrusenko@797	1626	#ifdef _LP64
apetrusenko@797	1627	__ subq(tmp, wordSize);
apetrusenko@797	1628	__ movl(queue_index, tmp);
apetrusenko@797	1629	__ addq(tmp, buffer);
apetrusenko@797	1630	#else
ysr@777	1631	__ subl(queue_index, wordSize);
ysr@777	1632	__ movl(tmp, buffer);
ysr@777	1633	__ addl(tmp, queue_index);
apetrusenko@797	1634	#endif
apetrusenko@797	1635
ysr@777	1636	// prev_val (rax)
ysr@777	1637	f.load_argument(0, pre_val);
apetrusenko@797	1638	__ movptr(Address(tmp, 0), pre_val);
ysr@777	1639	__ jmp(done);
ysr@777	1640
ysr@777	1641	__ bind(runtime);
iveresov@1927	1642	__ push(rcx);
iveresov@1927	1643	#ifdef _LP64
iveresov@1927	1644	__ push(r8);
iveresov@1927	1645	__ push(r9);
iveresov@1927	1646	__ push(r10);
iveresov@1927	1647	__ push(r11);
iveresov@1927	1648	# ifndef _WIN64
iveresov@1927	1649	__ push(rdi);
iveresov@1927	1650	__ push(rsi);
iveresov@1927	1651	# endif
iveresov@1927	1652	#endif
ysr@777	1653	// load the pre-value
ysr@777	1654	f.load_argument(0, rcx);
ysr@777	1655	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread);
iveresov@1927	1656	#ifdef _LP64
iveresov@1927	1657	# ifndef _WIN64
iveresov@1927	1658	__ pop(rsi);
iveresov@1927	1659	__ pop(rdi);
iveresov@1927	1660	# endif
iveresov@1927	1661	__ pop(r11);
iveresov@1927	1662	__ pop(r10);
iveresov@1927	1663	__ pop(r9);
iveresov@1927	1664	__ pop(r8);
iveresov@1927	1665	#endif
apetrusenko@797	1666	__ pop(rcx);
iveresov@1927	1667	__ bind(done);
ysr@777	1668
apetrusenko@797	1669	__ pop(rdx);
apetrusenko@797	1670	__ pop(rax);
ysr@777	1671	}
ysr@777	1672	break;
ysr@777	1673
ysr@777	1674	case g1_post_barrier_slow_id:
ysr@777	1675	{
ysr@777	1676	StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments);
ysr@777	1677
ysr@777	1678
ysr@777	1679	// arg0: store_address
ysr@777	1680	Address store_addr(rbp, 2*BytesPerWord);
ysr@777	1681
ysr@777	1682	BarrierSet* bs = Universe::heap()->barrier_set();
ysr@777	1683	CardTableModRefBS* ct = (CardTableModRefBS*)bs;
ysr@777	1684	Label done;
ysr@777	1685	Label runtime;
ysr@777	1686
ysr@777	1687	// At this point we know new_value is non-NULL and the new_value crosses regsion.
ysr@777	1688	// Must check to see if card is already dirty
ysr@777	1689
apetrusenko@797	1690	const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
ysr@777	1691
ysr@777	1692	Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@777	1693	PtrQueue::byte_offset_of_index()));
ysr@777	1694	Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@777	1695	PtrQueue::byte_offset_of_buf()));
ysr@777	1696
apetrusenko@797	1697	__ push(rax);
iveresov@1927	1698	__ push(rcx);
ysr@777	1699
apetrusenko@797	1700	NOT_LP64(__ get_thread(thread);)
apetrusenko@797	1701	ExternalAddress cardtable((address)ct->byte_map_base);
ysr@777	1702	assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
ysr@777	1703
iveresov@1927	1704	const Register card_addr = rcx;
apetrusenko@797	1705	#ifdef _LP64
apetrusenko@797	1706	const Register tmp = rscratch1;
apetrusenko@797	1707	f.load_argument(0, card_addr);
apetrusenko@797	1708	__ shrq(card_addr, CardTableModRefBS::card_shift);
apetrusenko@797	1709	__ lea(tmp, cardtable);
apetrusenko@797	1710	// get the address of the card
apetrusenko@797	1711	__ addq(card_addr, tmp);
apetrusenko@797	1712	#else
iveresov@1927	1713	const Register card_index = rcx;
apetrusenko@797	1714	f.load_argument(0, card_index);
apetrusenko@797	1715	__ shrl(card_index, CardTableModRefBS::card_shift);
apetrusenko@797	1716
ysr@777	1717	Address index(noreg, card_index, Address::times_1);
ysr@777	1718	__ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index)));
apetrusenko@797	1719	#endif
apetrusenko@797	1720
ysr@777	1721	__ cmpb(Address(card_addr, 0), 0);
ysr@777	1722	__ jcc(Assembler::equal, done);
ysr@777	1723
ysr@777	1724	// storing region crossing non-NULL, card is clean.
ysr@777	1725	// dirty card and log.
ysr@777	1726
ysr@777	1727	__ movb(Address(card_addr, 0), 0);
ysr@777	1728
ysr@777	1729	__ cmpl(queue_index, 0);
ysr@777	1730	__ jcc(Assembler::equal, runtime);
ysr@777	1731	__ subl(queue_index, wordSize);
ysr@777	1732
ysr@777	1733	const Register buffer_addr = rbx;
apetrusenko@797	1734	__ push(rbx);
ysr@777	1735
apetrusenko@797	1736	__ movptr(buffer_addr, buffer);
apetrusenko@797	1737
apetrusenko@797	1738	#ifdef _LP64
apetrusenko@797	1739	__ movslq(rscratch1, queue_index);
apetrusenko@797	1740	__ addptr(buffer_addr, rscratch1);
apetrusenko@797	1741	#else
apetrusenko@797	1742	__ addptr(buffer_addr, queue_index);
apetrusenko@797	1743	#endif
apetrusenko@797	1744	__ movptr(Address(buffer_addr, 0), card_addr);
apetrusenko@797	1745
apetrusenko@797	1746	__ pop(rbx);
ysr@777	1747	__ jmp(done);
ysr@777	1748
ysr@777	1749	__ bind(runtime);
iveresov@1927	1750	__ push(rdx);
iveresov@1927	1751	#ifdef _LP64
iveresov@1927	1752	__ push(r8);
iveresov@1927	1753	__ push(r9);
iveresov@1927	1754	__ push(r10);
iveresov@1927	1755	__ push(r11);
iveresov@1927	1756	# ifndef _WIN64
iveresov@1927	1757	__ push(rdi);
iveresov@1927	1758	__ push(rsi);
iveresov@1927	1759	# endif
iveresov@1927	1760	#endif
ysr@777	1761	__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
iveresov@1927	1762	#ifdef _LP64
iveresov@1927	1763	# ifndef _WIN64
iveresov@1927	1764	__ pop(rsi);
iveresov@1927	1765	__ pop(rdi);
iveresov@1927	1766	# endif
iveresov@1927	1767	__ pop(r11);
iveresov@1927	1768	__ pop(r10);
iveresov@1927	1769	__ pop(r9);
iveresov@1927	1770	__ pop(r8);
iveresov@1927	1771	#endif
iveresov@1927	1772	__ pop(rdx);
iveresov@1927	1773	__ bind(done);
ysr@777	1774
iveresov@1927	1775	__ pop(rcx);
apetrusenko@797	1776	__ pop(rax);
ysr@777	1777
ysr@777	1778	}
ysr@777	1779	break;
ysr@777	1780	#endif // !SERIALGC
ysr@777	1781
duke@435	1782	default:
duke@435	1783	{ StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
never@739	1784	__ movptr(rax, (int)id);
duke@435	1785	__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
duke@435	1786	__ should_not_reach_here();
duke@435	1787	}
duke@435	1788	break;
duke@435	1789	}
duke@435	1790	return oop_maps;
duke@435	1791	}
duke@435	1792
duke@435	1793	#undef __
bobv@2036	1794
bobv@2036	1795	const char *Runtime1::pd_name_for_address(address entry) {
bobv@2036	1796	return "<unknown function>";
bobv@2036	1797	}