411 void MacroAssembler::atomic_inc32(address counter_addr, int inc, Register tmp_reg1, Register tmp_reg2) { |
411 void MacroAssembler::atomic_inc32(address counter_addr, int inc, Register tmp_reg1, Register tmp_reg2) { |
412 Label again; |
412 Label again; |
413 |
413 |
414 li(tmp_reg1, counter_addr); |
414 li(tmp_reg1, counter_addr); |
415 bind(again); |
415 bind(again); |
416 if(!Use3A2000) sync(); |
416 if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync(); |
417 ll(tmp_reg2, tmp_reg1, 0); |
417 ll(tmp_reg2, tmp_reg1, 0); |
418 addi(tmp_reg2, tmp_reg2, inc); |
418 addi(tmp_reg2, tmp_reg2, inc); |
419 sc(tmp_reg2, tmp_reg1, 0); |
419 sc(tmp_reg2, tmp_reg1, 0); |
420 beq(tmp_reg2, R0, again); |
420 beq(tmp_reg2, R0, again); |
421 delayed()->nop(); |
421 delayed()->nop(); |
2576 /* 2012/11/11 Jin: MIPS64 can use ll/sc for 32-bit atomic memory access */ |
2576 /* 2012/11/11 Jin: MIPS64 can use ll/sc for 32-bit atomic memory access */ |
2577 Label done, again, nequal; |
2577 Label done, again, nequal; |
2578 |
2578 |
2579 bind(again); |
2579 bind(again); |
2580 |
2580 |
2581 if(!Use3A2000) sync(); |
2581 if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync(); |
2582 ll(AT, dest); |
2582 ll(AT, dest); |
2583 bne(AT, c_reg, nequal); |
2583 bne(AT, c_reg, nequal); |
2584 delayed()->nop(); |
2584 delayed()->nop(); |
2585 |
2585 |
2586 move(AT, x_reg); |
2586 move(AT, x_reg); |
2602 |
2602 |
2603 void MacroAssembler::cmpxchg(Register x_reg, Address dest, Register c_reg) { |
2603 void MacroAssembler::cmpxchg(Register x_reg, Address dest, Register c_reg) { |
2604 Label done, again, nequal; |
2604 Label done, again, nequal; |
2605 |
2605 |
2606 bind(again); |
2606 bind(again); |
|
2607 if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync(); |
2607 #ifdef _LP64 |
2608 #ifdef _LP64 |
2608 if(!Use3A2000) sync(); |
|
2609 lld(AT, dest); |
2609 lld(AT, dest); |
2610 #else |
2610 #else |
2611 if(!Use3A2000) sync(); |
|
2612 ll(AT, dest); |
2611 ll(AT, dest); |
2613 #endif |
2612 #endif |
2614 bne(AT, c_reg, nequal); |
2613 bne(AT, c_reg, nequal); |
2615 delayed()->nop(); |
2614 delayed()->nop(); |
2616 |
2615 |
2649 dsrl32(c_regLo, c_regLo, 0); |
2648 dsrl32(c_regLo, c_regLo, 0); |
2650 orr(c_reg, c_regLo, c_regHi); |
2649 orr(c_reg, c_regLo, c_regHi); |
2651 |
2650 |
2652 bind(again); |
2651 bind(again); |
2653 |
2652 |
2654 if(!Use3A2000) sync(); |
2653 if(UseSyncLevel >= 3000 || UseSyncLevel < 2000) sync(); |
2655 lld(AT, dest); |
2654 lld(AT, dest); |
2656 bne(AT, c_reg, nequal); |
2655 bne(AT, c_reg, nequal); |
2657 delayed()->nop(); |
2656 delayed()->nop(); |
2658 |
2657 |
2659 //move(AT, x_reg); |
2658 //move(AT, x_reg); |