1.1 --- a/src/cpu/mips/vm/disassembler_mips.cpp Sun Feb 19 17:42:22 2017 +0800 1.2 +++ b/src/cpu/mips/vm/disassembler_mips.cpp Sat Feb 18 18:25:01 2017 -0500 1.3 @@ -318,13 +318,41 @@ 1.4 special = Assembler::special(insn); 1.5 switch(special) { 1.6 case Assembler::sll_op: 1.7 + PRINT_ORRS(Assembler::special_name[special]); 1.8 + break; 1.9 case Assembler::srl_op: 1.10 + if (insn & (1 << 21)) { 1.11 + PRINT_ORRS("rotr"); 1.12 + } else { 1.13 + PRINT_ORRS(Assembler::special_name[special]); 1.14 + } 1.15 + break; 1.16 case Assembler::sra_op: 1.17 + PRINT_ORRS(Assembler::special_name[special]); 1.18 + break; 1.19 case Assembler::dsll_op: 1.20 + PRINT_ORRS(Assembler::special_name[special]); 1.21 + break; 1.22 case Assembler::dsrl_op: 1.23 + if (insn & (1 << 21)) { 1.24 + PRINT_ORRS("drotr"); 1.25 + } else { 1.26 + PRINT_ORRS(Assembler::special_name[special]); 1.27 + } 1.28 + break; 1.29 case Assembler::dsra_op: 1.30 + PRINT_ORRS(Assembler::special_name[special]); 1.31 + break; 1.32 case Assembler::dsll32_op: 1.33 + PRINT_ORRS(Assembler::special_name[special]); 1.34 + break; 1.35 case Assembler::dsrl32_op: 1.36 + if (insn & (1 << 21)) { 1.37 + PRINT_ORRS("drotr32"); 1.38 + } else { 1.39 + PRINT_ORRS(Assembler::special_name[special]); 1.40 + } 1.41 + break; 1.42 case Assembler::dsra32_op: 1.43 PRINT_ORRS(Assembler::special_name[special]); 1.44 break; 1.45 @@ -339,10 +367,28 @@ 1.46 break; 1.47 1.48 case Assembler::sllv_op: 1.49 + PRINT_ORRR_2(Assembler::special_name[special]); 1.50 + break; 1.51 case Assembler::srlv_op: 1.52 + if (insn & (1 << 6)) { 1.53 + PRINT_ORRR_2("rotrv"); 1.54 + } else { 1.55 + PRINT_ORRR_2(Assembler::special_name[special]); 1.56 + } 1.57 + break; 1.58 case Assembler::srav_op: 1.59 + PRINT_ORRR_2(Assembler::special_name[special]); 1.60 + break; 1.61 case Assembler::dsllv_op: 1.62 + PRINT_ORRR_2(Assembler::special_name[special]); 1.63 + break; 1.64 case Assembler::dsrlv_op: 1.65 + if (insn & (1 << 6)) { 1.66 + PRINT_ORRR_2("drotrv"); 1.67 + } else { 1.68 + PRINT_ORRR_2(Assembler::special_name[special]); 1.69 + } 1.70 + break; 1.71 case Assembler::dsrav_op: 1.72 PRINT_ORRR_2(Assembler::special_name[special]); 1.73 break;