316 |
316 |
317 case Assembler::special_op: { |
317 case Assembler::special_op: { |
318 special = Assembler::special(insn); |
318 special = Assembler::special(insn); |
319 switch(special) { |
319 switch(special) { |
320 case Assembler::sll_op: |
320 case Assembler::sll_op: |
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321 PRINT_ORRS(Assembler::special_name[special]); |
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322 break; |
321 case Assembler::srl_op: |
323 case Assembler::srl_op: |
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324 if (insn & (1 << 21)) { |
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325 PRINT_ORRS("rotr"); |
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326 } else { |
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327 PRINT_ORRS(Assembler::special_name[special]); |
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328 } |
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329 break; |
322 case Assembler::sra_op: |
330 case Assembler::sra_op: |
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331 PRINT_ORRS(Assembler::special_name[special]); |
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332 break; |
323 case Assembler::dsll_op: |
333 case Assembler::dsll_op: |
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334 PRINT_ORRS(Assembler::special_name[special]); |
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335 break; |
324 case Assembler::dsrl_op: |
336 case Assembler::dsrl_op: |
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337 if (insn & (1 << 21)) { |
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338 PRINT_ORRS("drotr"); |
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339 } else { |
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340 PRINT_ORRS(Assembler::special_name[special]); |
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341 } |
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342 break; |
325 case Assembler::dsra_op: |
343 case Assembler::dsra_op: |
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344 PRINT_ORRS(Assembler::special_name[special]); |
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345 break; |
326 case Assembler::dsll32_op: |
346 case Assembler::dsll32_op: |
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347 PRINT_ORRS(Assembler::special_name[special]); |
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348 break; |
327 case Assembler::dsrl32_op: |
349 case Assembler::dsrl32_op: |
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350 if (insn & (1 << 21)) { |
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351 PRINT_ORRS("drotr32"); |
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352 } else { |
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353 PRINT_ORRS(Assembler::special_name[special]); |
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354 } |
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355 break; |
328 case Assembler::dsra32_op: |
356 case Assembler::dsra32_op: |
329 PRINT_ORRS(Assembler::special_name[special]); |
357 PRINT_ORRS(Assembler::special_name[special]); |
330 break; |
358 break; |
331 |
359 |
332 case Assembler::movci_op: |
360 case Assembler::movci_op: |
337 env->print("movf %s, %s", as_Register(Assembler::rd(insn))->name(), as_Register(Assembler::rs(insn))->name()); |
365 env->print("movf %s, %s", as_Register(Assembler::rd(insn))->name(), as_Register(Assembler::rs(insn))->name()); |
338 } |
366 } |
339 break; |
367 break; |
340 |
368 |
341 case Assembler::sllv_op: |
369 case Assembler::sllv_op: |
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370 PRINT_ORRR_2(Assembler::special_name[special]); |
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371 break; |
342 case Assembler::srlv_op: |
372 case Assembler::srlv_op: |
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373 if (insn & (1 << 6)) { |
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374 PRINT_ORRR_2("rotrv"); |
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375 } else { |
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376 PRINT_ORRR_2(Assembler::special_name[special]); |
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377 } |
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378 break; |
343 case Assembler::srav_op: |
379 case Assembler::srav_op: |
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380 PRINT_ORRR_2(Assembler::special_name[special]); |
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381 break; |
344 case Assembler::dsllv_op: |
382 case Assembler::dsllv_op: |
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383 PRINT_ORRR_2(Assembler::special_name[special]); |
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384 break; |
345 case Assembler::dsrlv_op: |
385 case Assembler::dsrlv_op: |
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386 if (insn & (1 << 6)) { |
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387 PRINT_ORRR_2("drotrv"); |
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388 } else { |
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389 PRINT_ORRR_2(Assembler::special_name[special]); |
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390 } |
|
391 break; |
346 case Assembler::dsrav_op: |
392 case Assembler::dsrav_op: |
347 PRINT_ORRR_2(Assembler::special_name[special]); |
393 PRINT_ORRR_2(Assembler::special_name[special]); |
348 break; |
394 break; |
349 |
395 |
350 case Assembler::jr_op: |
396 case Assembler::jr_op: |