284 if (!has_vis1()) // Drop to 0 if no VIS1 support |
284 if (!has_vis1()) // Drop to 0 if no VIS1 support |
285 UseVIS = 0; |
285 UseVIS = 0; |
286 |
286 |
287 // SPARC T4 and above should have support for AES instructions |
287 // SPARC T4 and above should have support for AES instructions |
288 if (has_aes()) { |
288 if (has_aes()) { |
289 if (UseVIS > 2) { // AES intrinsics use MOVxTOd/MOVdTOx which are VIS3 |
289 if (FLAG_IS_DEFAULT(UseAES)) { |
290 if (FLAG_IS_DEFAULT(UseAES)) { |
290 FLAG_SET_DEFAULT(UseAES, true); |
291 FLAG_SET_DEFAULT(UseAES, true); |
291 } |
292 } |
292 if (!UseAES) { |
293 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
293 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
294 FLAG_SET_DEFAULT(UseAESIntrinsics, true); |
294 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled."); |
295 } |
295 } |
296 // we disable both the AES flags if either of them is disabled on the command line |
296 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
297 if (!UseAES || !UseAESIntrinsics) { |
297 } else { |
298 FLAG_SET_DEFAULT(UseAES, false); |
298 // The AES intrinsic stubs require AES instruction support (of course) |
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299 // but also require VIS3 mode or higher for instructions it use. |
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300 if (UseVIS > 2) { |
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301 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
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302 FLAG_SET_DEFAULT(UseAESIntrinsics, true); |
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303 } |
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304 } else { |
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305 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
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306 warning("SPARC AES intrinsics require VIS3 instructions. Intrinsics will be disabled."); |
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307 } |
299 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
308 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
300 } |
309 } |
301 } else { |
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302 if (UseAES || UseAESIntrinsics) { |
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303 warning("SPARC AES intrinsics require VIS3 instruction support. Intrinsics will be disabled."); |
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304 if (UseAES) { |
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305 FLAG_SET_DEFAULT(UseAES, false); |
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306 } |
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307 if (UseAESIntrinsics) { |
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308 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
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309 } |
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310 } |
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311 } |
310 } |
312 } else if (UseAES || UseAESIntrinsics) { |
311 } else if (UseAES || UseAESIntrinsics) { |
313 warning("AES instructions are not available on this CPU"); |
312 if (UseAES && !FLAG_IS_DEFAULT(UseAES)) { |
314 if (UseAES) { |
313 warning("AES instructions are not available on this CPU"); |
315 FLAG_SET_DEFAULT(UseAES, false); |
314 FLAG_SET_DEFAULT(UseAES, false); |
316 } |
315 } |
317 if (UseAESIntrinsics) { |
316 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
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317 warning("AES intrinsics are not available on this CPU"); |
318 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
318 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
319 } |
319 } |
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320 } |
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321 |
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322 // GHASH/GCM intrinsics |
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323 if (has_vis3() && (UseVIS > 2)) { |
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324 if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) { |
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325 UseGHASHIntrinsics = true; |
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326 } |
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327 } else if (UseGHASHIntrinsics) { |
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328 if (!FLAG_IS_DEFAULT(UseGHASHIntrinsics)) |
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329 warning("GHASH intrinsics require VIS3 insructions support. Intriniscs will be disabled"); |
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330 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); |
320 } |
331 } |
321 |
332 |
322 // SHA1, SHA256, and SHA512 instructions were added to SPARC T-series at different times |
333 // SHA1, SHA256, and SHA512 instructions were added to SPARC T-series at different times |
323 if (has_sha1() || has_sha256() || has_sha512()) { |
334 if (has_sha1() || has_sha256() || has_sha512()) { |
324 if (UseVIS > 0) { // SHA intrinsics use VIS1 instructions |
335 if (UseVIS > 0) { // SHA intrinsics use VIS1 instructions |