Mercurial > jdk8-mips64-public > hotspot / file comparison
comparison: src/cpu/sparc/vm/vm_version_sparc.cpp
src/cpu/sparc/vm/vm_version_sparc.cpp
- changeset 9795
- 9ef81b9152f1
- parent 9788
- 44ef77ad417c
- child 9806
- 758c07667682
equal
deleted
inserted
replaced
| 9794:31527d7b83e1 | 9795:9ef81b9152f1 |
|---|---|
| 284 if (!has_vis1()) // Drop to 0 if no VIS1 support | 284 if (!has_vis1()) // Drop to 0 if no VIS1 support |
| 285 UseVIS = 0; | 285 UseVIS = 0; |
| 286 | 286 |
| 287 // SPARC T4 and above should have support for AES instructions | 287 // SPARC T4 and above should have support for AES instructions |
| 288 if (has_aes()) { | 288 if (has_aes()) { |
| 289 if (UseVIS > 2) { // AES intrinsics use MOVxTOd/MOVdTOx which are VIS3 | 289 if (FLAG_IS_DEFAULT(UseAES)) { |
| 290 if (FLAG_IS_DEFAULT(UseAES)) { | 290 FLAG_SET_DEFAULT(UseAES, true); |
| 291 FLAG_SET_DEFAULT(UseAES, true); | 291 } |
| 292 } | 292 if (!UseAES) { |
| 293 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { | 293 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
| 294 FLAG_SET_DEFAULT(UseAESIntrinsics, true); | 294 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled."); |
| 295 } | 295 } |
| 296 // we disable both the AES flags if either of them is disabled on the command line | 296 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
| 297 if (!UseAES || !UseAESIntrinsics) { | 297 } else { |
| 298 FLAG_SET_DEFAULT(UseAES, false); | 298 // The AES intrinsic stubs require AES instruction support (of course) |
| 299 // but also require VIS3 mode or higher for instructions it use. | |
| 300 if (UseVIS > 2) { | |
| 301 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { | |
| 302 FLAG_SET_DEFAULT(UseAESIntrinsics, true); | |
| 303 } | |
| 304 } else { | |
| 305 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { | |
| 306 warning("SPARC AES intrinsics require VIS3 instructions. Intrinsics will be disabled."); | |
| 307 } | |
| 299 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | 308 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
| 300 } | 309 } |
| 301 } else { | |
| 302 if (UseAES || UseAESIntrinsics) { | |
| 303 warning("SPARC AES intrinsics require VIS3 instruction support. Intrinsics will be disabled."); | |
| 304 if (UseAES) { | |
| 305 FLAG_SET_DEFAULT(UseAES, false); | |
| 306 } | |
| 307 if (UseAESIntrinsics) { | |
| 308 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | |
| 309 } | |
| 310 } | |
| 311 } | 310 } |
| 312 } else if (UseAES || UseAESIntrinsics) { | 311 } else if (UseAES || UseAESIntrinsics) { |
| 313 warning("AES instructions are not available on this CPU"); | 312 if (UseAES && !FLAG_IS_DEFAULT(UseAES)) { |
| 314 if (UseAES) { | 313 warning("AES instructions are not available on this CPU"); |
| 315 FLAG_SET_DEFAULT(UseAES, false); | 314 FLAG_SET_DEFAULT(UseAES, false); |
| 316 } | 315 } |
| 317 if (UseAESIntrinsics) { | 316 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
| 317 warning("AES intrinsics are not available on this CPU"); | |
| 318 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | 318 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
| 319 } | 319 } |
| 320 } | 320 } |
| 321 | 321 |
| 322 // GHASH/GCM intrinsics | 322 // GHASH/GCM intrinsics |
