Wed, 18 Sep 2013 14:34:56 -0700
8024342: PPC64 (part 111): Support for C calling conventions that require 64-bit ints.
Summary: Some platforms, as ppc and s390x/zArch require that 32-bit ints are passed as 64-bit values to C functions. This change adds support to adapt the signature and to issue proper casts to c2-compiled stubs. The functions are used in generate_native_wrapper(). Adapt signature used by the compiler as in PhaseIdealLoop::intrinsify_fill().
Reviewed-by: kvn
duke@435 | 1 | /* |
drchase@5285 | 2 | * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #include "precompiled.hpp" |
stefank@2314 | 26 | #include "memory/allocation.inline.hpp" |
stefank@2314 | 27 | #include "opto/addnode.hpp" |
stefank@2314 | 28 | #include "opto/callnode.hpp" |
stefank@2314 | 29 | #include "opto/connode.hpp" |
stefank@2314 | 30 | #include "opto/idealGraphPrinter.hpp" |
stefank@2314 | 31 | #include "opto/matcher.hpp" |
stefank@2314 | 32 | #include "opto/memnode.hpp" |
stefank@2314 | 33 | #include "opto/opcodes.hpp" |
stefank@2314 | 34 | #include "opto/regmask.hpp" |
stefank@2314 | 35 | #include "opto/rootnode.hpp" |
stefank@2314 | 36 | #include "opto/runtime.hpp" |
stefank@2314 | 37 | #include "opto/type.hpp" |
kvn@3882 | 38 | #include "opto/vectornode.hpp" |
stefank@2314 | 39 | #include "runtime/atomic.hpp" |
stefank@2314 | 40 | #include "runtime/os.hpp" |
stefank@2314 | 41 | #ifdef TARGET_ARCH_MODEL_x86_32 |
stefank@2314 | 42 | # include "adfiles/ad_x86_32.hpp" |
stefank@2314 | 43 | #endif |
stefank@2314 | 44 | #ifdef TARGET_ARCH_MODEL_x86_64 |
stefank@2314 | 45 | # include "adfiles/ad_x86_64.hpp" |
stefank@2314 | 46 | #endif |
stefank@2314 | 47 | #ifdef TARGET_ARCH_MODEL_sparc |
stefank@2314 | 48 | # include "adfiles/ad_sparc.hpp" |
stefank@2314 | 49 | #endif |
stefank@2314 | 50 | #ifdef TARGET_ARCH_MODEL_zero |
stefank@2314 | 51 | # include "adfiles/ad_zero.hpp" |
stefank@2314 | 52 | #endif |
roland@2683 | 53 | #ifdef TARGET_ARCH_MODEL_arm |
roland@2683 | 54 | # include "adfiles/ad_arm.hpp" |
roland@2683 | 55 | #endif |
goetz@6441 | 56 | #ifdef TARGET_ARCH_MODEL_ppc_32 |
goetz@6441 | 57 | # include "adfiles/ad_ppc_32.hpp" |
goetz@6441 | 58 | #endif |
goetz@6441 | 59 | #ifdef TARGET_ARCH_MODEL_ppc_64 |
goetz@6441 | 60 | # include "adfiles/ad_ppc_64.hpp" |
jcoomes@2993 | 61 | #endif |
duke@435 | 62 | |
duke@435 | 63 | OptoReg::Name OptoReg::c_frame_pointer; |
duke@435 | 64 | |
duke@435 | 65 | const RegMask *Matcher::idealreg2regmask[_last_machine_leaf]; |
duke@435 | 66 | RegMask Matcher::mreg2regmask[_last_Mach_Reg]; |
duke@435 | 67 | RegMask Matcher::STACK_ONLY_mask; |
duke@435 | 68 | RegMask Matcher::c_frame_ptr_mask; |
duke@435 | 69 | const uint Matcher::_begin_rematerialize = _BEGIN_REMATERIALIZE; |
duke@435 | 70 | const uint Matcher::_end_rematerialize = _END_REMATERIALIZE; |
duke@435 | 71 | |
duke@435 | 72 | //---------------------------Matcher------------------------------------------- |
adlertz@5539 | 73 | Matcher::Matcher() |
adlertz@5539 | 74 | : PhaseTransform( Phase::Ins_Select ), |
duke@435 | 75 | #ifdef ASSERT |
duke@435 | 76 | _old2new_map(C->comp_arena()), |
never@657 | 77 | _new2old_map(C->comp_arena()), |
duke@435 | 78 | #endif |
kvn@603 | 79 | _shared_nodes(C->comp_arena()), |
duke@435 | 80 | _reduceOp(reduceOp), _leftOp(leftOp), _rightOp(rightOp), |
duke@435 | 81 | _swallowed(swallowed), |
duke@435 | 82 | _begin_inst_chain_rule(_BEGIN_INST_CHAIN_RULE), |
duke@435 | 83 | _end_inst_chain_rule(_END_INST_CHAIN_RULE), |
adlertz@5539 | 84 | _must_clone(must_clone), |
duke@435 | 85 | _register_save_policy(register_save_policy), |
duke@435 | 86 | _c_reg_save_policy(c_reg_save_policy), |
duke@435 | 87 | _register_save_type(register_save_type), |
duke@435 | 88 | _ruleName(ruleName), |
duke@435 | 89 | _allocation_started(false), |
duke@435 | 90 | _states_arena(Chunk::medium_size), |
duke@435 | 91 | _visited(&_states_arena), |
duke@435 | 92 | _shared(&_states_arena), |
duke@435 | 93 | _dontcare(&_states_arena) { |
duke@435 | 94 | C->set_matcher(this); |
duke@435 | 95 | |
twisti@1572 | 96 | idealreg2spillmask [Op_RegI] = NULL; |
twisti@1572 | 97 | idealreg2spillmask [Op_RegN] = NULL; |
twisti@1572 | 98 | idealreg2spillmask [Op_RegL] = NULL; |
twisti@1572 | 99 | idealreg2spillmask [Op_RegF] = NULL; |
twisti@1572 | 100 | idealreg2spillmask [Op_RegD] = NULL; |
twisti@1572 | 101 | idealreg2spillmask [Op_RegP] = NULL; |
kvn@3882 | 102 | idealreg2spillmask [Op_VecS] = NULL; |
kvn@3882 | 103 | idealreg2spillmask [Op_VecD] = NULL; |
kvn@3882 | 104 | idealreg2spillmask [Op_VecX] = NULL; |
kvn@3882 | 105 | idealreg2spillmask [Op_VecY] = NULL; |
duke@435 | 106 | |
twisti@1572 | 107 | idealreg2debugmask [Op_RegI] = NULL; |
twisti@1572 | 108 | idealreg2debugmask [Op_RegN] = NULL; |
twisti@1572 | 109 | idealreg2debugmask [Op_RegL] = NULL; |
twisti@1572 | 110 | idealreg2debugmask [Op_RegF] = NULL; |
twisti@1572 | 111 | idealreg2debugmask [Op_RegD] = NULL; |
twisti@1572 | 112 | idealreg2debugmask [Op_RegP] = NULL; |
kvn@3882 | 113 | idealreg2debugmask [Op_VecS] = NULL; |
kvn@3882 | 114 | idealreg2debugmask [Op_VecD] = NULL; |
kvn@3882 | 115 | idealreg2debugmask [Op_VecX] = NULL; |
kvn@3882 | 116 | idealreg2debugmask [Op_VecY] = NULL; |
twisti@1572 | 117 | |
twisti@1572 | 118 | idealreg2mhdebugmask[Op_RegI] = NULL; |
twisti@1572 | 119 | idealreg2mhdebugmask[Op_RegN] = NULL; |
twisti@1572 | 120 | idealreg2mhdebugmask[Op_RegL] = NULL; |
twisti@1572 | 121 | idealreg2mhdebugmask[Op_RegF] = NULL; |
twisti@1572 | 122 | idealreg2mhdebugmask[Op_RegD] = NULL; |
twisti@1572 | 123 | idealreg2mhdebugmask[Op_RegP] = NULL; |
kvn@3882 | 124 | idealreg2mhdebugmask[Op_VecS] = NULL; |
kvn@3882 | 125 | idealreg2mhdebugmask[Op_VecD] = NULL; |
kvn@3882 | 126 | idealreg2mhdebugmask[Op_VecX] = NULL; |
kvn@3882 | 127 | idealreg2mhdebugmask[Op_VecY] = NULL; |
twisti@1572 | 128 | |
kvn@651 | 129 | debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node |
duke@435 | 130 | } |
duke@435 | 131 | |
duke@435 | 132 | //------------------------------warp_incoming_stk_arg------------------------ |
duke@435 | 133 | // This warps a VMReg into an OptoReg::Name |
duke@435 | 134 | OptoReg::Name Matcher::warp_incoming_stk_arg( VMReg reg ) { |
duke@435 | 135 | OptoReg::Name warped; |
duke@435 | 136 | if( reg->is_stack() ) { // Stack slot argument? |
duke@435 | 137 | warped = OptoReg::add(_old_SP, reg->reg2stack() ); |
duke@435 | 138 | warped = OptoReg::add(warped, C->out_preserve_stack_slots()); |
duke@435 | 139 | if( warped >= _in_arg_limit ) |
duke@435 | 140 | _in_arg_limit = OptoReg::add(warped, 1); // Bump max stack slot seen |
kvn@3882 | 141 | if (!RegMask::can_represent_arg(warped)) { |
duke@435 | 142 | // the compiler cannot represent this method's calling sequence |
duke@435 | 143 | C->record_method_not_compilable_all_tiers("unsupported incoming calling sequence"); |
duke@435 | 144 | return OptoReg::Bad; |
duke@435 | 145 | } |
duke@435 | 146 | return warped; |
duke@435 | 147 | } |
duke@435 | 148 | return OptoReg::as_OptoReg(reg); |
duke@435 | 149 | } |
duke@435 | 150 | |
duke@435 | 151 | //---------------------------compute_old_SP------------------------------------ |
duke@435 | 152 | OptoReg::Name Compile::compute_old_SP() { |
duke@435 | 153 | int fixed = fixed_slots(); |
duke@435 | 154 | int preserve = in_preserve_stack_slots(); |
duke@435 | 155 | return OptoReg::stack2reg(round_to(fixed + preserve, Matcher::stack_alignment_in_slots())); |
duke@435 | 156 | } |
duke@435 | 157 | |
duke@435 | 158 | |
duke@435 | 159 | |
duke@435 | 160 | #ifdef ASSERT |
duke@435 | 161 | void Matcher::verify_new_nodes_only(Node* xroot) { |
duke@435 | 162 | // Make sure that the new graph only references new nodes |
duke@435 | 163 | ResourceMark rm; |
duke@435 | 164 | Unique_Node_List worklist; |
duke@435 | 165 | VectorSet visited(Thread::current()->resource_area()); |
duke@435 | 166 | worklist.push(xroot); |
duke@435 | 167 | while (worklist.size() > 0) { |
duke@435 | 168 | Node* n = worklist.pop(); |
duke@435 | 169 | visited <<= n->_idx; |
duke@435 | 170 | assert(C->node_arena()->contains(n), "dead node"); |
duke@435 | 171 | for (uint j = 0; j < n->req(); j++) { |
duke@435 | 172 | Node* in = n->in(j); |
duke@435 | 173 | if (in != NULL) { |
duke@435 | 174 | assert(C->node_arena()->contains(in), "dead node"); |
duke@435 | 175 | if (!visited.test(in->_idx)) { |
duke@435 | 176 | worklist.push(in); |
duke@435 | 177 | } |
duke@435 | 178 | } |
duke@435 | 179 | } |
duke@435 | 180 | } |
duke@435 | 181 | } |
duke@435 | 182 | #endif |
duke@435 | 183 | |
duke@435 | 184 | |
duke@435 | 185 | //---------------------------match--------------------------------------------- |
duke@435 | 186 | void Matcher::match( ) { |
kvn@1258 | 187 | if( MaxLabelRootDepth < 100 ) { // Too small? |
kvn@1258 | 188 | assert(false, "invalid MaxLabelRootDepth, increase it to 100 minimum"); |
kvn@1258 | 189 | MaxLabelRootDepth = 100; |
kvn@1258 | 190 | } |
duke@435 | 191 | // One-time initialization of some register masks. |
duke@435 | 192 | init_spill_mask( C->root()->in(1) ); |
duke@435 | 193 | _return_addr_mask = return_addr(); |
duke@435 | 194 | #ifdef _LP64 |
duke@435 | 195 | // Pointers take 2 slots in 64-bit land |
duke@435 | 196 | _return_addr_mask.Insert(OptoReg::add(return_addr(),1)); |
duke@435 | 197 | #endif |
duke@435 | 198 | |
duke@435 | 199 | // Map a Java-signature return type into return register-value |
duke@435 | 200 | // machine registers for 0, 1 and 2 returned values. |
duke@435 | 201 | const TypeTuple *range = C->tf()->range(); |
duke@435 | 202 | if( range->cnt() > TypeFunc::Parms ) { // If not a void function |
duke@435 | 203 | // Get ideal-register return type |
coleenp@4037 | 204 | int ireg = range->field_at(TypeFunc::Parms)->ideal_reg(); |
duke@435 | 205 | // Get machine return register |
duke@435 | 206 | uint sop = C->start()->Opcode(); |
duke@435 | 207 | OptoRegPair regs = return_value(ireg, false); |
duke@435 | 208 | |
duke@435 | 209 | // And mask for same |
duke@435 | 210 | _return_value_mask = RegMask(regs.first()); |
duke@435 | 211 | if( OptoReg::is_valid(regs.second()) ) |
duke@435 | 212 | _return_value_mask.Insert(regs.second()); |
duke@435 | 213 | } |
duke@435 | 214 | |
duke@435 | 215 | // --------------- |
duke@435 | 216 | // Frame Layout |
duke@435 | 217 | |
duke@435 | 218 | // Need the method signature to determine the incoming argument types, |
duke@435 | 219 | // because the types determine which registers the incoming arguments are |
duke@435 | 220 | // in, and this affects the matched code. |
duke@435 | 221 | const TypeTuple *domain = C->tf()->domain(); |
duke@435 | 222 | uint argcnt = domain->cnt() - TypeFunc::Parms; |
duke@435 | 223 | BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); |
duke@435 | 224 | VMRegPair *vm_parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); |
duke@435 | 225 | _parm_regs = NEW_RESOURCE_ARRAY( OptoRegPair, argcnt ); |
duke@435 | 226 | _calling_convention_mask = NEW_RESOURCE_ARRAY( RegMask, argcnt ); |
duke@435 | 227 | uint i; |
duke@435 | 228 | for( i = 0; i<argcnt; i++ ) { |
duke@435 | 229 | sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); |
duke@435 | 230 | } |
duke@435 | 231 | |
duke@435 | 232 | // Pass array of ideal registers and length to USER code (from the AD file) |
duke@435 | 233 | // that will convert this to an array of register numbers. |
duke@435 | 234 | const StartNode *start = C->start(); |
duke@435 | 235 | start->calling_convention( sig_bt, vm_parm_regs, argcnt ); |
duke@435 | 236 | #ifdef ASSERT |
duke@435 | 237 | // Sanity check users' calling convention. Real handy while trying to |
duke@435 | 238 | // get the initial port correct. |
duke@435 | 239 | { for (uint i = 0; i<argcnt; i++) { |
duke@435 | 240 | if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { |
duke@435 | 241 | assert(domain->field_at(i+TypeFunc::Parms)==Type::HALF, "only allowed on halve" ); |
duke@435 | 242 | _parm_regs[i].set_bad(); |
duke@435 | 243 | continue; |
duke@435 | 244 | } |
duke@435 | 245 | VMReg parm_reg = vm_parm_regs[i].first(); |
duke@435 | 246 | assert(parm_reg->is_valid(), "invalid arg?"); |
duke@435 | 247 | if (parm_reg->is_reg()) { |
duke@435 | 248 | OptoReg::Name opto_parm_reg = OptoReg::as_OptoReg(parm_reg); |
duke@435 | 249 | assert(can_be_java_arg(opto_parm_reg) || |
duke@435 | 250 | C->stub_function() == CAST_FROM_FN_PTR(address, OptoRuntime::rethrow_C) || |
duke@435 | 251 | opto_parm_reg == inline_cache_reg(), |
duke@435 | 252 | "parameters in register must be preserved by runtime stubs"); |
duke@435 | 253 | } |
duke@435 | 254 | for (uint j = 0; j < i; j++) { |
duke@435 | 255 | assert(parm_reg != vm_parm_regs[j].first(), |
duke@435 | 256 | "calling conv. must produce distinct regs"); |
duke@435 | 257 | } |
duke@435 | 258 | } |
duke@435 | 259 | } |
duke@435 | 260 | #endif |
duke@435 | 261 | |
duke@435 | 262 | // Do some initial frame layout. |
duke@435 | 263 | |
duke@435 | 264 | // Compute the old incoming SP (may be called FP) as |
duke@435 | 265 | // OptoReg::stack0() + locks + in_preserve_stack_slots + pad2. |
duke@435 | 266 | _old_SP = C->compute_old_SP(); |
duke@435 | 267 | assert( is_even(_old_SP), "must be even" ); |
duke@435 | 268 | |
duke@435 | 269 | // Compute highest incoming stack argument as |
duke@435 | 270 | // _old_SP + out_preserve_stack_slots + incoming argument size. |
duke@435 | 271 | _in_arg_limit = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); |
duke@435 | 272 | assert( is_even(_in_arg_limit), "out_preserve must be even" ); |
duke@435 | 273 | for( i = 0; i < argcnt; i++ ) { |
duke@435 | 274 | // Permit args to have no register |
duke@435 | 275 | _calling_convention_mask[i].Clear(); |
duke@435 | 276 | if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { |
duke@435 | 277 | continue; |
duke@435 | 278 | } |
duke@435 | 279 | // calling_convention returns stack arguments as a count of |
duke@435 | 280 | // slots beyond OptoReg::stack0()/VMRegImpl::stack0. We need to convert this to |
duke@435 | 281 | // the allocators point of view, taking into account all the |
duke@435 | 282 | // preserve area, locks & pad2. |
duke@435 | 283 | |
duke@435 | 284 | OptoReg::Name reg1 = warp_incoming_stk_arg(vm_parm_regs[i].first()); |
duke@435 | 285 | if( OptoReg::is_valid(reg1)) |
duke@435 | 286 | _calling_convention_mask[i].Insert(reg1); |
duke@435 | 287 | |
duke@435 | 288 | OptoReg::Name reg2 = warp_incoming_stk_arg(vm_parm_regs[i].second()); |
duke@435 | 289 | if( OptoReg::is_valid(reg2)) |
duke@435 | 290 | _calling_convention_mask[i].Insert(reg2); |
duke@435 | 291 | |
duke@435 | 292 | // Saved biased stack-slot register number |
duke@435 | 293 | _parm_regs[i].set_pair(reg2, reg1); |
duke@435 | 294 | } |
duke@435 | 295 | |
duke@435 | 296 | // Finally, make sure the incoming arguments take up an even number of |
duke@435 | 297 | // words, in case the arguments or locals need to contain doubleword stack |
duke@435 | 298 | // slots. The rest of the system assumes that stack slot pairs (in |
duke@435 | 299 | // particular, in the spill area) which look aligned will in fact be |
duke@435 | 300 | // aligned relative to the stack pointer in the target machine. Double |
duke@435 | 301 | // stack slots will always be allocated aligned. |
duke@435 | 302 | _new_SP = OptoReg::Name(round_to(_in_arg_limit, RegMask::SlotsPerLong)); |
duke@435 | 303 | |
duke@435 | 304 | // Compute highest outgoing stack argument as |
duke@435 | 305 | // _new_SP + out_preserve_stack_slots + max(outgoing argument size). |
duke@435 | 306 | _out_arg_limit = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); |
duke@435 | 307 | assert( is_even(_out_arg_limit), "out_preserve must be even" ); |
duke@435 | 308 | |
kvn@3882 | 309 | if (!RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1))) { |
duke@435 | 310 | // the compiler cannot represent this method's calling sequence |
duke@435 | 311 | C->record_method_not_compilable("must be able to represent all call arguments in reg mask"); |
duke@435 | 312 | } |
duke@435 | 313 | |
duke@435 | 314 | if (C->failing()) return; // bailed out on incoming arg failure |
duke@435 | 315 | |
duke@435 | 316 | // --------------- |
duke@435 | 317 | // Collect roots of matcher trees. Every node for which |
duke@435 | 318 | // _shared[_idx] is cleared is guaranteed to not be shared, and thus |
duke@435 | 319 | // can be a valid interior of some tree. |
duke@435 | 320 | find_shared( C->root() ); |
duke@435 | 321 | find_shared( C->top() ); |
duke@435 | 322 | |
sla@5237 | 323 | C->print_method(PHASE_BEFORE_MATCHING); |
duke@435 | 324 | |
kvn@1164 | 325 | // Create new ideal node ConP #NULL even if it does exist in old space |
kvn@1164 | 326 | // to avoid false sharing if the corresponding mach node is not used. |
kvn@1164 | 327 | // The corresponding mach node is only used in rare cases for derived |
kvn@1164 | 328 | // pointers. |
kvn@1164 | 329 | Node* new_ideal_null = ConNode::make(C, TypePtr::NULL_PTR); |
kvn@1164 | 330 | |
duke@435 | 331 | // Swap out to old-space; emptying new-space |
duke@435 | 332 | Arena *old = C->node_arena()->move_contents(C->old_arena()); |
duke@435 | 333 | |
duke@435 | 334 | // Save debug and profile information for nodes in old space: |
duke@435 | 335 | _old_node_note_array = C->node_note_array(); |
duke@435 | 336 | if (_old_node_note_array != NULL) { |
duke@435 | 337 | C->set_node_note_array(new(C->comp_arena()) GrowableArray<Node_Notes*> |
duke@435 | 338 | (C->comp_arena(), _old_node_note_array->length(), |
duke@435 | 339 | 0, NULL)); |
duke@435 | 340 | } |
duke@435 | 341 | |
duke@435 | 342 | // Pre-size the new_node table to avoid the need for range checks. |
duke@435 | 343 | grow_new_node_array(C->unique()); |
duke@435 | 344 | |
duke@435 | 345 | // Reset node counter so MachNodes start with _idx at 0 |
duke@435 | 346 | int nodes = C->unique(); // save value |
duke@435 | 347 | C->set_unique(0); |
bharadwaj@4315 | 348 | C->reset_dead_node_list(); |
duke@435 | 349 | |
duke@435 | 350 | // Recursively match trees from old space into new space. |
duke@435 | 351 | // Correct leaves of new-space Nodes; they point to old-space. |
duke@435 | 352 | _visited.Clear(); // Clear visit bits for xform call |
duke@435 | 353 | C->set_cached_top_node(xform( C->top(), nodes )); |
duke@435 | 354 | if (!C->failing()) { |
duke@435 | 355 | Node* xroot = xform( C->root(), 1 ); |
duke@435 | 356 | if (xroot == NULL) { |
duke@435 | 357 | Matcher::soft_match_failure(); // recursive matching process failed |
duke@435 | 358 | C->record_method_not_compilable("instruction match failed"); |
duke@435 | 359 | } else { |
duke@435 | 360 | // During matching shared constants were attached to C->root() |
duke@435 | 361 | // because xroot wasn't available yet, so transfer the uses to |
duke@435 | 362 | // the xroot. |
duke@435 | 363 | for( DUIterator_Fast jmax, j = C->root()->fast_outs(jmax); j < jmax; j++ ) { |
duke@435 | 364 | Node* n = C->root()->fast_out(j); |
duke@435 | 365 | if (C->node_arena()->contains(n)) { |
duke@435 | 366 | assert(n->in(0) == C->root(), "should be control user"); |
duke@435 | 367 | n->set_req(0, xroot); |
duke@435 | 368 | --j; |
duke@435 | 369 | --jmax; |
duke@435 | 370 | } |
duke@435 | 371 | } |
duke@435 | 372 | |
kvn@1164 | 373 | // Generate new mach node for ConP #NULL |
kvn@1164 | 374 | assert(new_ideal_null != NULL, "sanity"); |
kvn@1164 | 375 | _mach_null = match_tree(new_ideal_null); |
kvn@1164 | 376 | // Don't set control, it will confuse GCM since there are no uses. |
kvn@1164 | 377 | // The control will be set when this node is used first time |
kvn@1164 | 378 | // in find_base_for_derived(). |
kvn@1164 | 379 | assert(_mach_null != NULL, ""); |
kvn@1164 | 380 | |
duke@435 | 381 | C->set_root(xroot->is_Root() ? xroot->as_Root() : NULL); |
kvn@1164 | 382 | |
duke@435 | 383 | #ifdef ASSERT |
duke@435 | 384 | verify_new_nodes_only(xroot); |
duke@435 | 385 | #endif |
duke@435 | 386 | } |
duke@435 | 387 | } |
duke@435 | 388 | if (C->top() == NULL || C->root() == NULL) { |
duke@435 | 389 | C->record_method_not_compilable("graph lost"); // %%% cannot happen? |
duke@435 | 390 | } |
duke@435 | 391 | if (C->failing()) { |
duke@435 | 392 | // delete old; |
duke@435 | 393 | old->destruct_contents(); |
duke@435 | 394 | return; |
duke@435 | 395 | } |
duke@435 | 396 | assert( C->top(), "" ); |
duke@435 | 397 | assert( C->root(), "" ); |
duke@435 | 398 | validate_null_checks(); |
duke@435 | 399 | |
duke@435 | 400 | // Now smoke old-space |
duke@435 | 401 | NOT_DEBUG( old->destruct_contents() ); |
duke@435 | 402 | |
duke@435 | 403 | // ------------------------ |
duke@435 | 404 | // Set up save-on-entry registers |
duke@435 | 405 | Fixup_Save_On_Entry( ); |
duke@435 | 406 | } |
duke@435 | 407 | |
duke@435 | 408 | |
duke@435 | 409 | //------------------------------Fixup_Save_On_Entry---------------------------- |
duke@435 | 410 | // The stated purpose of this routine is to take care of save-on-entry |
duke@435 | 411 | // registers. However, the overall goal of the Match phase is to convert into |
duke@435 | 412 | // machine-specific instructions which have RegMasks to guide allocation. |
duke@435 | 413 | // So what this procedure really does is put a valid RegMask on each input |
duke@435 | 414 | // to the machine-specific variations of all Return, TailCall and Halt |
duke@435 | 415 | // instructions. It also adds edgs to define the save-on-entry values (and of |
duke@435 | 416 | // course gives them a mask). |
duke@435 | 417 | |
duke@435 | 418 | static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { |
duke@435 | 419 | RegMask *rms = NEW_RESOURCE_ARRAY( RegMask, size ); |
duke@435 | 420 | // Do all the pre-defined register masks |
duke@435 | 421 | rms[TypeFunc::Control ] = RegMask::Empty; |
duke@435 | 422 | rms[TypeFunc::I_O ] = RegMask::Empty; |
duke@435 | 423 | rms[TypeFunc::Memory ] = RegMask::Empty; |
duke@435 | 424 | rms[TypeFunc::ReturnAdr] = ret_adr; |
duke@435 | 425 | rms[TypeFunc::FramePtr ] = fp; |
duke@435 | 426 | return rms; |
duke@435 | 427 | } |
duke@435 | 428 | |
duke@435 | 429 | //---------------------------init_first_stack_mask----------------------------- |
duke@435 | 430 | // Create the initial stack mask used by values spilling to the stack. |
duke@435 | 431 | // Disallow any debug info in outgoing argument areas by setting the |
duke@435 | 432 | // initial mask accordingly. |
duke@435 | 433 | void Matcher::init_first_stack_mask() { |
duke@435 | 434 | |
duke@435 | 435 | // Allocate storage for spill masks as masks for the appropriate load type. |
kvn@3882 | 436 | RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask) * (3*6+4)); |
twisti@1572 | 437 | |
twisti@1572 | 438 | idealreg2spillmask [Op_RegN] = &rms[0]; |
twisti@1572 | 439 | idealreg2spillmask [Op_RegI] = &rms[1]; |
twisti@1572 | 440 | idealreg2spillmask [Op_RegL] = &rms[2]; |
twisti@1572 | 441 | idealreg2spillmask [Op_RegF] = &rms[3]; |
twisti@1572 | 442 | idealreg2spillmask [Op_RegD] = &rms[4]; |
twisti@1572 | 443 | idealreg2spillmask [Op_RegP] = &rms[5]; |
twisti@1572 | 444 | |
twisti@1572 | 445 | idealreg2debugmask [Op_RegN] = &rms[6]; |
twisti@1572 | 446 | idealreg2debugmask [Op_RegI] = &rms[7]; |
twisti@1572 | 447 | idealreg2debugmask [Op_RegL] = &rms[8]; |
twisti@1572 | 448 | idealreg2debugmask [Op_RegF] = &rms[9]; |
twisti@1572 | 449 | idealreg2debugmask [Op_RegD] = &rms[10]; |
twisti@1572 | 450 | idealreg2debugmask [Op_RegP] = &rms[11]; |
twisti@1572 | 451 | |
twisti@1572 | 452 | idealreg2mhdebugmask[Op_RegN] = &rms[12]; |
twisti@1572 | 453 | idealreg2mhdebugmask[Op_RegI] = &rms[13]; |
twisti@1572 | 454 | idealreg2mhdebugmask[Op_RegL] = &rms[14]; |
twisti@1572 | 455 | idealreg2mhdebugmask[Op_RegF] = &rms[15]; |
twisti@1572 | 456 | idealreg2mhdebugmask[Op_RegD] = &rms[16]; |
twisti@1572 | 457 | idealreg2mhdebugmask[Op_RegP] = &rms[17]; |
duke@435 | 458 | |
kvn@3882 | 459 | idealreg2spillmask [Op_VecS] = &rms[18]; |
kvn@3882 | 460 | idealreg2spillmask [Op_VecD] = &rms[19]; |
kvn@3882 | 461 | idealreg2spillmask [Op_VecX] = &rms[20]; |
kvn@3882 | 462 | idealreg2spillmask [Op_VecY] = &rms[21]; |
kvn@3882 | 463 | |
duke@435 | 464 | OptoReg::Name i; |
duke@435 | 465 | |
duke@435 | 466 | // At first, start with the empty mask |
duke@435 | 467 | C->FIRST_STACK_mask().Clear(); |
duke@435 | 468 | |
duke@435 | 469 | // Add in the incoming argument area |
duke@435 | 470 | OptoReg::Name init = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); |
duke@435 | 471 | for (i = init; i < _in_arg_limit; i = OptoReg::add(i,1)) |
duke@435 | 472 | C->FIRST_STACK_mask().Insert(i); |
duke@435 | 473 | |
duke@435 | 474 | // Add in all bits past the outgoing argument area |
kvn@3882 | 475 | guarantee(RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1)), |
duke@435 | 476 | "must be able to represent all call arguments in reg mask"); |
duke@435 | 477 | init = _out_arg_limit; |
duke@435 | 478 | for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) |
duke@435 | 479 | C->FIRST_STACK_mask().Insert(i); |
duke@435 | 480 | |
duke@435 | 481 | // Finally, set the "infinite stack" bit. |
duke@435 | 482 | C->FIRST_STACK_mask().set_AllStack(); |
duke@435 | 483 | |
duke@435 | 484 | // Make spill masks. Registers for their class, plus FIRST_STACK_mask. |
kvn@3882 | 485 | RegMask aligned_stack_mask = C->FIRST_STACK_mask(); |
kvn@3882 | 486 | // Keep spill masks aligned. |
kvn@3882 | 487 | aligned_stack_mask.clear_to_pairs(); |
kvn@3882 | 488 | assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); |
kvn@3882 | 489 | |
kvn@3882 | 490 | *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; |
coleenp@548 | 491 | #ifdef _LP64 |
coleenp@548 | 492 | *idealreg2spillmask[Op_RegN] = *idealreg2regmask[Op_RegN]; |
coleenp@548 | 493 | idealreg2spillmask[Op_RegN]->OR(C->FIRST_STACK_mask()); |
kvn@3882 | 494 | idealreg2spillmask[Op_RegP]->OR(aligned_stack_mask); |
kvn@3882 | 495 | #else |
kvn@3882 | 496 | idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask()); |
coleenp@548 | 497 | #endif |
duke@435 | 498 | *idealreg2spillmask[Op_RegI] = *idealreg2regmask[Op_RegI]; |
duke@435 | 499 | idealreg2spillmask[Op_RegI]->OR(C->FIRST_STACK_mask()); |
duke@435 | 500 | *idealreg2spillmask[Op_RegL] = *idealreg2regmask[Op_RegL]; |
kvn@3882 | 501 | idealreg2spillmask[Op_RegL]->OR(aligned_stack_mask); |
duke@435 | 502 | *idealreg2spillmask[Op_RegF] = *idealreg2regmask[Op_RegF]; |
duke@435 | 503 | idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask()); |
duke@435 | 504 | *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD]; |
kvn@3882 | 505 | idealreg2spillmask[Op_RegD]->OR(aligned_stack_mask); |
duke@435 | 506 | |
kvn@3882 | 507 | if (Matcher::vector_size_supported(T_BYTE,4)) { |
kvn@3882 | 508 | *idealreg2spillmask[Op_VecS] = *idealreg2regmask[Op_VecS]; |
kvn@3882 | 509 | idealreg2spillmask[Op_VecS]->OR(C->FIRST_STACK_mask()); |
kvn@3882 | 510 | } |
kvn@3882 | 511 | if (Matcher::vector_size_supported(T_FLOAT,2)) { |
kvn@3882 | 512 | *idealreg2spillmask[Op_VecD] = *idealreg2regmask[Op_VecD]; |
kvn@3882 | 513 | idealreg2spillmask[Op_VecD]->OR(aligned_stack_mask); |
kvn@3882 | 514 | } |
kvn@3882 | 515 | if (Matcher::vector_size_supported(T_FLOAT,4)) { |
kvn@3882 | 516 | aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecX); |
kvn@3882 | 517 | assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); |
kvn@3882 | 518 | *idealreg2spillmask[Op_VecX] = *idealreg2regmask[Op_VecX]; |
kvn@3882 | 519 | idealreg2spillmask[Op_VecX]->OR(aligned_stack_mask); |
kvn@3882 | 520 | } |
kvn@3882 | 521 | if (Matcher::vector_size_supported(T_FLOAT,8)) { |
kvn@3882 | 522 | aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecY); |
kvn@3882 | 523 | assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); |
kvn@3882 | 524 | *idealreg2spillmask[Op_VecY] = *idealreg2regmask[Op_VecY]; |
kvn@3882 | 525 | idealreg2spillmask[Op_VecY]->OR(aligned_stack_mask); |
kvn@3882 | 526 | } |
never@2085 | 527 | if (UseFPUForSpilling) { |
never@2085 | 528 | // This mask logic assumes that the spill operations are |
never@2085 | 529 | // symmetric and that the registers involved are the same size. |
never@2085 | 530 | // On sparc for instance we may have to use 64 bit moves will |
never@2085 | 531 | // kill 2 registers when used with F0-F31. |
never@2085 | 532 | idealreg2spillmask[Op_RegI]->OR(*idealreg2regmask[Op_RegF]); |
never@2085 | 533 | idealreg2spillmask[Op_RegF]->OR(*idealreg2regmask[Op_RegI]); |
never@2085 | 534 | #ifdef _LP64 |
never@2085 | 535 | idealreg2spillmask[Op_RegN]->OR(*idealreg2regmask[Op_RegF]); |
never@2085 | 536 | idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]); |
never@2085 | 537 | idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]); |
never@2085 | 538 | idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegD]); |
never@2085 | 539 | #else |
never@2085 | 540 | idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegF]); |
roland@3109 | 541 | #ifdef ARM |
roland@3109 | 542 | // ARM has support for moving 64bit values between a pair of |
roland@3109 | 543 | // integer registers and a double register |
roland@3109 | 544 | idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]); |
roland@3109 | 545 | idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]); |
roland@3109 | 546 | #endif |
never@2085 | 547 | #endif |
never@2085 | 548 | } |
never@2085 | 549 | |
duke@435 | 550 | // Make up debug masks. Any spill slot plus callee-save registers. |
duke@435 | 551 | // Caller-save registers are assumed to be trashable by the various |
duke@435 | 552 | // inline-cache fixup routines. |
twisti@1572 | 553 | *idealreg2debugmask [Op_RegN]= *idealreg2spillmask[Op_RegN]; |
twisti@1572 | 554 | *idealreg2debugmask [Op_RegI]= *idealreg2spillmask[Op_RegI]; |
twisti@1572 | 555 | *idealreg2debugmask [Op_RegL]= *idealreg2spillmask[Op_RegL]; |
twisti@1572 | 556 | *idealreg2debugmask [Op_RegF]= *idealreg2spillmask[Op_RegF]; |
twisti@1572 | 557 | *idealreg2debugmask [Op_RegD]= *idealreg2spillmask[Op_RegD]; |
twisti@1572 | 558 | *idealreg2debugmask [Op_RegP]= *idealreg2spillmask[Op_RegP]; |
twisti@1572 | 559 | |
twisti@1572 | 560 | *idealreg2mhdebugmask[Op_RegN]= *idealreg2spillmask[Op_RegN]; |
twisti@1572 | 561 | *idealreg2mhdebugmask[Op_RegI]= *idealreg2spillmask[Op_RegI]; |
twisti@1572 | 562 | *idealreg2mhdebugmask[Op_RegL]= *idealreg2spillmask[Op_RegL]; |
twisti@1572 | 563 | *idealreg2mhdebugmask[Op_RegF]= *idealreg2spillmask[Op_RegF]; |
twisti@1572 | 564 | *idealreg2mhdebugmask[Op_RegD]= *idealreg2spillmask[Op_RegD]; |
twisti@1572 | 565 | *idealreg2mhdebugmask[Op_RegP]= *idealreg2spillmask[Op_RegP]; |
duke@435 | 566 | |
duke@435 | 567 | // Prevent stub compilations from attempting to reference |
duke@435 | 568 | // callee-saved registers from debug info |
duke@435 | 569 | bool exclude_soe = !Compile::current()->is_method_compilation(); |
duke@435 | 570 | |
duke@435 | 571 | for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { |
duke@435 | 572 | // registers the caller has to save do not work |
duke@435 | 573 | if( _register_save_policy[i] == 'C' || |
duke@435 | 574 | _register_save_policy[i] == 'A' || |
duke@435 | 575 | (_register_save_policy[i] == 'E' && exclude_soe) ) { |
twisti@1572 | 576 | idealreg2debugmask [Op_RegN]->Remove(i); |
twisti@1572 | 577 | idealreg2debugmask [Op_RegI]->Remove(i); // Exclude save-on-call |
twisti@1572 | 578 | idealreg2debugmask [Op_RegL]->Remove(i); // registers from debug |
twisti@1572 | 579 | idealreg2debugmask [Op_RegF]->Remove(i); // masks |
twisti@1572 | 580 | idealreg2debugmask [Op_RegD]->Remove(i); |
twisti@1572 | 581 | idealreg2debugmask [Op_RegP]->Remove(i); |
twisti@1572 | 582 | |
twisti@1572 | 583 | idealreg2mhdebugmask[Op_RegN]->Remove(i); |
twisti@1572 | 584 | idealreg2mhdebugmask[Op_RegI]->Remove(i); |
twisti@1572 | 585 | idealreg2mhdebugmask[Op_RegL]->Remove(i); |
twisti@1572 | 586 | idealreg2mhdebugmask[Op_RegF]->Remove(i); |
twisti@1572 | 587 | idealreg2mhdebugmask[Op_RegD]->Remove(i); |
twisti@1572 | 588 | idealreg2mhdebugmask[Op_RegP]->Remove(i); |
duke@435 | 589 | } |
duke@435 | 590 | } |
twisti@1572 | 591 | |
twisti@1572 | 592 | // Subtract the register we use to save the SP for MethodHandle |
twisti@1572 | 593 | // invokes to from the debug mask. |
twisti@1572 | 594 | const RegMask save_mask = method_handle_invoke_SP_save_mask(); |
twisti@1572 | 595 | idealreg2mhdebugmask[Op_RegN]->SUBTRACT(save_mask); |
twisti@1572 | 596 | idealreg2mhdebugmask[Op_RegI]->SUBTRACT(save_mask); |
twisti@1572 | 597 | idealreg2mhdebugmask[Op_RegL]->SUBTRACT(save_mask); |
twisti@1572 | 598 | idealreg2mhdebugmask[Op_RegF]->SUBTRACT(save_mask); |
twisti@1572 | 599 | idealreg2mhdebugmask[Op_RegD]->SUBTRACT(save_mask); |
twisti@1572 | 600 | idealreg2mhdebugmask[Op_RegP]->SUBTRACT(save_mask); |
duke@435 | 601 | } |
duke@435 | 602 | |
duke@435 | 603 | //---------------------------is_save_on_entry---------------------------------- |
duke@435 | 604 | bool Matcher::is_save_on_entry( int reg ) { |
duke@435 | 605 | return |
duke@435 | 606 | _register_save_policy[reg] == 'E' || |
duke@435 | 607 | _register_save_policy[reg] == 'A' || // Save-on-entry register? |
duke@435 | 608 | // Also save argument registers in the trampolining stubs |
duke@435 | 609 | (C->save_argument_registers() && is_spillable_arg(reg)); |
duke@435 | 610 | } |
duke@435 | 611 | |
duke@435 | 612 | //---------------------------Fixup_Save_On_Entry------------------------------- |
duke@435 | 613 | void Matcher::Fixup_Save_On_Entry( ) { |
duke@435 | 614 | init_first_stack_mask(); |
duke@435 | 615 | |
duke@435 | 616 | Node *root = C->root(); // Short name for root |
duke@435 | 617 | // Count number of save-on-entry registers. |
duke@435 | 618 | uint soe_cnt = number_of_saved_registers(); |
duke@435 | 619 | uint i; |
duke@435 | 620 | |
duke@435 | 621 | // Find the procedure Start Node |
duke@435 | 622 | StartNode *start = C->start(); |
duke@435 | 623 | assert( start, "Expect a start node" ); |
duke@435 | 624 | |
duke@435 | 625 | // Save argument registers in the trampolining stubs |
duke@435 | 626 | if( C->save_argument_registers() ) |
duke@435 | 627 | for( i = 0; i < _last_Mach_Reg; i++ ) |
duke@435 | 628 | if( is_spillable_arg(i) ) |
duke@435 | 629 | soe_cnt++; |
duke@435 | 630 | |
duke@435 | 631 | // Input RegMask array shared by all Returns. |
duke@435 | 632 | // The type for doubles and longs has a count of 2, but |
duke@435 | 633 | // there is only 1 returned value |
duke@435 | 634 | uint ret_edge_cnt = TypeFunc::Parms + ((C->tf()->range()->cnt() == TypeFunc::Parms) ? 0 : 1); |
duke@435 | 635 | RegMask *ret_rms = init_input_masks( ret_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); |
duke@435 | 636 | // Returns have 0 or 1 returned values depending on call signature. |
duke@435 | 637 | // Return register is specified by return_value in the AD file. |
duke@435 | 638 | if (ret_edge_cnt > TypeFunc::Parms) |
duke@435 | 639 | ret_rms[TypeFunc::Parms+0] = _return_value_mask; |
duke@435 | 640 | |
duke@435 | 641 | // Input RegMask array shared by all Rethrows. |
duke@435 | 642 | uint reth_edge_cnt = TypeFunc::Parms+1; |
duke@435 | 643 | RegMask *reth_rms = init_input_masks( reth_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); |
duke@435 | 644 | // Rethrow takes exception oop only, but in the argument 0 slot. |
duke@435 | 645 | reth_rms[TypeFunc::Parms] = mreg2regmask[find_receiver(false)]; |
duke@435 | 646 | #ifdef _LP64 |
duke@435 | 647 | // Need two slots for ptrs in 64-bit land |
duke@435 | 648 | reth_rms[TypeFunc::Parms].Insert(OptoReg::add(OptoReg::Name(find_receiver(false)),1)); |
duke@435 | 649 | #endif |
duke@435 | 650 | |
duke@435 | 651 | // Input RegMask array shared by all TailCalls |
duke@435 | 652 | uint tail_call_edge_cnt = TypeFunc::Parms+2; |
duke@435 | 653 | RegMask *tail_call_rms = init_input_masks( tail_call_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); |
duke@435 | 654 | |
duke@435 | 655 | // Input RegMask array shared by all TailJumps |
duke@435 | 656 | uint tail_jump_edge_cnt = TypeFunc::Parms+2; |
duke@435 | 657 | RegMask *tail_jump_rms = init_input_masks( tail_jump_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); |
duke@435 | 658 | |
duke@435 | 659 | // TailCalls have 2 returned values (target & moop), whose masks come |
duke@435 | 660 | // from the usual MachNode/MachOper mechanism. Find a sample |
duke@435 | 661 | // TailCall to extract these masks and put the correct masks into |
duke@435 | 662 | // the tail_call_rms array. |
duke@435 | 663 | for( i=1; i < root->req(); i++ ) { |
duke@435 | 664 | MachReturnNode *m = root->in(i)->as_MachReturn(); |
duke@435 | 665 | if( m->ideal_Opcode() == Op_TailCall ) { |
duke@435 | 666 | tail_call_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); |
duke@435 | 667 | tail_call_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); |
duke@435 | 668 | break; |
duke@435 | 669 | } |
duke@435 | 670 | } |
duke@435 | 671 | |
duke@435 | 672 | // TailJumps have 2 returned values (target & ex_oop), whose masks come |
duke@435 | 673 | // from the usual MachNode/MachOper mechanism. Find a sample |
duke@435 | 674 | // TailJump to extract these masks and put the correct masks into |
duke@435 | 675 | // the tail_jump_rms array. |
duke@435 | 676 | for( i=1; i < root->req(); i++ ) { |
duke@435 | 677 | MachReturnNode *m = root->in(i)->as_MachReturn(); |
duke@435 | 678 | if( m->ideal_Opcode() == Op_TailJump ) { |
duke@435 | 679 | tail_jump_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); |
duke@435 | 680 | tail_jump_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); |
duke@435 | 681 | break; |
duke@435 | 682 | } |
duke@435 | 683 | } |
duke@435 | 684 | |
duke@435 | 685 | // Input RegMask array shared by all Halts |
duke@435 | 686 | uint halt_edge_cnt = TypeFunc::Parms; |
duke@435 | 687 | RegMask *halt_rms = init_input_masks( halt_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); |
duke@435 | 688 | |
duke@435 | 689 | // Capture the return input masks into each exit flavor |
duke@435 | 690 | for( i=1; i < root->req(); i++ ) { |
duke@435 | 691 | MachReturnNode *exit = root->in(i)->as_MachReturn(); |
duke@435 | 692 | switch( exit->ideal_Opcode() ) { |
duke@435 | 693 | case Op_Return : exit->_in_rms = ret_rms; break; |
duke@435 | 694 | case Op_Rethrow : exit->_in_rms = reth_rms; break; |
duke@435 | 695 | case Op_TailCall : exit->_in_rms = tail_call_rms; break; |
duke@435 | 696 | case Op_TailJump : exit->_in_rms = tail_jump_rms; break; |
duke@435 | 697 | case Op_Halt : exit->_in_rms = halt_rms; break; |
duke@435 | 698 | default : ShouldNotReachHere(); |
duke@435 | 699 | } |
duke@435 | 700 | } |
duke@435 | 701 | |
duke@435 | 702 | // Next unused projection number from Start. |
duke@435 | 703 | int proj_cnt = C->tf()->domain()->cnt(); |
duke@435 | 704 | |
duke@435 | 705 | // Do all the save-on-entry registers. Make projections from Start for |
duke@435 | 706 | // them, and give them a use at the exit points. To the allocator, they |
duke@435 | 707 | // look like incoming register arguments. |
duke@435 | 708 | for( i = 0; i < _last_Mach_Reg; i++ ) { |
duke@435 | 709 | if( is_save_on_entry(i) ) { |
duke@435 | 710 | |
duke@435 | 711 | // Add the save-on-entry to the mask array |
duke@435 | 712 | ret_rms [ ret_edge_cnt] = mreg2regmask[i]; |
duke@435 | 713 | reth_rms [ reth_edge_cnt] = mreg2regmask[i]; |
duke@435 | 714 | tail_call_rms[tail_call_edge_cnt] = mreg2regmask[i]; |
duke@435 | 715 | tail_jump_rms[tail_jump_edge_cnt] = mreg2regmask[i]; |
duke@435 | 716 | // Halts need the SOE registers, but only in the stack as debug info. |
duke@435 | 717 | // A just-prior uncommon-trap or deoptimization will use the SOE regs. |
duke@435 | 718 | halt_rms [ halt_edge_cnt] = *idealreg2spillmask[_register_save_type[i]]; |
duke@435 | 719 | |
duke@435 | 720 | Node *mproj; |
duke@435 | 721 | |
duke@435 | 722 | // Is this a RegF low half of a RegD? Double up 2 adjacent RegF's |
duke@435 | 723 | // into a single RegD. |
duke@435 | 724 | if( (i&1) == 0 && |
duke@435 | 725 | _register_save_type[i ] == Op_RegF && |
duke@435 | 726 | _register_save_type[i+1] == Op_RegF && |
duke@435 | 727 | is_save_on_entry(i+1) ) { |
duke@435 | 728 | // Add other bit for double |
duke@435 | 729 | ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 730 | reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 731 | tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 732 | tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 733 | halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); |
kvn@4115 | 734 | mproj = new (C) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegD ); |
duke@435 | 735 | proj_cnt += 2; // Skip 2 for doubles |
duke@435 | 736 | } |
duke@435 | 737 | else if( (i&1) == 1 && // Else check for high half of double |
duke@435 | 738 | _register_save_type[i-1] == Op_RegF && |
duke@435 | 739 | _register_save_type[i ] == Op_RegF && |
duke@435 | 740 | is_save_on_entry(i-1) ) { |
duke@435 | 741 | ret_rms [ ret_edge_cnt] = RegMask::Empty; |
duke@435 | 742 | reth_rms [ reth_edge_cnt] = RegMask::Empty; |
duke@435 | 743 | tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; |
duke@435 | 744 | tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; |
duke@435 | 745 | halt_rms [ halt_edge_cnt] = RegMask::Empty; |
duke@435 | 746 | mproj = C->top(); |
duke@435 | 747 | } |
duke@435 | 748 | // Is this a RegI low half of a RegL? Double up 2 adjacent RegI's |
duke@435 | 749 | // into a single RegL. |
duke@435 | 750 | else if( (i&1) == 0 && |
duke@435 | 751 | _register_save_type[i ] == Op_RegI && |
duke@435 | 752 | _register_save_type[i+1] == Op_RegI && |
duke@435 | 753 | is_save_on_entry(i+1) ) { |
duke@435 | 754 | // Add other bit for long |
duke@435 | 755 | ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 756 | reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 757 | tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 758 | tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); |
duke@435 | 759 | halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); |
kvn@4115 | 760 | mproj = new (C) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegL ); |
duke@435 | 761 | proj_cnt += 2; // Skip 2 for longs |
duke@435 | 762 | } |
duke@435 | 763 | else if( (i&1) == 1 && // Else check for high half of long |
duke@435 | 764 | _register_save_type[i-1] == Op_RegI && |
duke@435 | 765 | _register_save_type[i ] == Op_RegI && |
duke@435 | 766 | is_save_on_entry(i-1) ) { |
duke@435 | 767 | ret_rms [ ret_edge_cnt] = RegMask::Empty; |
duke@435 | 768 | reth_rms [ reth_edge_cnt] = RegMask::Empty; |
duke@435 | 769 | tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; |
duke@435 | 770 | tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; |
duke@435 | 771 | halt_rms [ halt_edge_cnt] = RegMask::Empty; |
duke@435 | 772 | mproj = C->top(); |
duke@435 | 773 | } else { |
duke@435 | 774 | // Make a projection for it off the Start |
kvn@4115 | 775 | mproj = new (C) MachProjNode( start, proj_cnt++, ret_rms[ret_edge_cnt], _register_save_type[i] ); |
duke@435 | 776 | } |
duke@435 | 777 | |
duke@435 | 778 | ret_edge_cnt ++; |
duke@435 | 779 | reth_edge_cnt ++; |
duke@435 | 780 | tail_call_edge_cnt ++; |
duke@435 | 781 | tail_jump_edge_cnt ++; |
duke@435 | 782 | halt_edge_cnt ++; |
duke@435 | 783 | |
duke@435 | 784 | // Add a use of the SOE register to all exit paths |
duke@435 | 785 | for( uint j=1; j < root->req(); j++ ) |
duke@435 | 786 | root->in(j)->add_req(mproj); |
duke@435 | 787 | } // End of if a save-on-entry register |
duke@435 | 788 | } // End of for all machine registers |
duke@435 | 789 | } |
duke@435 | 790 | |
duke@435 | 791 | //------------------------------init_spill_mask-------------------------------- |
duke@435 | 792 | void Matcher::init_spill_mask( Node *ret ) { |
duke@435 | 793 | if( idealreg2regmask[Op_RegI] ) return; // One time only init |
duke@435 | 794 | |
duke@435 | 795 | OptoReg::c_frame_pointer = c_frame_pointer(); |
duke@435 | 796 | c_frame_ptr_mask = c_frame_pointer(); |
duke@435 | 797 | #ifdef _LP64 |
duke@435 | 798 | // pointers are twice as big |
duke@435 | 799 | c_frame_ptr_mask.Insert(OptoReg::add(c_frame_pointer(),1)); |
duke@435 | 800 | #endif |
duke@435 | 801 | |
duke@435 | 802 | // Start at OptoReg::stack0() |
duke@435 | 803 | STACK_ONLY_mask.Clear(); |
duke@435 | 804 | OptoReg::Name init = OptoReg::stack2reg(0); |
duke@435 | 805 | // STACK_ONLY_mask is all stack bits |
duke@435 | 806 | OptoReg::Name i; |
duke@435 | 807 | for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) |
duke@435 | 808 | STACK_ONLY_mask.Insert(i); |
duke@435 | 809 | // Also set the "infinite stack" bit. |
duke@435 | 810 | STACK_ONLY_mask.set_AllStack(); |
duke@435 | 811 | |
duke@435 | 812 | // Copy the register names over into the shared world |
duke@435 | 813 | for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { |
duke@435 | 814 | // SharedInfo::regName[i] = regName[i]; |
duke@435 | 815 | // Handy RegMasks per machine register |
duke@435 | 816 | mreg2regmask[i].Insert(i); |
duke@435 | 817 | } |
duke@435 | 818 | |
duke@435 | 819 | // Grab the Frame Pointer |
duke@435 | 820 | Node *fp = ret->in(TypeFunc::FramePtr); |
duke@435 | 821 | Node *mem = ret->in(TypeFunc::Memory); |
duke@435 | 822 | const TypePtr* atp = TypePtr::BOTTOM; |
duke@435 | 823 | // Share frame pointer while making spill ops |
duke@435 | 824 | set_shared(fp); |
duke@435 | 825 | |
duke@435 | 826 | // Compute generic short-offset Loads |
coleenp@548 | 827 | #ifdef _LP64 |
kvn@4115 | 828 | MachNode *spillCP = match_tree(new (C) LoadNNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); |
coleenp@548 | 829 | #endif |
kvn@4115 | 830 | MachNode *spillI = match_tree(new (C) LoadINode(NULL,mem,fp,atp)); |
kvn@4115 | 831 | MachNode *spillL = match_tree(new (C) LoadLNode(NULL,mem,fp,atp)); |
kvn@4115 | 832 | MachNode *spillF = match_tree(new (C) LoadFNode(NULL,mem,fp,atp)); |
kvn@4115 | 833 | MachNode *spillD = match_tree(new (C) LoadDNode(NULL,mem,fp,atp)); |
kvn@4115 | 834 | MachNode *spillP = match_tree(new (C) LoadPNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); |
duke@435 | 835 | assert(spillI != NULL && spillL != NULL && spillF != NULL && |
duke@435 | 836 | spillD != NULL && spillP != NULL, ""); |
duke@435 | 837 | |
duke@435 | 838 | // Get the ADLC notion of the right regmask, for each basic type. |
coleenp@548 | 839 | #ifdef _LP64 |
coleenp@548 | 840 | idealreg2regmask[Op_RegN] = &spillCP->out_RegMask(); |
coleenp@548 | 841 | #endif |
duke@435 | 842 | idealreg2regmask[Op_RegI] = &spillI->out_RegMask(); |
duke@435 | 843 | idealreg2regmask[Op_RegL] = &spillL->out_RegMask(); |
duke@435 | 844 | idealreg2regmask[Op_RegF] = &spillF->out_RegMask(); |
duke@435 | 845 | idealreg2regmask[Op_RegD] = &spillD->out_RegMask(); |
duke@435 | 846 | idealreg2regmask[Op_RegP] = &spillP->out_RegMask(); |
kvn@3882 | 847 | |
kvn@3882 | 848 | // Vector regmasks. |
kvn@3882 | 849 | if (Matcher::vector_size_supported(T_BYTE,4)) { |
kvn@3882 | 850 | TypeVect::VECTS = TypeVect::make(T_BYTE, 4); |
kvn@4115 | 851 | MachNode *spillVectS = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTS)); |
kvn@3882 | 852 | idealreg2regmask[Op_VecS] = &spillVectS->out_RegMask(); |
kvn@3882 | 853 | } |
kvn@3882 | 854 | if (Matcher::vector_size_supported(T_FLOAT,2)) { |
kvn@4115 | 855 | MachNode *spillVectD = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTD)); |
kvn@3882 | 856 | idealreg2regmask[Op_VecD] = &spillVectD->out_RegMask(); |
kvn@3882 | 857 | } |
kvn@3882 | 858 | if (Matcher::vector_size_supported(T_FLOAT,4)) { |
kvn@4115 | 859 | MachNode *spillVectX = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTX)); |
kvn@3882 | 860 | idealreg2regmask[Op_VecX] = &spillVectX->out_RegMask(); |
kvn@3882 | 861 | } |
kvn@3882 | 862 | if (Matcher::vector_size_supported(T_FLOAT,8)) { |
kvn@4115 | 863 | MachNode *spillVectY = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTY)); |
kvn@3882 | 864 | idealreg2regmask[Op_VecY] = &spillVectY->out_RegMask(); |
kvn@3882 | 865 | } |
duke@435 | 866 | } |
duke@435 | 867 | |
duke@435 | 868 | #ifdef ASSERT |
duke@435 | 869 | static void match_alias_type(Compile* C, Node* n, Node* m) { |
duke@435 | 870 | if (!VerifyAliases) return; // do not go looking for trouble by default |
duke@435 | 871 | const TypePtr* nat = n->adr_type(); |
duke@435 | 872 | const TypePtr* mat = m->adr_type(); |
duke@435 | 873 | int nidx = C->get_alias_index(nat); |
duke@435 | 874 | int midx = C->get_alias_index(mat); |
duke@435 | 875 | // Detune the assert for cases like (AndI 0xFF (LoadB p)). |
duke@435 | 876 | if (nidx == Compile::AliasIdxTop && midx >= Compile::AliasIdxRaw) { |
duke@435 | 877 | for (uint i = 1; i < n->req(); i++) { |
duke@435 | 878 | Node* n1 = n->in(i); |
duke@435 | 879 | const TypePtr* n1at = n1->adr_type(); |
duke@435 | 880 | if (n1at != NULL) { |
duke@435 | 881 | nat = n1at; |
duke@435 | 882 | nidx = C->get_alias_index(n1at); |
duke@435 | 883 | } |
duke@435 | 884 | } |
duke@435 | 885 | } |
duke@435 | 886 | // %%% Kludgery. Instead, fix ideal adr_type methods for all these cases: |
duke@435 | 887 | if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxRaw) { |
duke@435 | 888 | switch (n->Opcode()) { |
duke@435 | 889 | case Op_PrefetchRead: |
duke@435 | 890 | case Op_PrefetchWrite: |
kvn@3052 | 891 | case Op_PrefetchAllocation: |
duke@435 | 892 | nidx = Compile::AliasIdxRaw; |
duke@435 | 893 | nat = TypeRawPtr::BOTTOM; |
duke@435 | 894 | break; |
duke@435 | 895 | } |
duke@435 | 896 | } |
duke@435 | 897 | if (nidx == Compile::AliasIdxRaw && midx == Compile::AliasIdxTop) { |
duke@435 | 898 | switch (n->Opcode()) { |
duke@435 | 899 | case Op_ClearArray: |
duke@435 | 900 | midx = Compile::AliasIdxRaw; |
duke@435 | 901 | mat = TypeRawPtr::BOTTOM; |
duke@435 | 902 | break; |
duke@435 | 903 | } |
duke@435 | 904 | } |
duke@435 | 905 | if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxBot) { |
duke@435 | 906 | switch (n->Opcode()) { |
duke@435 | 907 | case Op_Return: |
duke@435 | 908 | case Op_Rethrow: |
duke@435 | 909 | case Op_Halt: |
duke@435 | 910 | case Op_TailCall: |
duke@435 | 911 | case Op_TailJump: |
duke@435 | 912 | nidx = Compile::AliasIdxBot; |
duke@435 | 913 | nat = TypePtr::BOTTOM; |
duke@435 | 914 | break; |
duke@435 | 915 | } |
duke@435 | 916 | } |
duke@435 | 917 | if (nidx == Compile::AliasIdxBot && midx == Compile::AliasIdxTop) { |
duke@435 | 918 | switch (n->Opcode()) { |
duke@435 | 919 | case Op_StrComp: |
cfang@1116 | 920 | case Op_StrEquals: |
cfang@1116 | 921 | case Op_StrIndexOf: |
rasbold@604 | 922 | case Op_AryEq: |
duke@435 | 923 | case Op_MemBarVolatile: |
duke@435 | 924 | case Op_MemBarCPUOrder: // %%% these ideals should have narrower adr_type? |
kvn@4479 | 925 | case Op_EncodeISOArray: |
duke@435 | 926 | nidx = Compile::AliasIdxTop; |
duke@435 | 927 | nat = NULL; |
duke@435 | 928 | break; |
duke@435 | 929 | } |
duke@435 | 930 | } |
duke@435 | 931 | if (nidx != midx) { |
duke@435 | 932 | if (PrintOpto || (PrintMiscellaneous && (WizardMode || Verbose))) { |
duke@435 | 933 | tty->print_cr("==== Matcher alias shift %d => %d", nidx, midx); |
duke@435 | 934 | n->dump(); |
duke@435 | 935 | m->dump(); |
duke@435 | 936 | } |
duke@435 | 937 | assert(C->subsume_loads() && C->must_alias(nat, midx), |
duke@435 | 938 | "must not lose alias info when matching"); |
duke@435 | 939 | } |
duke@435 | 940 | } |
duke@435 | 941 | #endif |
duke@435 | 942 | |
duke@435 | 943 | |
duke@435 | 944 | //------------------------------MStack----------------------------------------- |
duke@435 | 945 | // State and MStack class used in xform() and find_shared() iterative methods. |
duke@435 | 946 | enum Node_State { Pre_Visit, // node has to be pre-visited |
duke@435 | 947 | Visit, // visit node |
duke@435 | 948 | Post_Visit, // post-visit node |
duke@435 | 949 | Alt_Post_Visit // alternative post-visit path |
duke@435 | 950 | }; |
duke@435 | 951 | |
duke@435 | 952 | class MStack: public Node_Stack { |
duke@435 | 953 | public: |
duke@435 | 954 | MStack(int size) : Node_Stack(size) { } |
duke@435 | 955 | |
duke@435 | 956 | void push(Node *n, Node_State ns) { |
duke@435 | 957 | Node_Stack::push(n, (uint)ns); |
duke@435 | 958 | } |
duke@435 | 959 | void push(Node *n, Node_State ns, Node *parent, int indx) { |
duke@435 | 960 | ++_inode_top; |
duke@435 | 961 | if ((_inode_top + 1) >= _inode_max) grow(); |
duke@435 | 962 | _inode_top->node = parent; |
duke@435 | 963 | _inode_top->indx = (uint)indx; |
duke@435 | 964 | ++_inode_top; |
duke@435 | 965 | _inode_top->node = n; |
duke@435 | 966 | _inode_top->indx = (uint)ns; |
duke@435 | 967 | } |
duke@435 | 968 | Node *parent() { |
duke@435 | 969 | pop(); |
duke@435 | 970 | return node(); |
duke@435 | 971 | } |
duke@435 | 972 | Node_State state() const { |
duke@435 | 973 | return (Node_State)index(); |
duke@435 | 974 | } |
duke@435 | 975 | void set_state(Node_State ns) { |
duke@435 | 976 | set_index((uint)ns); |
duke@435 | 977 | } |
duke@435 | 978 | }; |
duke@435 | 979 | |
duke@435 | 980 | |
duke@435 | 981 | //------------------------------xform------------------------------------------ |
duke@435 | 982 | // Given a Node in old-space, Match him (Label/Reduce) to produce a machine |
duke@435 | 983 | // Node in new-space. Given a new-space Node, recursively walk his children. |
duke@435 | 984 | Node *Matcher::transform( Node *n ) { ShouldNotCallThis(); return n; } |
duke@435 | 985 | Node *Matcher::xform( Node *n, int max_stack ) { |
duke@435 | 986 | // Use one stack to keep both: child's node/state and parent's node/index |
duke@435 | 987 | MStack mstack(max_stack * 2 * 2); // C->unique() * 2 * 2 |
duke@435 | 988 | mstack.push(n, Visit, NULL, -1); // set NULL as parent to indicate root |
duke@435 | 989 | |
duke@435 | 990 | while (mstack.is_nonempty()) { |
drchase@5285 | 991 | C->check_node_count(NodeLimitFudgeFactor, "too many nodes matching instructions"); |
drchase@5285 | 992 | if (C->failing()) return NULL; |
duke@435 | 993 | n = mstack.node(); // Leave node on stack |
duke@435 | 994 | Node_State nstate = mstack.state(); |
duke@435 | 995 | if (nstate == Visit) { |
duke@435 | 996 | mstack.set_state(Post_Visit); |
duke@435 | 997 | Node *oldn = n; |
duke@435 | 998 | // Old-space or new-space check |
duke@435 | 999 | if (!C->node_arena()->contains(n)) { |
duke@435 | 1000 | // Old space! |
duke@435 | 1001 | Node* m; |
duke@435 | 1002 | if (has_new_node(n)) { // Not yet Label/Reduced |
duke@435 | 1003 | m = new_node(n); |
duke@435 | 1004 | } else { |
duke@435 | 1005 | if (!is_dontcare(n)) { // Matcher can match this guy |
duke@435 | 1006 | // Calls match special. They match alone with no children. |
duke@435 | 1007 | // Their children, the incoming arguments, match normally. |
duke@435 | 1008 | m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n); |
duke@435 | 1009 | if (C->failing()) return NULL; |
duke@435 | 1010 | if (m == NULL) { Matcher::soft_match_failure(); return NULL; } |
duke@435 | 1011 | } else { // Nothing the matcher cares about |
duke@435 | 1012 | if( n->is_Proj() && n->in(0)->is_Multi()) { // Projections? |
duke@435 | 1013 | // Convert to machine-dependent projection |
duke@435 | 1014 | m = n->in(0)->as_Multi()->match( n->as_Proj(), this ); |
never@657 | 1015 | #ifdef ASSERT |
never@657 | 1016 | _new2old_map.map(m->_idx, n); |
never@657 | 1017 | #endif |
duke@435 | 1018 | if (m->in(0) != NULL) // m might be top |
kvn@803 | 1019 | collect_null_checks(m, n); |
duke@435 | 1020 | } else { // Else just a regular 'ol guy |
duke@435 | 1021 | m = n->clone(); // So just clone into new-space |
never@657 | 1022 | #ifdef ASSERT |
never@657 | 1023 | _new2old_map.map(m->_idx, n); |
never@657 | 1024 | #endif |
duke@435 | 1025 | // Def-Use edges will be added incrementally as Uses |
duke@435 | 1026 | // of this node are matched. |
duke@435 | 1027 | assert(m->outcnt() == 0, "no Uses of this clone yet"); |
duke@435 | 1028 | } |
duke@435 | 1029 | } |
duke@435 | 1030 | |
duke@435 | 1031 | set_new_node(n, m); // Map old to new |
duke@435 | 1032 | if (_old_node_note_array != NULL) { |
duke@435 | 1033 | Node_Notes* nn = C->locate_node_notes(_old_node_note_array, |
duke@435 | 1034 | n->_idx); |
duke@435 | 1035 | C->set_node_notes_at(m->_idx, nn); |
duke@435 | 1036 | } |
duke@435 | 1037 | debug_only(match_alias_type(C, n, m)); |
duke@435 | 1038 | } |
duke@435 | 1039 | n = m; // n is now a new-space node |
duke@435 | 1040 | mstack.set_node(n); |
duke@435 | 1041 | } |
duke@435 | 1042 | |
duke@435 | 1043 | // New space! |
duke@435 | 1044 | if (_visited.test_set(n->_idx)) continue; // while(mstack.is_nonempty()) |
duke@435 | 1045 | |
duke@435 | 1046 | int i; |
duke@435 | 1047 | // Put precedence edges on stack first (match them last). |
duke@435 | 1048 | for (i = oldn->req(); (uint)i < oldn->len(); i++) { |
duke@435 | 1049 | Node *m = oldn->in(i); |
duke@435 | 1050 | if (m == NULL) break; |
duke@435 | 1051 | // set -1 to call add_prec() instead of set_req() during Step1 |
duke@435 | 1052 | mstack.push(m, Visit, n, -1); |
duke@435 | 1053 | } |
duke@435 | 1054 | |
duke@435 | 1055 | // For constant debug info, I'd rather have unmatched constants. |
duke@435 | 1056 | int cnt = n->req(); |
duke@435 | 1057 | JVMState* jvms = n->jvms(); |
duke@435 | 1058 | int debug_cnt = jvms ? jvms->debug_start() : cnt; |
duke@435 | 1059 | |
duke@435 | 1060 | // Now do only debug info. Clone constants rather than matching. |
duke@435 | 1061 | // Constants are represented directly in the debug info without |
duke@435 | 1062 | // the need for executable machine instructions. |
duke@435 | 1063 | // Monitor boxes are also represented directly. |
duke@435 | 1064 | for (i = cnt - 1; i >= debug_cnt; --i) { // For all debug inputs do |
duke@435 | 1065 | Node *m = n->in(i); // Get input |
duke@435 | 1066 | int op = m->Opcode(); |
duke@435 | 1067 | assert((op == Op_BoxLock) == jvms->is_monitor_use(i), "boxes only at monitor sites"); |
roland@4159 | 1068 | if( op == Op_ConI || op == Op_ConP || op == Op_ConN || op == Op_ConNKlass || |
duke@435 | 1069 | op == Op_ConF || op == Op_ConD || op == Op_ConL |
duke@435 | 1070 | // || op == Op_BoxLock // %%%% enable this and remove (+++) in chaitin.cpp |
duke@435 | 1071 | ) { |
duke@435 | 1072 | m = m->clone(); |
never@657 | 1073 | #ifdef ASSERT |
never@657 | 1074 | _new2old_map.map(m->_idx, n); |
never@657 | 1075 | #endif |
twisti@1040 | 1076 | mstack.push(m, Post_Visit, n, i); // Don't need to visit |
duke@435 | 1077 | mstack.push(m->in(0), Visit, m, 0); |
duke@435 | 1078 | } else { |
duke@435 | 1079 | mstack.push(m, Visit, n, i); |
duke@435 | 1080 | } |
duke@435 | 1081 | } |
duke@435 | 1082 | |
duke@435 | 1083 | // And now walk his children, and convert his inputs to new-space. |
duke@435 | 1084 | for( ; i >= 0; --i ) { // For all normal inputs do |
duke@435 | 1085 | Node *m = n->in(i); // Get input |
duke@435 | 1086 | if(m != NULL) |
duke@435 | 1087 | mstack.push(m, Visit, n, i); |
duke@435 | 1088 | } |
duke@435 | 1089 | |
duke@435 | 1090 | } |
duke@435 | 1091 | else if (nstate == Post_Visit) { |
duke@435 | 1092 | // Set xformed input |
duke@435 | 1093 | Node *p = mstack.parent(); |
duke@435 | 1094 | if (p != NULL) { // root doesn't have parent |
duke@435 | 1095 | int i = (int)mstack.index(); |
duke@435 | 1096 | if (i >= 0) |
duke@435 | 1097 | p->set_req(i, n); // required input |
duke@435 | 1098 | else if (i == -1) |
duke@435 | 1099 | p->add_prec(n); // precedence input |
duke@435 | 1100 | else |
duke@435 | 1101 | ShouldNotReachHere(); |
duke@435 | 1102 | } |
duke@435 | 1103 | mstack.pop(); // remove processed node from stack |
duke@435 | 1104 | } |
duke@435 | 1105 | else { |
duke@435 | 1106 | ShouldNotReachHere(); |
duke@435 | 1107 | } |
duke@435 | 1108 | } // while (mstack.is_nonempty()) |
duke@435 | 1109 | return n; // Return new-space Node |
duke@435 | 1110 | } |
duke@435 | 1111 | |
duke@435 | 1112 | //------------------------------warp_outgoing_stk_arg------------------------ |
duke@435 | 1113 | OptoReg::Name Matcher::warp_outgoing_stk_arg( VMReg reg, OptoReg::Name begin_out_arg_area, OptoReg::Name &out_arg_limit_per_call ) { |
duke@435 | 1114 | // Convert outgoing argument location to a pre-biased stack offset |
duke@435 | 1115 | if (reg->is_stack()) { |
duke@435 | 1116 | OptoReg::Name warped = reg->reg2stack(); |
duke@435 | 1117 | // Adjust the stack slot offset to be the register number used |
duke@435 | 1118 | // by the allocator. |
duke@435 | 1119 | warped = OptoReg::add(begin_out_arg_area, warped); |
duke@435 | 1120 | // Keep track of the largest numbered stack slot used for an arg. |
duke@435 | 1121 | // Largest used slot per call-site indicates the amount of stack |
duke@435 | 1122 | // that is killed by the call. |
duke@435 | 1123 | if( warped >= out_arg_limit_per_call ) |
duke@435 | 1124 | out_arg_limit_per_call = OptoReg::add(warped,1); |
kvn@3882 | 1125 | if (!RegMask::can_represent_arg(warped)) { |
duke@435 | 1126 | C->record_method_not_compilable_all_tiers("unsupported calling sequence"); |
duke@435 | 1127 | return OptoReg::Bad; |
duke@435 | 1128 | } |
duke@435 | 1129 | return warped; |
duke@435 | 1130 | } |
duke@435 | 1131 | return OptoReg::as_OptoReg(reg); |
duke@435 | 1132 | } |
duke@435 | 1133 | |
duke@435 | 1134 | |
duke@435 | 1135 | //------------------------------match_sfpt------------------------------------- |
duke@435 | 1136 | // Helper function to match call instructions. Calls match special. |
duke@435 | 1137 | // They match alone with no children. Their children, the incoming |
duke@435 | 1138 | // arguments, match normally. |
duke@435 | 1139 | MachNode *Matcher::match_sfpt( SafePointNode *sfpt ) { |
duke@435 | 1140 | MachSafePointNode *msfpt = NULL; |
duke@435 | 1141 | MachCallNode *mcall = NULL; |
duke@435 | 1142 | uint cnt; |
duke@435 | 1143 | // Split out case for SafePoint vs Call |
duke@435 | 1144 | CallNode *call; |
duke@435 | 1145 | const TypeTuple *domain; |
duke@435 | 1146 | ciMethod* method = NULL; |
twisti@1572 | 1147 | bool is_method_handle_invoke = false; // for special kill effects |
duke@435 | 1148 | if( sfpt->is_Call() ) { |
duke@435 | 1149 | call = sfpt->as_Call(); |
duke@435 | 1150 | domain = call->tf()->domain(); |
duke@435 | 1151 | cnt = domain->cnt(); |
duke@435 | 1152 | |
duke@435 | 1153 | // Match just the call, nothing else |
duke@435 | 1154 | MachNode *m = match_tree(call); |
duke@435 | 1155 | if (C->failing()) return NULL; |
duke@435 | 1156 | if( m == NULL ) { Matcher::soft_match_failure(); return NULL; } |
duke@435 | 1157 | |
duke@435 | 1158 | // Copy data from the Ideal SafePoint to the machine version |
duke@435 | 1159 | mcall = m->as_MachCall(); |
duke@435 | 1160 | |
duke@435 | 1161 | mcall->set_tf( call->tf()); |
duke@435 | 1162 | mcall->set_entry_point(call->entry_point()); |
duke@435 | 1163 | mcall->set_cnt( call->cnt()); |
duke@435 | 1164 | |
duke@435 | 1165 | if( mcall->is_MachCallJava() ) { |
duke@435 | 1166 | MachCallJavaNode *mcall_java = mcall->as_MachCallJava(); |
duke@435 | 1167 | const CallJavaNode *call_java = call->as_CallJava(); |
duke@435 | 1168 | method = call_java->method(); |
duke@435 | 1169 | mcall_java->_method = method; |
duke@435 | 1170 | mcall_java->_bci = call_java->_bci; |
duke@435 | 1171 | mcall_java->_optimized_virtual = call_java->is_optimized_virtual(); |
twisti@1572 | 1172 | is_method_handle_invoke = call_java->is_method_handle_invoke(); |
twisti@1572 | 1173 | mcall_java->_method_handle_invoke = is_method_handle_invoke; |
never@3105 | 1174 | if (is_method_handle_invoke) { |
never@3105 | 1175 | C->set_has_method_handle_invokes(true); |
never@3105 | 1176 | } |
duke@435 | 1177 | if( mcall_java->is_MachCallStaticJava() ) |
duke@435 | 1178 | mcall_java->as_MachCallStaticJava()->_name = |
duke@435 | 1179 | call_java->as_CallStaticJava()->_name; |
duke@435 | 1180 | if( mcall_java->is_MachCallDynamicJava() ) |
duke@435 | 1181 | mcall_java->as_MachCallDynamicJava()->_vtable_index = |
duke@435 | 1182 | call_java->as_CallDynamicJava()->_vtable_index; |
duke@435 | 1183 | } |
duke@435 | 1184 | else if( mcall->is_MachCallRuntime() ) { |
duke@435 | 1185 | mcall->as_MachCallRuntime()->_name = call->as_CallRuntime()->_name; |
duke@435 | 1186 | } |
duke@435 | 1187 | msfpt = mcall; |
duke@435 | 1188 | } |
duke@435 | 1189 | // This is a non-call safepoint |
duke@435 | 1190 | else { |
duke@435 | 1191 | call = NULL; |
duke@435 | 1192 | domain = NULL; |
duke@435 | 1193 | MachNode *mn = match_tree(sfpt); |
duke@435 | 1194 | if (C->failing()) return NULL; |
duke@435 | 1195 | msfpt = mn->as_MachSafePoint(); |
duke@435 | 1196 | cnt = TypeFunc::Parms; |
duke@435 | 1197 | } |
duke@435 | 1198 | |
duke@435 | 1199 | // Advertise the correct memory effects (for anti-dependence computation). |
duke@435 | 1200 | msfpt->set_adr_type(sfpt->adr_type()); |
duke@435 | 1201 | |
duke@435 | 1202 | // Allocate a private array of RegMasks. These RegMasks are not shared. |
duke@435 | 1203 | msfpt->_in_rms = NEW_RESOURCE_ARRAY( RegMask, cnt ); |
duke@435 | 1204 | // Empty them all. |
duke@435 | 1205 | memset( msfpt->_in_rms, 0, sizeof(RegMask)*cnt ); |
duke@435 | 1206 | |
duke@435 | 1207 | // Do all the pre-defined non-Empty register masks |
duke@435 | 1208 | msfpt->_in_rms[TypeFunc::ReturnAdr] = _return_addr_mask; |
duke@435 | 1209 | msfpt->_in_rms[TypeFunc::FramePtr ] = c_frame_ptr_mask; |
duke@435 | 1210 | |
duke@435 | 1211 | // Place first outgoing argument can possibly be put. |
duke@435 | 1212 | OptoReg::Name begin_out_arg_area = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); |
duke@435 | 1213 | assert( is_even(begin_out_arg_area), "" ); |
duke@435 | 1214 | // Compute max outgoing register number per call site. |
duke@435 | 1215 | OptoReg::Name out_arg_limit_per_call = begin_out_arg_area; |
duke@435 | 1216 | // Calls to C may hammer extra stack slots above and beyond any arguments. |
duke@435 | 1217 | // These are usually backing store for register arguments for varargs. |
duke@435 | 1218 | if( call != NULL && call->is_CallRuntime() ) |
duke@435 | 1219 | out_arg_limit_per_call = OptoReg::add(out_arg_limit_per_call,C->varargs_C_out_slots_killed()); |
duke@435 | 1220 | |
duke@435 | 1221 | |
duke@435 | 1222 | // Do the normal argument list (parameters) register masks |
duke@435 | 1223 | int argcnt = cnt - TypeFunc::Parms; |
duke@435 | 1224 | if( argcnt > 0 ) { // Skip it all if we have no args |
duke@435 | 1225 | BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); |
duke@435 | 1226 | VMRegPair *parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); |
duke@435 | 1227 | int i; |
duke@435 | 1228 | for( i = 0; i < argcnt; i++ ) { |
duke@435 | 1229 | sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); |
duke@435 | 1230 | } |
duke@435 | 1231 | // V-call to pick proper calling convention |
duke@435 | 1232 | call->calling_convention( sig_bt, parm_regs, argcnt ); |
duke@435 | 1233 | |
duke@435 | 1234 | #ifdef ASSERT |
duke@435 | 1235 | // Sanity check users' calling convention. Really handy during |
duke@435 | 1236 | // the initial porting effort. Fairly expensive otherwise. |
duke@435 | 1237 | { for (int i = 0; i<argcnt; i++) { |
duke@435 | 1238 | if( !parm_regs[i].first()->is_valid() && |
duke@435 | 1239 | !parm_regs[i].second()->is_valid() ) continue; |
duke@435 | 1240 | VMReg reg1 = parm_regs[i].first(); |
duke@435 | 1241 | VMReg reg2 = parm_regs[i].second(); |
duke@435 | 1242 | for (int j = 0; j < i; j++) { |
duke@435 | 1243 | if( !parm_regs[j].first()->is_valid() && |
duke@435 | 1244 | !parm_regs[j].second()->is_valid() ) continue; |
duke@435 | 1245 | VMReg reg3 = parm_regs[j].first(); |
duke@435 | 1246 | VMReg reg4 = parm_regs[j].second(); |
duke@435 | 1247 | if( !reg1->is_valid() ) { |
duke@435 | 1248 | assert( !reg2->is_valid(), "valid halvsies" ); |
duke@435 | 1249 | } else if( !reg3->is_valid() ) { |
duke@435 | 1250 | assert( !reg4->is_valid(), "valid halvsies" ); |
duke@435 | 1251 | } else { |
duke@435 | 1252 | assert( reg1 != reg2, "calling conv. must produce distinct regs"); |
duke@435 | 1253 | assert( reg1 != reg3, "calling conv. must produce distinct regs"); |
duke@435 | 1254 | assert( reg1 != reg4, "calling conv. must produce distinct regs"); |
duke@435 | 1255 | assert( reg2 != reg3, "calling conv. must produce distinct regs"); |
duke@435 | 1256 | assert( reg2 != reg4 || !reg2->is_valid(), "calling conv. must produce distinct regs"); |
duke@435 | 1257 | assert( reg3 != reg4, "calling conv. must produce distinct regs"); |
duke@435 | 1258 | } |
duke@435 | 1259 | } |
duke@435 | 1260 | } |
duke@435 | 1261 | } |
duke@435 | 1262 | #endif |
duke@435 | 1263 | |
duke@435 | 1264 | // Visit each argument. Compute its outgoing register mask. |
duke@435 | 1265 | // Return results now can have 2 bits returned. |
duke@435 | 1266 | // Compute max over all outgoing arguments both per call-site |
duke@435 | 1267 | // and over the entire method. |
duke@435 | 1268 | for( i = 0; i < argcnt; i++ ) { |
duke@435 | 1269 | // Address of incoming argument mask to fill in |
duke@435 | 1270 | RegMask *rm = &mcall->_in_rms[i+TypeFunc::Parms]; |
duke@435 | 1271 | if( !parm_regs[i].first()->is_valid() && |
duke@435 | 1272 | !parm_regs[i].second()->is_valid() ) { |
duke@435 | 1273 | continue; // Avoid Halves |
duke@435 | 1274 | } |
duke@435 | 1275 | // Grab first register, adjust stack slots and insert in mask. |
duke@435 | 1276 | OptoReg::Name reg1 = warp_outgoing_stk_arg(parm_regs[i].first(), begin_out_arg_area, out_arg_limit_per_call ); |
duke@435 | 1277 | if (OptoReg::is_valid(reg1)) |
duke@435 | 1278 | rm->Insert( reg1 ); |
duke@435 | 1279 | // Grab second register (if any), adjust stack slots and insert in mask. |
duke@435 | 1280 | OptoReg::Name reg2 = warp_outgoing_stk_arg(parm_regs[i].second(), begin_out_arg_area, out_arg_limit_per_call ); |
duke@435 | 1281 | if (OptoReg::is_valid(reg2)) |
duke@435 | 1282 | rm->Insert( reg2 ); |
duke@435 | 1283 | } // End of for all arguments |
duke@435 | 1284 | |
duke@435 | 1285 | // Compute number of stack slots needed to restore stack in case of |
duke@435 | 1286 | // Pascal-style argument popping. |
duke@435 | 1287 | mcall->_argsize = out_arg_limit_per_call - begin_out_arg_area; |
duke@435 | 1288 | } |
duke@435 | 1289 | |
duke@435 | 1290 | // Compute the max stack slot killed by any call. These will not be |
duke@435 | 1291 | // available for debug info, and will be used to adjust FIRST_STACK_mask |
duke@435 | 1292 | // after all call sites have been visited. |
duke@435 | 1293 | if( _out_arg_limit < out_arg_limit_per_call) |
duke@435 | 1294 | _out_arg_limit = out_arg_limit_per_call; |
duke@435 | 1295 | |
duke@435 | 1296 | if (mcall) { |
duke@435 | 1297 | // Kill the outgoing argument area, including any non-argument holes and |
duke@435 | 1298 | // any legacy C-killed slots. Use Fat-Projections to do the killing. |
duke@435 | 1299 | // Since the max-per-method covers the max-per-call-site and debug info |
duke@435 | 1300 | // is excluded on the max-per-method basis, debug info cannot land in |
duke@435 | 1301 | // this killed area. |
duke@435 | 1302 | uint r_cnt = mcall->tf()->range()->cnt(); |
kvn@4115 | 1303 | MachProjNode *proj = new (C) MachProjNode( mcall, r_cnt+10000, RegMask::Empty, MachProjNode::fat_proj ); |
kvn@3882 | 1304 | if (!RegMask::can_represent_arg(OptoReg::Name(out_arg_limit_per_call-1))) { |
duke@435 | 1305 | C->record_method_not_compilable_all_tiers("unsupported outgoing calling sequence"); |
duke@435 | 1306 | } else { |
duke@435 | 1307 | for (int i = begin_out_arg_area; i < out_arg_limit_per_call; i++) |
duke@435 | 1308 | proj->_rout.Insert(OptoReg::Name(i)); |
duke@435 | 1309 | } |
adlertz@5539 | 1310 | if (proj->_rout.is_NotEmpty()) { |
adlertz@5539 | 1311 | push_projection(proj); |
adlertz@5539 | 1312 | } |
duke@435 | 1313 | } |
duke@435 | 1314 | // Transfer the safepoint information from the call to the mcall |
duke@435 | 1315 | // Move the JVMState list |
duke@435 | 1316 | msfpt->set_jvms(sfpt->jvms()); |
duke@435 | 1317 | for (JVMState* jvms = msfpt->jvms(); jvms; jvms = jvms->caller()) { |
duke@435 | 1318 | jvms->set_map(sfpt); |
duke@435 | 1319 | } |
duke@435 | 1320 | |
duke@435 | 1321 | // Debug inputs begin just after the last incoming parameter |
duke@435 | 1322 | assert( (mcall == NULL) || (mcall->jvms() == NULL) || |
duke@435 | 1323 | (mcall->jvms()->debug_start() + mcall->_jvmadj == mcall->tf()->domain()->cnt()), "" ); |
duke@435 | 1324 | |
duke@435 | 1325 | // Move the OopMap |
duke@435 | 1326 | msfpt->_oop_map = sfpt->_oop_map; |
duke@435 | 1327 | |
duke@435 | 1328 | // Registers killed by the call are set in the local scheduling pass |
duke@435 | 1329 | // of Global Code Motion. |
duke@435 | 1330 | return msfpt; |
duke@435 | 1331 | } |
duke@435 | 1332 | |
duke@435 | 1333 | //---------------------------match_tree---------------------------------------- |
duke@435 | 1334 | // Match a Ideal Node DAG - turn it into a tree; Label & Reduce. Used as part |
duke@435 | 1335 | // of the whole-sale conversion from Ideal to Mach Nodes. Also used for |
duke@435 | 1336 | // making GotoNodes while building the CFG and in init_spill_mask() to identify |
duke@435 | 1337 | // a Load's result RegMask for memoization in idealreg2regmask[] |
duke@435 | 1338 | MachNode *Matcher::match_tree( const Node *n ) { |
duke@435 | 1339 | assert( n->Opcode() != Op_Phi, "cannot match" ); |
duke@435 | 1340 | assert( !n->is_block_start(), "cannot match" ); |
duke@435 | 1341 | // Set the mark for all locally allocated State objects. |
duke@435 | 1342 | // When this call returns, the _states_arena arena will be reset |
duke@435 | 1343 | // freeing all State objects. |
duke@435 | 1344 | ResourceMark rm( &_states_arena ); |
duke@435 | 1345 | |
duke@435 | 1346 | LabelRootDepth = 0; |
duke@435 | 1347 | |
duke@435 | 1348 | // StoreNodes require their Memory input to match any LoadNodes |
duke@435 | 1349 | Node *mem = n->is_Store() ? n->in(MemNode::Memory) : (Node*)1 ; |
kvn@651 | 1350 | #ifdef ASSERT |
kvn@651 | 1351 | Node* save_mem_node = _mem_node; |
kvn@651 | 1352 | _mem_node = n->is_Store() ? (Node*)n : NULL; |
kvn@651 | 1353 | #endif |
duke@435 | 1354 | // State object for root node of match tree |
duke@435 | 1355 | // Allocate it on _states_arena - stack allocation can cause stack overflow. |
duke@435 | 1356 | State *s = new (&_states_arena) State; |
duke@435 | 1357 | s->_kids[0] = NULL; |
duke@435 | 1358 | s->_kids[1] = NULL; |
duke@435 | 1359 | s->_leaf = (Node*)n; |
duke@435 | 1360 | // Label the input tree, allocating labels from top-level arena |
duke@435 | 1361 | Label_Root( n, s, n->in(0), mem ); |
duke@435 | 1362 | if (C->failing()) return NULL; |
duke@435 | 1363 | |
duke@435 | 1364 | // The minimum cost match for the whole tree is found at the root State |
duke@435 | 1365 | uint mincost = max_juint; |
duke@435 | 1366 | uint cost = max_juint; |
duke@435 | 1367 | uint i; |
duke@435 | 1368 | for( i = 0; i < NUM_OPERANDS; i++ ) { |
duke@435 | 1369 | if( s->valid(i) && // valid entry and |
duke@435 | 1370 | s->_cost[i] < cost && // low cost and |
duke@435 | 1371 | s->_rule[i] >= NUM_OPERANDS ) // not an operand |
duke@435 | 1372 | cost = s->_cost[mincost=i]; |
duke@435 | 1373 | } |
duke@435 | 1374 | if (mincost == max_juint) { |
duke@435 | 1375 | #ifndef PRODUCT |
duke@435 | 1376 | tty->print("No matching rule for:"); |
duke@435 | 1377 | s->dump(); |
duke@435 | 1378 | #endif |
duke@435 | 1379 | Matcher::soft_match_failure(); |
duke@435 | 1380 | return NULL; |
duke@435 | 1381 | } |
duke@435 | 1382 | // Reduce input tree based upon the state labels to machine Nodes |
duke@435 | 1383 | MachNode *m = ReduceInst( s, s->_rule[mincost], mem ); |
duke@435 | 1384 | #ifdef ASSERT |
duke@435 | 1385 | _old2new_map.map(n->_idx, m); |
never@657 | 1386 | _new2old_map.map(m->_idx, (Node*)n); |
duke@435 | 1387 | #endif |
duke@435 | 1388 | |
duke@435 | 1389 | // Add any Matcher-ignored edges |
duke@435 | 1390 | uint cnt = n->req(); |
duke@435 | 1391 | uint start = 1; |
duke@435 | 1392 | if( mem != (Node*)1 ) start = MemNode::Memory+1; |
kvn@603 | 1393 | if( n->is_AddP() ) { |
duke@435 | 1394 | assert( mem == (Node*)1, "" ); |
duke@435 | 1395 | start = AddPNode::Base+1; |
duke@435 | 1396 | } |
duke@435 | 1397 | for( i = start; i < cnt; i++ ) { |
duke@435 | 1398 | if( !n->match_edge(i) ) { |
duke@435 | 1399 | if( i < m->req() ) |
duke@435 | 1400 | m->ins_req( i, n->in(i) ); |
duke@435 | 1401 | else |
duke@435 | 1402 | m->add_req( n->in(i) ); |
duke@435 | 1403 | } |
duke@435 | 1404 | } |
duke@435 | 1405 | |
kvn@651 | 1406 | debug_only( _mem_node = save_mem_node; ) |
duke@435 | 1407 | return m; |
duke@435 | 1408 | } |
duke@435 | 1409 | |
duke@435 | 1410 | |
duke@435 | 1411 | //------------------------------match_into_reg--------------------------------- |
duke@435 | 1412 | // Choose to either match this Node in a register or part of the current |
duke@435 | 1413 | // match tree. Return true for requiring a register and false for matching |
duke@435 | 1414 | // as part of the current match tree. |
duke@435 | 1415 | static bool match_into_reg( const Node *n, Node *m, Node *control, int i, bool shared ) { |
duke@435 | 1416 | |
duke@435 | 1417 | const Type *t = m->bottom_type(); |
duke@435 | 1418 | |
kvn@3390 | 1419 | if (t->singleton()) { |
duke@435 | 1420 | // Never force constants into registers. Allow them to match as |
duke@435 | 1421 | // constants or registers. Copies of the same value will share |
kvn@603 | 1422 | // the same register. See find_shared_node. |
duke@435 | 1423 | return false; |
duke@435 | 1424 | } else { // Not a constant |
duke@435 | 1425 | // Stop recursion if they have different Controls. |
kvn@3390 | 1426 | Node* m_control = m->in(0); |
kvn@3390 | 1427 | // Control of load's memory can post-dominates load's control. |
kvn@3390 | 1428 | // So use it since load can't float above its memory. |
kvn@3390 | 1429 | Node* mem_control = (m->is_Load()) ? m->in(MemNode::Memory)->in(0) : NULL; |
kvn@3390 | 1430 | if (control && m_control && control != m_control && control != mem_control) { |
duke@435 | 1431 | |
duke@435 | 1432 | // Actually, we can live with the most conservative control we |
duke@435 | 1433 | // find, if it post-dominates the others. This allows us to |
duke@435 | 1434 | // pick up load/op/store trees where the load can float a little |
duke@435 | 1435 | // above the store. |
duke@435 | 1436 | Node *x = control; |
kvn@3390 | 1437 | const uint max_scan = 6; // Arbitrary scan cutoff |
duke@435 | 1438 | uint j; |
kvn@3390 | 1439 | for (j=0; j<max_scan; j++) { |
kvn@3390 | 1440 | if (x->is_Region()) // Bail out at merge points |
duke@435 | 1441 | return true; |
duke@435 | 1442 | x = x->in(0); |
kvn@3390 | 1443 | if (x == m_control) // Does 'control' post-dominate |
duke@435 | 1444 | break; // m->in(0)? If so, we can use it |
kvn@3390 | 1445 | if (x == mem_control) // Does 'control' post-dominate |
kvn@3390 | 1446 | break; // mem_control? If so, we can use it |
duke@435 | 1447 | } |
kvn@3390 | 1448 | if (j == max_scan) // No post-domination before scan end? |
duke@435 | 1449 | return true; // Then break the match tree up |
duke@435 | 1450 | } |
roland@4159 | 1451 | if ((m->is_DecodeN() && Matcher::narrow_oop_use_complex_address()) || |
roland@4159 | 1452 | (m->is_DecodeNKlass() && Matcher::narrow_klass_use_complex_address())) { |
coleenp@548 | 1453 | // These are commonly used in address expressions and can |
kvn@603 | 1454 | // efficiently fold into them on X64 in some cases. |
kvn@603 | 1455 | return false; |
coleenp@548 | 1456 | } |
duke@435 | 1457 | } |
duke@435 | 1458 | |
twisti@1040 | 1459 | // Not forceable cloning. If shared, put it into a register. |
duke@435 | 1460 | return shared; |
duke@435 | 1461 | } |
duke@435 | 1462 | |
duke@435 | 1463 | |
duke@435 | 1464 | //------------------------------Instruction Selection-------------------------- |
duke@435 | 1465 | // Label method walks a "tree" of nodes, using the ADLC generated DFA to match |
duke@435 | 1466 | // ideal nodes to machine instructions. Trees are delimited by shared Nodes, |
duke@435 | 1467 | // things the Matcher does not match (e.g., Memory), and things with different |
duke@435 | 1468 | // Controls (hence forced into different blocks). We pass in the Control |
duke@435 | 1469 | // selected for this entire State tree. |
duke@435 | 1470 | |
duke@435 | 1471 | // The Matcher works on Trees, but an Intel add-to-memory requires a DAG: the |
duke@435 | 1472 | // Store and the Load must have identical Memories (as well as identical |
duke@435 | 1473 | // pointers). Since the Matcher does not have anything for Memory (and |
duke@435 | 1474 | // does not handle DAGs), I have to match the Memory input myself. If the |
duke@435 | 1475 | // Tree root is a Store, I require all Loads to have the identical memory. |
duke@435 | 1476 | Node *Matcher::Label_Root( const Node *n, State *svec, Node *control, const Node *mem){ |
duke@435 | 1477 | // Since Label_Root is a recursive function, its possible that we might run |
duke@435 | 1478 | // out of stack space. See bugs 6272980 & 6227033 for more info. |
duke@435 | 1479 | LabelRootDepth++; |
duke@435 | 1480 | if (LabelRootDepth > MaxLabelRootDepth) { |
duke@435 | 1481 | C->record_method_not_compilable_all_tiers("Out of stack space, increase MaxLabelRootDepth"); |
duke@435 | 1482 | return NULL; |
duke@435 | 1483 | } |
duke@435 | 1484 | uint care = 0; // Edges matcher cares about |
duke@435 | 1485 | uint cnt = n->req(); |
duke@435 | 1486 | uint i = 0; |
duke@435 | 1487 | |
duke@435 | 1488 | // Examine children for memory state |
duke@435 | 1489 | // Can only subsume a child into your match-tree if that child's memory state |
duke@435 | 1490 | // is not modified along the path to another input. |
duke@435 | 1491 | // It is unsafe even if the other inputs are separate roots. |
duke@435 | 1492 | Node *input_mem = NULL; |
duke@435 | 1493 | for( i = 1; i < cnt; i++ ) { |
duke@435 | 1494 | if( !n->match_edge(i) ) continue; |
duke@435 | 1495 | Node *m = n->in(i); // Get ith input |
duke@435 | 1496 | assert( m, "expect non-null children" ); |
duke@435 | 1497 | if( m->is_Load() ) { |
duke@435 | 1498 | if( input_mem == NULL ) { |
duke@435 | 1499 | input_mem = m->in(MemNode::Memory); |
duke@435 | 1500 | } else if( input_mem != m->in(MemNode::Memory) ) { |
duke@435 | 1501 | input_mem = NodeSentinel; |
duke@435 | 1502 | } |
duke@435 | 1503 | } |
duke@435 | 1504 | } |
duke@435 | 1505 | |
duke@435 | 1506 | for( i = 1; i < cnt; i++ ){// For my children |
duke@435 | 1507 | if( !n->match_edge(i) ) continue; |
duke@435 | 1508 | Node *m = n->in(i); // Get ith input |
duke@435 | 1509 | // Allocate states out of a private arena |
duke@435 | 1510 | State *s = new (&_states_arena) State; |
duke@435 | 1511 | svec->_kids[care++] = s; |
duke@435 | 1512 | assert( care <= 2, "binary only for now" ); |
duke@435 | 1513 | |
duke@435 | 1514 | // Recursively label the State tree. |
duke@435 | 1515 | s->_kids[0] = NULL; |
duke@435 | 1516 | s->_kids[1] = NULL; |
duke@435 | 1517 | s->_leaf = m; |
duke@435 | 1518 | |
duke@435 | 1519 | // Check for leaves of the State Tree; things that cannot be a part of |
duke@435 | 1520 | // the current tree. If it finds any, that value is matched as a |
duke@435 | 1521 | // register operand. If not, then the normal matching is used. |
duke@435 | 1522 | if( match_into_reg(n, m, control, i, is_shared(m)) || |
duke@435 | 1523 | // |
duke@435 | 1524 | // Stop recursion if this is LoadNode and the root of this tree is a |
duke@435 | 1525 | // StoreNode and the load & store have different memories. |
duke@435 | 1526 | ((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) || |
duke@435 | 1527 | // Can NOT include the match of a subtree when its memory state |
duke@435 | 1528 | // is used by any of the other subtrees |
duke@435 | 1529 | (input_mem == NodeSentinel) ) { |
duke@435 | 1530 | #ifndef PRODUCT |
duke@435 | 1531 | // Print when we exclude matching due to different memory states at input-loads |
duke@435 | 1532 | if( PrintOpto && (Verbose && WizardMode) && (input_mem == NodeSentinel) |
duke@435 | 1533 | && !((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) ) { |
duke@435 | 1534 | tty->print_cr("invalid input_mem"); |
duke@435 | 1535 | } |
duke@435 | 1536 | #endif |
duke@435 | 1537 | // Switch to a register-only opcode; this value must be in a register |
duke@435 | 1538 | // and cannot be subsumed as part of a larger instruction. |
duke@435 | 1539 | s->DFA( m->ideal_reg(), m ); |
duke@435 | 1540 | |
duke@435 | 1541 | } else { |
duke@435 | 1542 | // If match tree has no control and we do, adopt it for entire tree |
duke@435 | 1543 | if( control == NULL && m->in(0) != NULL && m->req() > 1 ) |
duke@435 | 1544 | control = m->in(0); // Pick up control |
duke@435 | 1545 | // Else match as a normal part of the match tree. |
duke@435 | 1546 | control = Label_Root(m,s,control,mem); |
duke@435 | 1547 | if (C->failing()) return NULL; |
duke@435 | 1548 | } |
duke@435 | 1549 | } |
duke@435 | 1550 | |
duke@435 | 1551 | |
duke@435 | 1552 | // Call DFA to match this node, and return |
duke@435 | 1553 | svec->DFA( n->Opcode(), n ); |
duke@435 | 1554 | |
duke@435 | 1555 | #ifdef ASSERT |
duke@435 | 1556 | uint x; |
duke@435 | 1557 | for( x = 0; x < _LAST_MACH_OPER; x++ ) |
duke@435 | 1558 | if( svec->valid(x) ) |
duke@435 | 1559 | break; |
duke@435 | 1560 | |
duke@435 | 1561 | if (x >= _LAST_MACH_OPER) { |
duke@435 | 1562 | n->dump(); |
duke@435 | 1563 | svec->dump(); |
duke@435 | 1564 | assert( false, "bad AD file" ); |
duke@435 | 1565 | } |
duke@435 | 1566 | #endif |
duke@435 | 1567 | return control; |
duke@435 | 1568 | } |
duke@435 | 1569 | |
duke@435 | 1570 | |
duke@435 | 1571 | // Con nodes reduced using the same rule can share their MachNode |
duke@435 | 1572 | // which reduces the number of copies of a constant in the final |
duke@435 | 1573 | // program. The register allocator is free to split uses later to |
duke@435 | 1574 | // split live ranges. |
kvn@603 | 1575 | MachNode* Matcher::find_shared_node(Node* leaf, uint rule) { |
roland@4159 | 1576 | if (!leaf->is_Con() && !leaf->is_DecodeNarrowPtr()) return NULL; |
duke@435 | 1577 | |
duke@435 | 1578 | // See if this Con has already been reduced using this rule. |
kvn@603 | 1579 | if (_shared_nodes.Size() <= leaf->_idx) return NULL; |
kvn@603 | 1580 | MachNode* last = (MachNode*)_shared_nodes.at(leaf->_idx); |
duke@435 | 1581 | if (last != NULL && rule == last->rule()) { |
kvn@603 | 1582 | // Don't expect control change for DecodeN |
roland@4159 | 1583 | if (leaf->is_DecodeNarrowPtr()) |
kvn@603 | 1584 | return last; |
duke@435 | 1585 | // Get the new space root. |
duke@435 | 1586 | Node* xroot = new_node(C->root()); |
duke@435 | 1587 | if (xroot == NULL) { |
duke@435 | 1588 | // This shouldn't happen give the order of matching. |
duke@435 | 1589 | return NULL; |
duke@435 | 1590 | } |
duke@435 | 1591 | |
duke@435 | 1592 | // Shared constants need to have their control be root so they |
duke@435 | 1593 | // can be scheduled properly. |
duke@435 | 1594 | Node* control = last->in(0); |
duke@435 | 1595 | if (control != xroot) { |
duke@435 | 1596 | if (control == NULL || control == C->root()) { |
duke@435 | 1597 | last->set_req(0, xroot); |
duke@435 | 1598 | } else { |
duke@435 | 1599 | assert(false, "unexpected control"); |
duke@435 | 1600 | return NULL; |
duke@435 | 1601 | } |
duke@435 | 1602 | } |
duke@435 | 1603 | return last; |
duke@435 | 1604 | } |
duke@435 | 1605 | return NULL; |
duke@435 | 1606 | } |
duke@435 | 1607 | |
duke@435 | 1608 | |
duke@435 | 1609 | //------------------------------ReduceInst------------------------------------- |
duke@435 | 1610 | // Reduce a State tree (with given Control) into a tree of MachNodes. |
duke@435 | 1611 | // This routine (and it's cohort ReduceOper) convert Ideal Nodes into |
duke@435 | 1612 | // complicated machine Nodes. Each MachNode covers some tree of Ideal Nodes. |
duke@435 | 1613 | // Each MachNode has a number of complicated MachOper operands; each |
duke@435 | 1614 | // MachOper also covers a further tree of Ideal Nodes. |
duke@435 | 1615 | |
duke@435 | 1616 | // The root of the Ideal match tree is always an instruction, so we enter |
duke@435 | 1617 | // the recursion here. After building the MachNode, we need to recurse |
duke@435 | 1618 | // the tree checking for these cases: |
duke@435 | 1619 | // (1) Child is an instruction - |
duke@435 | 1620 | // Build the instruction (recursively), add it as an edge. |
duke@435 | 1621 | // Build a simple operand (register) to hold the result of the instruction. |
duke@435 | 1622 | // (2) Child is an interior part of an instruction - |
duke@435 | 1623 | // Skip over it (do nothing) |
duke@435 | 1624 | // (3) Child is the start of a operand - |
duke@435 | 1625 | // Build the operand, place it inside the instruction |
duke@435 | 1626 | // Call ReduceOper. |
duke@435 | 1627 | MachNode *Matcher::ReduceInst( State *s, int rule, Node *&mem ) { |
duke@435 | 1628 | assert( rule >= NUM_OPERANDS, "called with operand rule" ); |
duke@435 | 1629 | |
kvn@603 | 1630 | MachNode* shared_node = find_shared_node(s->_leaf, rule); |
kvn@603 | 1631 | if (shared_node != NULL) { |
kvn@603 | 1632 | return shared_node; |
duke@435 | 1633 | } |
duke@435 | 1634 | |
duke@435 | 1635 | // Build the object to represent this state & prepare for recursive calls |
duke@435 | 1636 | MachNode *mach = s->MachNodeGenerator( rule, C ); |
duke@435 | 1637 | mach->_opnds[0] = s->MachOperGenerator( _reduceOp[rule], C ); |
duke@435 | 1638 | assert( mach->_opnds[0] != NULL, "Missing result operand" ); |
duke@435 | 1639 | Node *leaf = s->_leaf; |
duke@435 | 1640 | // Check for instruction or instruction chain rule |
duke@435 | 1641 | if( rule >= _END_INST_CHAIN_RULE || rule < _BEGIN_INST_CHAIN_RULE ) { |
never@744 | 1642 | assert(C->node_arena()->contains(s->_leaf) || !has_new_node(s->_leaf), |
never@744 | 1643 | "duplicating node that's already been matched"); |
duke@435 | 1644 | // Instruction |
duke@435 | 1645 | mach->add_req( leaf->in(0) ); // Set initial control |
duke@435 | 1646 | // Reduce interior of complex instruction |
duke@435 | 1647 | ReduceInst_Interior( s, rule, mem, mach, 1 ); |
duke@435 | 1648 | } else { |
duke@435 | 1649 | // Instruction chain rules are data-dependent on their inputs |
duke@435 | 1650 | mach->add_req(0); // Set initial control to none |
duke@435 | 1651 | ReduceInst_Chain_Rule( s, rule, mem, mach ); |
duke@435 | 1652 | } |
duke@435 | 1653 | |
duke@435 | 1654 | // If a Memory was used, insert a Memory edge |
kvn@651 | 1655 | if( mem != (Node*)1 ) { |
duke@435 | 1656 | mach->ins_req(MemNode::Memory,mem); |
kvn@651 | 1657 | #ifdef ASSERT |
kvn@651 | 1658 | // Verify adr type after matching memory operation |
kvn@651 | 1659 | const MachOper* oper = mach->memory_operand(); |
kvn@1286 | 1660 | if (oper != NULL && oper != (MachOper*)-1) { |
kvn@651 | 1661 | // It has a unique memory operand. Find corresponding ideal mem node. |
kvn@651 | 1662 | Node* m = NULL; |
kvn@651 | 1663 | if (leaf->is_Mem()) { |
kvn@651 | 1664 | m = leaf; |
kvn@651 | 1665 | } else { |
kvn@651 | 1666 | m = _mem_node; |
kvn@651 | 1667 | assert(m != NULL && m->is_Mem(), "expecting memory node"); |
kvn@651 | 1668 | } |
kvn@803 | 1669 | const Type* mach_at = mach->adr_type(); |
kvn@803 | 1670 | // DecodeN node consumed by an address may have different type |
kvn@803 | 1671 | // then its input. Don't compare types for such case. |
kvn@1077 | 1672 | if (m->adr_type() != mach_at && |
roland@4159 | 1673 | (m->in(MemNode::Address)->is_DecodeNarrowPtr() || |
kvn@1077 | 1674 | m->in(MemNode::Address)->is_AddP() && |
roland@4159 | 1675 | m->in(MemNode::Address)->in(AddPNode::Address)->is_DecodeNarrowPtr() || |
kvn@1077 | 1676 | m->in(MemNode::Address)->is_AddP() && |
kvn@1077 | 1677 | m->in(MemNode::Address)->in(AddPNode::Address)->is_AddP() && |
roland@4159 | 1678 | m->in(MemNode::Address)->in(AddPNode::Address)->in(AddPNode::Address)->is_DecodeNarrowPtr())) { |
kvn@803 | 1679 | mach_at = m->adr_type(); |
kvn@803 | 1680 | } |
kvn@803 | 1681 | if (m->adr_type() != mach_at) { |
kvn@651 | 1682 | m->dump(); |
kvn@651 | 1683 | tty->print_cr("mach:"); |
kvn@651 | 1684 | mach->dump(1); |
kvn@651 | 1685 | } |
kvn@803 | 1686 | assert(m->adr_type() == mach_at, "matcher should not change adr type"); |
kvn@651 | 1687 | } |
kvn@651 | 1688 | #endif |
kvn@651 | 1689 | } |
duke@435 | 1690 | |
duke@435 | 1691 | // If the _leaf is an AddP, insert the base edge |
adlertz@5539 | 1692 | if (leaf->is_AddP()) { |
duke@435 | 1693 | mach->ins_req(AddPNode::Base,leaf->in(AddPNode::Base)); |
adlertz@5539 | 1694 | } |
duke@435 | 1695 | |
adlertz@5539 | 1696 | uint number_of_projections_prior = number_of_projections(); |
duke@435 | 1697 | |
duke@435 | 1698 | // Perform any 1-to-many expansions required |
adlertz@5539 | 1699 | MachNode *ex = mach->Expand(s, _projection_list, mem); |
adlertz@5539 | 1700 | if (ex != mach) { |
duke@435 | 1701 | assert(ex->ideal_reg() == mach->ideal_reg(), "ideal types should match"); |
duke@435 | 1702 | if( ex->in(1)->is_Con() ) |
duke@435 | 1703 | ex->in(1)->set_req(0, C->root()); |
duke@435 | 1704 | // Remove old node from the graph |
duke@435 | 1705 | for( uint i=0; i<mach->req(); i++ ) { |
duke@435 | 1706 | mach->set_req(i,NULL); |
duke@435 | 1707 | } |
never@657 | 1708 | #ifdef ASSERT |
never@657 | 1709 | _new2old_map.map(ex->_idx, s->_leaf); |
never@657 | 1710 | #endif |
duke@435 | 1711 | } |
duke@435 | 1712 | |
duke@435 | 1713 | // PhaseChaitin::fixup_spills will sometimes generate spill code |
duke@435 | 1714 | // via the matcher. By the time, nodes have been wired into the CFG, |
duke@435 | 1715 | // and any further nodes generated by expand rules will be left hanging |
duke@435 | 1716 | // in space, and will not get emitted as output code. Catch this. |
duke@435 | 1717 | // Also, catch any new register allocation constraints ("projections") |
duke@435 | 1718 | // generated belatedly during spill code generation. |
duke@435 | 1719 | if (_allocation_started) { |
duke@435 | 1720 | guarantee(ex == mach, "no expand rules during spill generation"); |
adlertz@5539 | 1721 | guarantee(number_of_projections_prior == number_of_projections(), "no allocation during spill generation"); |
duke@435 | 1722 | } |
duke@435 | 1723 | |
roland@4159 | 1724 | if (leaf->is_Con() || leaf->is_DecodeNarrowPtr()) { |
duke@435 | 1725 | // Record the con for sharing |
kvn@603 | 1726 | _shared_nodes.map(leaf->_idx, ex); |
duke@435 | 1727 | } |
duke@435 | 1728 | |
duke@435 | 1729 | return ex; |
duke@435 | 1730 | } |
duke@435 | 1731 | |
duke@435 | 1732 | void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) { |
duke@435 | 1733 | // 'op' is what I am expecting to receive |
duke@435 | 1734 | int op = _leftOp[rule]; |
duke@435 | 1735 | // Operand type to catch childs result |
duke@435 | 1736 | // This is what my child will give me. |
duke@435 | 1737 | int opnd_class_instance = s->_rule[op]; |
duke@435 | 1738 | // Choose between operand class or not. |
twisti@1040 | 1739 | // This is what I will receive. |
duke@435 | 1740 | int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op; |
duke@435 | 1741 | // New rule for child. Chase operand classes to get the actual rule. |
duke@435 | 1742 | int newrule = s->_rule[catch_op]; |
duke@435 | 1743 | |
duke@435 | 1744 | if( newrule < NUM_OPERANDS ) { |
duke@435 | 1745 | // Chain from operand or operand class, may be output of shared node |
duke@435 | 1746 | assert( 0 <= opnd_class_instance && opnd_class_instance < NUM_OPERANDS, |
duke@435 | 1747 | "Bad AD file: Instruction chain rule must chain from operand"); |
duke@435 | 1748 | // Insert operand into array of operands for this instruction |
duke@435 | 1749 | mach->_opnds[1] = s->MachOperGenerator( opnd_class_instance, C ); |
duke@435 | 1750 | |
duke@435 | 1751 | ReduceOper( s, newrule, mem, mach ); |
duke@435 | 1752 | } else { |
duke@435 | 1753 | // Chain from the result of an instruction |
duke@435 | 1754 | assert( newrule >= _LAST_MACH_OPER, "Do NOT chain from internal operand"); |
duke@435 | 1755 | mach->_opnds[1] = s->MachOperGenerator( _reduceOp[catch_op], C ); |
duke@435 | 1756 | Node *mem1 = (Node*)1; |
kvn@651 | 1757 | debug_only(Node *save_mem_node = _mem_node;) |
duke@435 | 1758 | mach->add_req( ReduceInst(s, newrule, mem1) ); |
kvn@651 | 1759 | debug_only(_mem_node = save_mem_node;) |
duke@435 | 1760 | } |
duke@435 | 1761 | return; |
duke@435 | 1762 | } |
duke@435 | 1763 | |
duke@435 | 1764 | |
duke@435 | 1765 | uint Matcher::ReduceInst_Interior( State *s, int rule, Node *&mem, MachNode *mach, uint num_opnds ) { |
duke@435 | 1766 | if( s->_leaf->is_Load() ) { |
duke@435 | 1767 | Node *mem2 = s->_leaf->in(MemNode::Memory); |
duke@435 | 1768 | assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" ); |
kvn@651 | 1769 | debug_only( if( mem == (Node*)1 ) _mem_node = s->_leaf;) |
duke@435 | 1770 | mem = mem2; |
duke@435 | 1771 | } |
duke@435 | 1772 | if( s->_leaf->in(0) != NULL && s->_leaf->req() > 1) { |
duke@435 | 1773 | if( mach->in(0) == NULL ) |
duke@435 | 1774 | mach->set_req(0, s->_leaf->in(0)); |
duke@435 | 1775 | } |
duke@435 | 1776 | |
duke@435 | 1777 | // Now recursively walk the state tree & add operand list. |
duke@435 | 1778 | for( uint i=0; i<2; i++ ) { // binary tree |
duke@435 | 1779 | State *newstate = s->_kids[i]; |
duke@435 | 1780 | if( newstate == NULL ) break; // Might only have 1 child |
duke@435 | 1781 | // 'op' is what I am expecting to receive |
duke@435 | 1782 | int op; |
duke@435 | 1783 | if( i == 0 ) { |
duke@435 | 1784 | op = _leftOp[rule]; |
duke@435 | 1785 | } else { |
duke@435 | 1786 | op = _rightOp[rule]; |
duke@435 | 1787 | } |
duke@435 | 1788 | // Operand type to catch childs result |
duke@435 | 1789 | // This is what my child will give me. |
duke@435 | 1790 | int opnd_class_instance = newstate->_rule[op]; |
duke@435 | 1791 | // Choose between operand class or not. |
duke@435 | 1792 | // This is what I will receive. |
duke@435 | 1793 | int catch_op = (op >= FIRST_OPERAND_CLASS && op < NUM_OPERANDS) ? opnd_class_instance : op; |
duke@435 | 1794 | // New rule for child. Chase operand classes to get the actual rule. |
duke@435 | 1795 | int newrule = newstate->_rule[catch_op]; |
duke@435 | 1796 | |
duke@435 | 1797 | if( newrule < NUM_OPERANDS ) { // Operand/operandClass or internalOp/instruction? |
duke@435 | 1798 | // Operand/operandClass |
duke@435 | 1799 | // Insert operand into array of operands for this instruction |
duke@435 | 1800 | mach->_opnds[num_opnds++] = newstate->MachOperGenerator( opnd_class_instance, C ); |
duke@435 | 1801 | ReduceOper( newstate, newrule, mem, mach ); |
duke@435 | 1802 | |
duke@435 | 1803 | } else { // Child is internal operand or new instruction |
duke@435 | 1804 | if( newrule < _LAST_MACH_OPER ) { // internal operand or instruction? |
duke@435 | 1805 | // internal operand --> call ReduceInst_Interior |
duke@435 | 1806 | // Interior of complex instruction. Do nothing but recurse. |
duke@435 | 1807 | num_opnds = ReduceInst_Interior( newstate, newrule, mem, mach, num_opnds ); |
duke@435 | 1808 | } else { |
duke@435 | 1809 | // instruction --> call build operand( ) to catch result |
duke@435 | 1810 | // --> ReduceInst( newrule ) |
duke@435 | 1811 | mach->_opnds[num_opnds++] = s->MachOperGenerator( _reduceOp[catch_op], C ); |
duke@435 | 1812 | Node *mem1 = (Node*)1; |
kvn@651 | 1813 | debug_only(Node *save_mem_node = _mem_node;) |
duke@435 | 1814 | mach->add_req( ReduceInst( newstate, newrule, mem1 ) ); |
kvn@651 | 1815 | debug_only(_mem_node = save_mem_node;) |
duke@435 | 1816 | } |
duke@435 | 1817 | } |
duke@435 | 1818 | assert( mach->_opnds[num_opnds-1], "" ); |
duke@435 | 1819 | } |
duke@435 | 1820 | return num_opnds; |
duke@435 | 1821 | } |
duke@435 | 1822 | |
duke@435 | 1823 | // This routine walks the interior of possible complex operands. |
duke@435 | 1824 | // At each point we check our children in the match tree: |
duke@435 | 1825 | // (1) No children - |
duke@435 | 1826 | // We are a leaf; add _leaf field as an input to the MachNode |
duke@435 | 1827 | // (2) Child is an internal operand - |
duke@435 | 1828 | // Skip over it ( do nothing ) |
duke@435 | 1829 | // (3) Child is an instruction - |
duke@435 | 1830 | // Call ReduceInst recursively and |
duke@435 | 1831 | // and instruction as an input to the MachNode |
duke@435 | 1832 | void Matcher::ReduceOper( State *s, int rule, Node *&mem, MachNode *mach ) { |
duke@435 | 1833 | assert( rule < _LAST_MACH_OPER, "called with operand rule" ); |
duke@435 | 1834 | State *kid = s->_kids[0]; |
duke@435 | 1835 | assert( kid == NULL || s->_leaf->in(0) == NULL, "internal operands have no control" ); |
duke@435 | 1836 | |
duke@435 | 1837 | // Leaf? And not subsumed? |
duke@435 | 1838 | if( kid == NULL && !_swallowed[rule] ) { |
duke@435 | 1839 | mach->add_req( s->_leaf ); // Add leaf pointer |
duke@435 | 1840 | return; // Bail out |
duke@435 | 1841 | } |
duke@435 | 1842 | |
duke@435 | 1843 | if( s->_leaf->is_Load() ) { |
duke@435 | 1844 | assert( mem == (Node*)1, "multiple Memories being matched at once?" ); |
duke@435 | 1845 | mem = s->_leaf->in(MemNode::Memory); |
kvn@651 | 1846 | debug_only(_mem_node = s->_leaf;) |
duke@435 | 1847 | } |
duke@435 | 1848 | if( s->_leaf->in(0) && s->_leaf->req() > 1) { |
duke@435 | 1849 | if( !mach->in(0) ) |
duke@435 | 1850 | mach->set_req(0,s->_leaf->in(0)); |
duke@435 | 1851 | else { |
duke@435 | 1852 | assert( s->_leaf->in(0) == mach->in(0), "same instruction, differing controls?" ); |
duke@435 | 1853 | } |
duke@435 | 1854 | } |
duke@435 | 1855 | |
duke@435 | 1856 | for( uint i=0; kid != NULL && i<2; kid = s->_kids[1], i++ ) { // binary tree |
duke@435 | 1857 | int newrule; |
sla@5237 | 1858 | if( i == 0) |
duke@435 | 1859 | newrule = kid->_rule[_leftOp[rule]]; |
duke@435 | 1860 | else |
duke@435 | 1861 | newrule = kid->_rule[_rightOp[rule]]; |
duke@435 | 1862 | |
duke@435 | 1863 | if( newrule < _LAST_MACH_OPER ) { // Operand or instruction? |
duke@435 | 1864 | // Internal operand; recurse but do nothing else |
duke@435 | 1865 | ReduceOper( kid, newrule, mem, mach ); |
duke@435 | 1866 | |
duke@435 | 1867 | } else { // Child is a new instruction |
duke@435 | 1868 | // Reduce the instruction, and add a direct pointer from this |
duke@435 | 1869 | // machine instruction to the newly reduced one. |
duke@435 | 1870 | Node *mem1 = (Node*)1; |
kvn@651 | 1871 | debug_only(Node *save_mem_node = _mem_node;) |
duke@435 | 1872 | mach->add_req( ReduceInst( kid, newrule, mem1 ) ); |
kvn@651 | 1873 | debug_only(_mem_node = save_mem_node;) |
duke@435 | 1874 | } |
duke@435 | 1875 | } |
duke@435 | 1876 | } |
duke@435 | 1877 | |
duke@435 | 1878 | |
duke@435 | 1879 | // ------------------------------------------------------------------------- |
duke@435 | 1880 | // Java-Java calling convention |
duke@435 | 1881 | // (what you use when Java calls Java) |
duke@435 | 1882 | |
duke@435 | 1883 | //------------------------------find_receiver---------------------------------- |
duke@435 | 1884 | // For a given signature, return the OptoReg for parameter 0. |
duke@435 | 1885 | OptoReg::Name Matcher::find_receiver( bool is_outgoing ) { |
duke@435 | 1886 | VMRegPair regs; |
duke@435 | 1887 | BasicType sig_bt = T_OBJECT; |
duke@435 | 1888 | calling_convention(&sig_bt, ®s, 1, is_outgoing); |
duke@435 | 1889 | // Return argument 0 register. In the LP64 build pointers |
duke@435 | 1890 | // take 2 registers, but the VM wants only the 'main' name. |
duke@435 | 1891 | return OptoReg::as_OptoReg(regs.first()); |
duke@435 | 1892 | } |
duke@435 | 1893 | |
duke@435 | 1894 | // A method-klass-holder may be passed in the inline_cache_reg |
duke@435 | 1895 | // and then expanded into the inline_cache_reg and a method_oop register |
duke@435 | 1896 | // defined in ad_<arch>.cpp |
duke@435 | 1897 | |
duke@435 | 1898 | |
duke@435 | 1899 | //------------------------------find_shared------------------------------------ |
duke@435 | 1900 | // Set bits if Node is shared or otherwise a root |
duke@435 | 1901 | void Matcher::find_shared( Node *n ) { |
duke@435 | 1902 | // Allocate stack of size C->unique() * 2 to avoid frequent realloc |
duke@435 | 1903 | MStack mstack(C->unique() * 2); |
kvn@1021 | 1904 | // Mark nodes as address_visited if they are inputs to an address expression |
kvn@1021 | 1905 | VectorSet address_visited(Thread::current()->resource_area()); |
duke@435 | 1906 | mstack.push(n, Visit); // Don't need to pre-visit root node |
duke@435 | 1907 | while (mstack.is_nonempty()) { |
duke@435 | 1908 | n = mstack.node(); // Leave node on stack |
duke@435 | 1909 | Node_State nstate = mstack.state(); |
kvn@1021 | 1910 | uint nop = n->Opcode(); |
duke@435 | 1911 | if (nstate == Pre_Visit) { |
kvn@1021 | 1912 | if (address_visited.test(n->_idx)) { // Visited in address already? |
kvn@1021 | 1913 | // Flag as visited and shared now. |
kvn@1021 | 1914 | set_visited(n); |
kvn@1021 | 1915 | } |
duke@435 | 1916 | if (is_visited(n)) { // Visited already? |
duke@435 | 1917 | // Node is shared and has no reason to clone. Flag it as shared. |
duke@435 | 1918 | // This causes it to match into a register for the sharing. |
duke@435 | 1919 | set_shared(n); // Flag as shared and |
duke@435 | 1920 | mstack.pop(); // remove node from stack |
duke@435 | 1921 | continue; |
duke@435 | 1922 | } |
duke@435 | 1923 | nstate = Visit; // Not already visited; so visit now |
duke@435 | 1924 | } |
duke@435 | 1925 | if (nstate == Visit) { |
duke@435 | 1926 | mstack.set_state(Post_Visit); |
duke@435 | 1927 | set_visited(n); // Flag as visited now |
duke@435 | 1928 | bool mem_op = false; |
duke@435 | 1929 | |
kvn@1021 | 1930 | switch( nop ) { // Handle some opcodes special |
duke@435 | 1931 | case Op_Phi: // Treat Phis as shared roots |
duke@435 | 1932 | case Op_Parm: |
duke@435 | 1933 | case Op_Proj: // All handled specially during matching |
kvn@498 | 1934 | case Op_SafePointScalarObject: |
duke@435 | 1935 | set_shared(n); |
duke@435 | 1936 | set_dontcare(n); |
duke@435 | 1937 | break; |
duke@435 | 1938 | case Op_If: |
duke@435 | 1939 | case Op_CountedLoopEnd: |
duke@435 | 1940 | mstack.set_state(Alt_Post_Visit); // Alternative way |
duke@435 | 1941 | // Convert (If (Bool (CmpX A B))) into (If (Bool) (CmpX A B)). Helps |
duke@435 | 1942 | // with matching cmp/branch in 1 instruction. The Matcher needs the |
duke@435 | 1943 | // Bool and CmpX side-by-side, because it can only get at constants |
duke@435 | 1944 | // that are at the leaves of Match trees, and the Bool's condition acts |
duke@435 | 1945 | // as a constant here. |
duke@435 | 1946 | mstack.push(n->in(1), Visit); // Clone the Bool |
duke@435 | 1947 | mstack.push(n->in(0), Pre_Visit); // Visit control input |
duke@435 | 1948 | continue; // while (mstack.is_nonempty()) |
duke@435 | 1949 | case Op_ConvI2D: // These forms efficiently match with a prior |
duke@435 | 1950 | case Op_ConvI2F: // Load but not a following Store |
duke@435 | 1951 | if( n->in(1)->is_Load() && // Prior load |
duke@435 | 1952 | n->outcnt() == 1 && // Not already shared |
duke@435 | 1953 | n->unique_out()->is_Store() ) // Following store |
duke@435 | 1954 | set_shared(n); // Force it to be a root |
duke@435 | 1955 | break; |
duke@435 | 1956 | case Op_ReverseBytesI: |
duke@435 | 1957 | case Op_ReverseBytesL: |
duke@435 | 1958 | if( n->in(1)->is_Load() && // Prior load |
duke@435 | 1959 | n->outcnt() == 1 ) // Not already shared |
duke@435 | 1960 | set_shared(n); // Force it to be a root |
duke@435 | 1961 | break; |
duke@435 | 1962 | case Op_BoxLock: // Cant match until we get stack-regs in ADLC |
duke@435 | 1963 | case Op_IfFalse: |
duke@435 | 1964 | case Op_IfTrue: |
duke@435 | 1965 | case Op_MachProj: |
duke@435 | 1966 | case Op_MergeMem: |
duke@435 | 1967 | case Op_Catch: |
duke@435 | 1968 | case Op_CatchProj: |
duke@435 | 1969 | case Op_CProj: |
duke@435 | 1970 | case Op_JumpProj: |
duke@435 | 1971 | case Op_JProj: |
duke@435 | 1972 | case Op_NeverBranch: |
duke@435 | 1973 | set_dontcare(n); |
duke@435 | 1974 | break; |
duke@435 | 1975 | case Op_Jump: |
kvn@3260 | 1976 | mstack.push(n->in(1), Pre_Visit); // Switch Value (could be shared) |
duke@435 | 1977 | mstack.push(n->in(0), Pre_Visit); // Visit Control input |
duke@435 | 1978 | continue; // while (mstack.is_nonempty()) |
duke@435 | 1979 | case Op_StrComp: |
cfang@1116 | 1980 | case Op_StrEquals: |
cfang@1116 | 1981 | case Op_StrIndexOf: |
rasbold@604 | 1982 | case Op_AryEq: |
kvn@4479 | 1983 | case Op_EncodeISOArray: |
duke@435 | 1984 | set_shared(n); // Force result into register (it will be anyways) |
duke@435 | 1985 | break; |
duke@435 | 1986 | case Op_ConP: { // Convert pointers above the centerline to NUL |
duke@435 | 1987 | TypeNode *tn = n->as_Type(); // Constants derive from type nodes |
duke@435 | 1988 | const TypePtr* tp = tn->type()->is_ptr(); |
duke@435 | 1989 | if (tp->_ptr == TypePtr::AnyNull) { |
duke@435 | 1990 | tn->set_type(TypePtr::NULL_PTR); |
duke@435 | 1991 | } |
duke@435 | 1992 | break; |
duke@435 | 1993 | } |
kvn@598 | 1994 | case Op_ConN: { // Convert narrow pointers above the centerline to NUL |
kvn@598 | 1995 | TypeNode *tn = n->as_Type(); // Constants derive from type nodes |
kvn@656 | 1996 | const TypePtr* tp = tn->type()->make_ptr(); |
kvn@656 | 1997 | if (tp && tp->_ptr == TypePtr::AnyNull) { |
kvn@598 | 1998 | tn->set_type(TypeNarrowOop::NULL_PTR); |
kvn@598 | 1999 | } |
kvn@598 | 2000 | break; |
kvn@598 | 2001 | } |
duke@435 | 2002 | case Op_Binary: // These are introduced in the Post_Visit state. |
duke@435 | 2003 | ShouldNotReachHere(); |
duke@435 | 2004 | break; |
duke@435 | 2005 | case Op_ClearArray: |
duke@435 | 2006 | case Op_SafePoint: |
duke@435 | 2007 | mem_op = true; |
duke@435 | 2008 | break; |
kvn@1496 | 2009 | default: |
kvn@1496 | 2010 | if( n->is_Store() ) { |
kvn@1496 | 2011 | // Do match stores, despite no ideal reg |
kvn@1496 | 2012 | mem_op = true; |
kvn@1496 | 2013 | break; |
kvn@1496 | 2014 | } |
kvn@1496 | 2015 | if( n->is_Mem() ) { // Loads and LoadStores |
kvn@1496 | 2016 | mem_op = true; |
kvn@1496 | 2017 | // Loads must be root of match tree due to prior load conflict |
kvn@1496 | 2018 | if( C->subsume_loads() == false ) |
kvn@1496 | 2019 | set_shared(n); |
duke@435 | 2020 | } |
duke@435 | 2021 | // Fall into default case |
duke@435 | 2022 | if( !n->ideal_reg() ) |
duke@435 | 2023 | set_dontcare(n); // Unmatchable Nodes |
duke@435 | 2024 | } // end_switch |
duke@435 | 2025 | |
duke@435 | 2026 | for(int i = n->req() - 1; i >= 0; --i) { // For my children |
duke@435 | 2027 | Node *m = n->in(i); // Get ith input |
duke@435 | 2028 | if (m == NULL) continue; // Ignore NULLs |
duke@435 | 2029 | uint mop = m->Opcode(); |
duke@435 | 2030 | |
duke@435 | 2031 | // Must clone all producers of flags, or we will not match correctly. |
duke@435 | 2032 | // Suppose a compare setting int-flags is shared (e.g., a switch-tree) |
duke@435 | 2033 | // then it will match into an ideal Op_RegFlags. Alas, the fp-flags |
duke@435 | 2034 | // are also there, so we may match a float-branch to int-flags and |
duke@435 | 2035 | // expect the allocator to haul the flags from the int-side to the |
duke@435 | 2036 | // fp-side. No can do. |
duke@435 | 2037 | if( _must_clone[mop] ) { |
duke@435 | 2038 | mstack.push(m, Visit); |
duke@435 | 2039 | continue; // for(int i = ...) |
duke@435 | 2040 | } |
duke@435 | 2041 | |
roland@4159 | 2042 | if( mop == Op_AddP && m->in(AddPNode::Base)->is_DecodeNarrowPtr()) { |
kvn@1496 | 2043 | // Bases used in addresses must be shared but since |
kvn@1496 | 2044 | // they are shared through a DecodeN they may appear |
kvn@1496 | 2045 | // to have a single use so force sharing here. |
kvn@1496 | 2046 | set_shared(m->in(AddPNode::Base)->in(1)); |
kvn@1496 | 2047 | } |
kvn@1496 | 2048 | |
kvn@1496 | 2049 | // Clone addressing expressions as they are "free" in memory access instructions |
duke@435 | 2050 | if( mem_op && i == MemNode::Address && mop == Op_AddP ) { |
kvn@1021 | 2051 | // Some inputs for address expression are not put on stack |
kvn@1021 | 2052 | // to avoid marking them as shared and forcing them into register |
kvn@1021 | 2053 | // if they are used only in address expressions. |
kvn@1021 | 2054 | // But they should be marked as shared if there are other uses |
kvn@1021 | 2055 | // besides address expressions. |
kvn@1021 | 2056 | |
duke@435 | 2057 | Node *off = m->in(AddPNode::Offset); |
kvn@1021 | 2058 | if( off->is_Con() && |
kvn@1021 | 2059 | // When there are other uses besides address expressions |
kvn@1021 | 2060 | // put it on stack and mark as shared. |
kvn@1021 | 2061 | !is_visited(m) ) { |
kvn@1021 | 2062 | address_visited.test_set(m->_idx); // Flag as address_visited |
duke@435 | 2063 | Node *adr = m->in(AddPNode::Address); |
duke@435 | 2064 | |
duke@435 | 2065 | // Intel, ARM and friends can handle 2 adds in addressing mode |
kvn@603 | 2066 | if( clone_shift_expressions && adr->is_AddP() && |
duke@435 | 2067 | // AtomicAdd is not an addressing expression. |
duke@435 | 2068 | // Cheap to find it by looking for screwy base. |
kvn@1021 | 2069 | !adr->in(AddPNode::Base)->is_top() && |
kvn@1021 | 2070 | // Are there other uses besides address expressions? |
kvn@1021 | 2071 | !is_visited(adr) ) { |
kvn@1021 | 2072 | address_visited.set(adr->_idx); // Flag as address_visited |
duke@435 | 2073 | Node *shift = adr->in(AddPNode::Offset); |
duke@435 | 2074 | // Check for shift by small constant as well |
duke@435 | 2075 | if( shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() && |
kvn@1021 | 2076 | shift->in(2)->get_int() <= 3 && |
kvn@1021 | 2077 | // Are there other uses besides address expressions? |
kvn@1021 | 2078 | !is_visited(shift) ) { |
kvn@1021 | 2079 | address_visited.set(shift->_idx); // Flag as address_visited |
duke@435 | 2080 | mstack.push(shift->in(2), Visit); |
kvn@1021 | 2081 | Node *conv = shift->in(1); |
duke@435 | 2082 | #ifdef _LP64 |
duke@435 | 2083 | // Allow Matcher to match the rule which bypass |
duke@435 | 2084 | // ConvI2L operation for an array index on LP64 |
duke@435 | 2085 | // if the index value is positive. |
kvn@1021 | 2086 | if( conv->Opcode() == Op_ConvI2L && |
kvn@1021 | 2087 | conv->as_Type()->type()->is_long()->_lo >= 0 && |
kvn@1021 | 2088 | // Are there other uses besides address expressions? |
kvn@1021 | 2089 | !is_visited(conv) ) { |
kvn@1021 | 2090 | address_visited.set(conv->_idx); // Flag as address_visited |
kvn@1021 | 2091 | mstack.push(conv->in(1), Pre_Visit); |
duke@435 | 2092 | } else |
duke@435 | 2093 | #endif |
kvn@1021 | 2094 | mstack.push(conv, Pre_Visit); |
duke@435 | 2095 | } else { |
duke@435 | 2096 | mstack.push(shift, Pre_Visit); |
duke@435 | 2097 | } |
duke@435 | 2098 | mstack.push(adr->in(AddPNode::Address), Pre_Visit); |
duke@435 | 2099 | mstack.push(adr->in(AddPNode::Base), Pre_Visit); |
duke@435 | 2100 | } else { // Sparc, Alpha, PPC and friends |
duke@435 | 2101 | mstack.push(adr, Pre_Visit); |
duke@435 | 2102 | } |
duke@435 | 2103 | |
duke@435 | 2104 | // Clone X+offset as it also folds into most addressing expressions |
duke@435 | 2105 | mstack.push(off, Visit); |
duke@435 | 2106 | mstack.push(m->in(AddPNode::Base), Pre_Visit); |
duke@435 | 2107 | continue; // for(int i = ...) |
duke@435 | 2108 | } // if( off->is_Con() ) |
duke@435 | 2109 | } // if( mem_op && |
duke@435 | 2110 | mstack.push(m, Pre_Visit); |
duke@435 | 2111 | } // for(int i = ...) |
duke@435 | 2112 | } |
duke@435 | 2113 | else if (nstate == Alt_Post_Visit) { |
duke@435 | 2114 | mstack.pop(); // Remove node from stack |
duke@435 | 2115 | // We cannot remove the Cmp input from the Bool here, as the Bool may be |
duke@435 | 2116 | // shared and all users of the Bool need to move the Cmp in parallel. |
duke@435 | 2117 | // This leaves both the Bool and the If pointing at the Cmp. To |
duke@435 | 2118 | // prevent the Matcher from trying to Match the Cmp along both paths |
duke@435 | 2119 | // BoolNode::match_edge always returns a zero. |
duke@435 | 2120 | |
duke@435 | 2121 | // We reorder the Op_If in a pre-order manner, so we can visit without |
twisti@1040 | 2122 | // accidentally sharing the Cmp (the Bool and the If make 2 users). |
duke@435 | 2123 | n->add_req( n->in(1)->in(1) ); // Add the Cmp next to the Bool |
duke@435 | 2124 | } |
duke@435 | 2125 | else if (nstate == Post_Visit) { |
duke@435 | 2126 | mstack.pop(); // Remove node from stack |
duke@435 | 2127 | |
duke@435 | 2128 | // Now hack a few special opcodes |
duke@435 | 2129 | switch( n->Opcode() ) { // Handle some opcodes special |
duke@435 | 2130 | case Op_StorePConditional: |
kvn@855 | 2131 | case Op_StoreIConditional: |
duke@435 | 2132 | case Op_StoreLConditional: |
duke@435 | 2133 | case Op_CompareAndSwapI: |
duke@435 | 2134 | case Op_CompareAndSwapL: |
coleenp@548 | 2135 | case Op_CompareAndSwapP: |
coleenp@548 | 2136 | case Op_CompareAndSwapN: { // Convert trinary to binary-tree |
duke@435 | 2137 | Node *newval = n->in(MemNode::ValueIn ); |
roland@4106 | 2138 | Node *oldval = n->in(LoadStoreConditionalNode::ExpectedIn); |
kvn@4115 | 2139 | Node *pair = new (C) BinaryNode( oldval, newval ); |
duke@435 | 2140 | n->set_req(MemNode::ValueIn,pair); |
roland@4106 | 2141 | n->del_req(LoadStoreConditionalNode::ExpectedIn); |
duke@435 | 2142 | break; |
duke@435 | 2143 | } |
duke@435 | 2144 | case Op_CMoveD: // Convert trinary to binary-tree |
duke@435 | 2145 | case Op_CMoveF: |
duke@435 | 2146 | case Op_CMoveI: |
duke@435 | 2147 | case Op_CMoveL: |
kvn@599 | 2148 | case Op_CMoveN: |
duke@435 | 2149 | case Op_CMoveP: { |
duke@435 | 2150 | // Restructure into a binary tree for Matching. It's possible that |
duke@435 | 2151 | // we could move this code up next to the graph reshaping for IfNodes |
duke@435 | 2152 | // or vice-versa, but I do not want to debug this for Ladybird. |
duke@435 | 2153 | // 10/2/2000 CNC. |
kvn@4115 | 2154 | Node *pair1 = new (C) BinaryNode(n->in(1),n->in(1)->in(1)); |
duke@435 | 2155 | n->set_req(1,pair1); |
kvn@4115 | 2156 | Node *pair2 = new (C) BinaryNode(n->in(2),n->in(3)); |
duke@435 | 2157 | n->set_req(2,pair2); |
duke@435 | 2158 | n->del_req(3); |
duke@435 | 2159 | break; |
duke@435 | 2160 | } |
kvn@2877 | 2161 | case Op_LoopLimit: { |
kvn@4115 | 2162 | Node *pair1 = new (C) BinaryNode(n->in(1),n->in(2)); |
kvn@2877 | 2163 | n->set_req(1,pair1); |
kvn@2877 | 2164 | n->set_req(2,n->in(3)); |
kvn@2877 | 2165 | n->del_req(3); |
kvn@2877 | 2166 | break; |
kvn@2877 | 2167 | } |
kvn@1421 | 2168 | case Op_StrEquals: { |
kvn@4115 | 2169 | Node *pair1 = new (C) BinaryNode(n->in(2),n->in(3)); |
kvn@1421 | 2170 | n->set_req(2,pair1); |
kvn@1421 | 2171 | n->set_req(3,n->in(4)); |
kvn@1421 | 2172 | n->del_req(4); |
kvn@1421 | 2173 | break; |
kvn@1421 | 2174 | } |
kvn@1421 | 2175 | case Op_StrComp: |
kvn@1421 | 2176 | case Op_StrIndexOf: { |
kvn@4115 | 2177 | Node *pair1 = new (C) BinaryNode(n->in(2),n->in(3)); |
kvn@1421 | 2178 | n->set_req(2,pair1); |
kvn@4115 | 2179 | Node *pair2 = new (C) BinaryNode(n->in(4),n->in(5)); |
kvn@1421 | 2180 | n->set_req(3,pair2); |
kvn@1421 | 2181 | n->del_req(5); |
kvn@1421 | 2182 | n->del_req(4); |
kvn@1421 | 2183 | break; |
kvn@1421 | 2184 | } |
kvn@4479 | 2185 | case Op_EncodeISOArray: { |
kvn@4479 | 2186 | // Restructure into a binary tree for Matching. |
kvn@4479 | 2187 | Node* pair = new (C) BinaryNode(n->in(3), n->in(4)); |
kvn@4479 | 2188 | n->set_req(3, pair); |
kvn@4479 | 2189 | n->del_req(4); |
kvn@4479 | 2190 | break; |
kvn@4479 | 2191 | } |
duke@435 | 2192 | default: |
duke@435 | 2193 | break; |
duke@435 | 2194 | } |
duke@435 | 2195 | } |
duke@435 | 2196 | else { |
duke@435 | 2197 | ShouldNotReachHere(); |
duke@435 | 2198 | } |
duke@435 | 2199 | } // end of while (mstack.is_nonempty()) |
duke@435 | 2200 | } |
duke@435 | 2201 | |
duke@435 | 2202 | #ifdef ASSERT |
duke@435 | 2203 | // machine-independent root to machine-dependent root |
duke@435 | 2204 | void Matcher::dump_old2new_map() { |
duke@435 | 2205 | _old2new_map.dump(); |
duke@435 | 2206 | } |
duke@435 | 2207 | #endif |
duke@435 | 2208 | |
duke@435 | 2209 | //---------------------------collect_null_checks------------------------------- |
duke@435 | 2210 | // Find null checks in the ideal graph; write a machine-specific node for |
duke@435 | 2211 | // it. Used by later implicit-null-check handling. Actually collects |
duke@435 | 2212 | // either an IfTrue or IfFalse for the common NOT-null path, AND the ideal |
duke@435 | 2213 | // value being tested. |
kvn@803 | 2214 | void Matcher::collect_null_checks( Node *proj, Node *orig_proj ) { |
duke@435 | 2215 | Node *iff = proj->in(0); |
duke@435 | 2216 | if( iff->Opcode() == Op_If ) { |
duke@435 | 2217 | // During matching If's have Bool & Cmp side-by-side |
duke@435 | 2218 | BoolNode *b = iff->in(1)->as_Bool(); |
duke@435 | 2219 | Node *cmp = iff->in(2); |
coleenp@548 | 2220 | int opc = cmp->Opcode(); |
coleenp@548 | 2221 | if (opc != Op_CmpP && opc != Op_CmpN) return; |
duke@435 | 2222 | |
coleenp@548 | 2223 | const Type* ct = cmp->in(2)->bottom_type(); |
coleenp@548 | 2224 | if (ct == TypePtr::NULL_PTR || |
coleenp@548 | 2225 | (opc == Op_CmpN && ct == TypeNarrowOop::NULL_PTR)) { |
coleenp@548 | 2226 | |
kvn@803 | 2227 | bool push_it = false; |
coleenp@548 | 2228 | if( proj->Opcode() == Op_IfTrue ) { |
coleenp@548 | 2229 | extern int all_null_checks_found; |
coleenp@548 | 2230 | all_null_checks_found++; |
coleenp@548 | 2231 | if( b->_test._test == BoolTest::ne ) { |
kvn@803 | 2232 | push_it = true; |
coleenp@548 | 2233 | } |
coleenp@548 | 2234 | } else { |
coleenp@548 | 2235 | assert( proj->Opcode() == Op_IfFalse, "" ); |
coleenp@548 | 2236 | if( b->_test._test == BoolTest::eq ) { |
kvn@803 | 2237 | push_it = true; |
duke@435 | 2238 | } |
duke@435 | 2239 | } |
kvn@803 | 2240 | if( push_it ) { |
kvn@803 | 2241 | _null_check_tests.push(proj); |
kvn@803 | 2242 | Node* val = cmp->in(1); |
kvn@803 | 2243 | #ifdef _LP64 |
kvn@1930 | 2244 | if (val->bottom_type()->isa_narrowoop() && |
kvn@1930 | 2245 | !Matcher::narrow_oop_use_complex_address()) { |
kvn@803 | 2246 | // |
kvn@803 | 2247 | // Look for DecodeN node which should be pinned to orig_proj. |
kvn@803 | 2248 | // On platforms (Sparc) which can not handle 2 adds |
kvn@803 | 2249 | // in addressing mode we have to keep a DecodeN node and |
kvn@803 | 2250 | // use it to do implicit NULL check in address. |
kvn@803 | 2251 | // |
kvn@803 | 2252 | // DecodeN node was pinned to non-null path (orig_proj) during |
kvn@803 | 2253 | // CastPP transformation in final_graph_reshaping_impl(). |
kvn@803 | 2254 | // |
kvn@803 | 2255 | uint cnt = orig_proj->outcnt(); |
kvn@803 | 2256 | for (uint i = 0; i < orig_proj->outcnt(); i++) { |
kvn@803 | 2257 | Node* d = orig_proj->raw_out(i); |
kvn@803 | 2258 | if (d->is_DecodeN() && d->in(1) == val) { |
kvn@803 | 2259 | val = d; |
kvn@803 | 2260 | val->set_req(0, NULL); // Unpin now. |
kvn@1930 | 2261 | // Mark this as special case to distinguish from |
kvn@1930 | 2262 | // a regular case: CmpP(DecodeN, NULL). |
kvn@1930 | 2263 | val = (Node*)(((intptr_t)val) | 1); |
kvn@803 | 2264 | break; |
kvn@803 | 2265 | } |
kvn@803 | 2266 | } |
kvn@803 | 2267 | } |
kvn@803 | 2268 | #endif |
kvn@803 | 2269 | _null_check_tests.push(val); |
kvn@803 | 2270 | } |
duke@435 | 2271 | } |
duke@435 | 2272 | } |
duke@435 | 2273 | } |
duke@435 | 2274 | |
duke@435 | 2275 | //---------------------------validate_null_checks------------------------------ |
duke@435 | 2276 | // Its possible that the value being NULL checked is not the root of a match |
duke@435 | 2277 | // tree. If so, I cannot use the value in an implicit null check. |
duke@435 | 2278 | void Matcher::validate_null_checks( ) { |
duke@435 | 2279 | uint cnt = _null_check_tests.size(); |
duke@435 | 2280 | for( uint i=0; i < cnt; i+=2 ) { |
duke@435 | 2281 | Node *test = _null_check_tests[i]; |
duke@435 | 2282 | Node *val = _null_check_tests[i+1]; |
kvn@1930 | 2283 | bool is_decoden = ((intptr_t)val) & 1; |
kvn@1930 | 2284 | val = (Node*)(((intptr_t)val) & ~1); |
duke@435 | 2285 | if (has_new_node(val)) { |
kvn@1930 | 2286 | Node* new_val = new_node(val); |
kvn@1930 | 2287 | if (is_decoden) { |
roland@4159 | 2288 | assert(val->is_DecodeNarrowPtr() && val->in(0) == NULL, "sanity"); |
kvn@1930 | 2289 | // Note: new_val may have a control edge if |
kvn@1930 | 2290 | // the original ideal node DecodeN was matched before |
kvn@1930 | 2291 | // it was unpinned in Matcher::collect_null_checks(). |
kvn@1930 | 2292 | // Unpin the mach node and mark it. |
kvn@1930 | 2293 | new_val->set_req(0, NULL); |
kvn@1930 | 2294 | new_val = (Node*)(((intptr_t)new_val) | 1); |
kvn@1930 | 2295 | } |
duke@435 | 2296 | // Is a match-tree root, so replace with the matched value |
kvn@1930 | 2297 | _null_check_tests.map(i+1, new_val); |
duke@435 | 2298 | } else { |
duke@435 | 2299 | // Yank from candidate list |
duke@435 | 2300 | _null_check_tests.map(i+1,_null_check_tests[--cnt]); |
duke@435 | 2301 | _null_check_tests.map(i,_null_check_tests[--cnt]); |
duke@435 | 2302 | _null_check_tests.pop(); |
duke@435 | 2303 | _null_check_tests.pop(); |
duke@435 | 2304 | i-=2; |
duke@435 | 2305 | } |
duke@435 | 2306 | } |
duke@435 | 2307 | } |
duke@435 | 2308 | |
duke@435 | 2309 | // Used by the DFA in dfa_xxx.cpp. Check for a following barrier or |
duke@435 | 2310 | // atomic instruction acting as a store_load barrier without any |
duke@435 | 2311 | // intervening volatile load, and thus we don't need a barrier here. |
duke@435 | 2312 | // We retain the Node to act as a compiler ordering barrier. |
kvn@5437 | 2313 | bool Matcher::post_store_load_barrier(const Node* vmb) { |
kvn@5437 | 2314 | Compile* C = Compile::current(); |
kvn@5437 | 2315 | assert(vmb->is_MemBar(), ""); |
kvn@5437 | 2316 | assert(vmb->Opcode() != Op_MemBarAcquire, ""); |
kvn@5437 | 2317 | const MemBarNode* membar = vmb->as_MemBar(); |
duke@435 | 2318 | |
kvn@5437 | 2319 | // Get the Ideal Proj node, ctrl, that can be used to iterate forward |
kvn@5437 | 2320 | Node* ctrl = NULL; |
kvn@5437 | 2321 | for (DUIterator_Fast imax, i = membar->fast_outs(imax); i < imax; i++) { |
kvn@5437 | 2322 | Node* p = membar->fast_out(i); |
kvn@5437 | 2323 | assert(p->is_Proj(), "only projections here"); |
kvn@5437 | 2324 | if ((p->as_Proj()->_con == TypeFunc::Control) && |
kvn@5437 | 2325 | !C->node_arena()->contains(p)) { // Unmatched old-space only |
kvn@5437 | 2326 | ctrl = p; |
duke@435 | 2327 | break; |
kvn@5437 | 2328 | } |
duke@435 | 2329 | } |
kvn@5437 | 2330 | assert((ctrl != NULL), "missing control projection"); |
duke@435 | 2331 | |
kvn@5437 | 2332 | for (DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++) { |
duke@435 | 2333 | Node *x = ctrl->fast_out(j); |
duke@435 | 2334 | int xop = x->Opcode(); |
duke@435 | 2335 | |
duke@435 | 2336 | // We don't need current barrier if we see another or a lock |
duke@435 | 2337 | // before seeing volatile load. |
duke@435 | 2338 | // |
duke@435 | 2339 | // Op_Fastunlock previously appeared in the Op_* list below. |
duke@435 | 2340 | // With the advent of 1-0 lock operations we're no longer guaranteed |
duke@435 | 2341 | // that a monitor exit operation contains a serializing instruction. |
duke@435 | 2342 | |
duke@435 | 2343 | if (xop == Op_MemBarVolatile || |
duke@435 | 2344 | xop == Op_CompareAndSwapL || |
duke@435 | 2345 | xop == Op_CompareAndSwapP || |
coleenp@548 | 2346 | xop == Op_CompareAndSwapN || |
kvn@5437 | 2347 | xop == Op_CompareAndSwapI) { |
duke@435 | 2348 | return true; |
kvn@5437 | 2349 | } |
kvn@5437 | 2350 | |
kvn@5437 | 2351 | // Op_FastLock previously appeared in the Op_* list above. |
kvn@5437 | 2352 | // With biased locking we're no longer guaranteed that a monitor |
kvn@5437 | 2353 | // enter operation contains a serializing instruction. |
kvn@5437 | 2354 | if ((xop == Op_FastLock) && !UseBiasedLocking) { |
kvn@5437 | 2355 | return true; |
kvn@5437 | 2356 | } |
duke@435 | 2357 | |
duke@435 | 2358 | if (x->is_MemBar()) { |
duke@435 | 2359 | // We must retain this membar if there is an upcoming volatile |
kvn@5437 | 2360 | // load, which will be followed by acquire membar. |
kvn@5437 | 2361 | if (xop == Op_MemBarAcquire) { |
duke@435 | 2362 | return false; |
kvn@5437 | 2363 | } else { |
kvn@5437 | 2364 | // For other kinds of barriers, check by pretending we |
kvn@5437 | 2365 | // are them, and seeing if we can be removed. |
kvn@5437 | 2366 | return post_store_load_barrier(x->as_MemBar()); |
kvn@5437 | 2367 | } |
duke@435 | 2368 | } |
duke@435 | 2369 | |
kvn@5437 | 2370 | // probably not necessary to check for these |
kvn@5437 | 2371 | if (x->is_Call() || x->is_SafePoint() || x->is_block_proj()) { |
kvn@5437 | 2372 | return false; |
duke@435 | 2373 | } |
duke@435 | 2374 | } |
duke@435 | 2375 | return false; |
duke@435 | 2376 | } |
duke@435 | 2377 | |
duke@435 | 2378 | //============================================================================= |
duke@435 | 2379 | //---------------------------State--------------------------------------------- |
duke@435 | 2380 | State::State(void) { |
duke@435 | 2381 | #ifdef ASSERT |
duke@435 | 2382 | _id = 0; |
duke@435 | 2383 | _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); |
duke@435 | 2384 | _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); |
duke@435 | 2385 | //memset(_cost, -1, sizeof(_cost)); |
duke@435 | 2386 | //memset(_rule, -1, sizeof(_rule)); |
duke@435 | 2387 | #endif |
duke@435 | 2388 | memset(_valid, 0, sizeof(_valid)); |
duke@435 | 2389 | } |
duke@435 | 2390 | |
duke@435 | 2391 | #ifdef ASSERT |
duke@435 | 2392 | State::~State() { |
duke@435 | 2393 | _id = 99; |
duke@435 | 2394 | _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); |
duke@435 | 2395 | _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); |
duke@435 | 2396 | memset(_cost, -3, sizeof(_cost)); |
duke@435 | 2397 | memset(_rule, -3, sizeof(_rule)); |
duke@435 | 2398 | } |
duke@435 | 2399 | #endif |
duke@435 | 2400 | |
duke@435 | 2401 | #ifndef PRODUCT |
duke@435 | 2402 | //---------------------------dump---------------------------------------------- |
duke@435 | 2403 | void State::dump() { |
duke@435 | 2404 | tty->print("\n"); |
duke@435 | 2405 | dump(0); |
duke@435 | 2406 | } |
duke@435 | 2407 | |
duke@435 | 2408 | void State::dump(int depth) { |
duke@435 | 2409 | for( int j = 0; j < depth; j++ ) |
duke@435 | 2410 | tty->print(" "); |
duke@435 | 2411 | tty->print("--N: "); |
duke@435 | 2412 | _leaf->dump(); |
duke@435 | 2413 | uint i; |
duke@435 | 2414 | for( i = 0; i < _LAST_MACH_OPER; i++ ) |
duke@435 | 2415 | // Check for valid entry |
duke@435 | 2416 | if( valid(i) ) { |
duke@435 | 2417 | for( int j = 0; j < depth; j++ ) |
duke@435 | 2418 | tty->print(" "); |
duke@435 | 2419 | assert(_cost[i] != max_juint, "cost must be a valid value"); |
duke@435 | 2420 | assert(_rule[i] < _last_Mach_Node, "rule[i] must be valid rule"); |
duke@435 | 2421 | tty->print_cr("%s %d %s", |
duke@435 | 2422 | ruleName[i], _cost[i], ruleName[_rule[i]] ); |
duke@435 | 2423 | } |
duke@435 | 2424 | tty->print_cr(""); |
duke@435 | 2425 | |
duke@435 | 2426 | for( i=0; i<2; i++ ) |
duke@435 | 2427 | if( _kids[i] ) |
duke@435 | 2428 | _kids[i]->dump(depth+1); |
duke@435 | 2429 | } |
duke@435 | 2430 | #endif |