# HG changeset patch
# User fujie
# Date 1469503997 -28800
# Node ID b0b723ece02fe286ac780d80d1cba943d3452e9a
# Parent  72830a7941b2e7cb2a7f78dc8ba2800f4a353fee
Enable conditional instructions(movz and movn) in MIPS C2 compiler.

diff -r 72830a7941b2 -r b0b723ece02f src/cpu/mips/vm/mips_64.ad
--- a/src/cpu/mips/vm/mips_64.ad	Fri Jul 22 16:53:17 2016 +0800
+++ b/src/cpu/mips/vm/mips_64.ad	Tue Jul 26 11:33:17 2016 +0800
@@ -6665,10 +6665,8 @@
 //----------Conditional Move---------------------------------------------------
 // Conditional move
 instruct cmovI_cmpI_reg_reg(mRegI dst, mRegI src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveI (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop  $tmp1, $tmp2\t  @cmovI_cmpI_reg_reg\n"
              "\tCMOV  $dst,$src \t @cmovI_cmpI_reg_reg"
@@ -6680,50 +6678,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //great
         __ slt(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //great_equal
         __ slt(AT, op1, op2);
-        __ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //less
         __ slt(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //less_equal
         __ slt(AT, op2, op1);
-       	__ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -6733,10 +6720,8 @@
 %}
 
 instruct cmovI_cmpP_reg_reg(mRegI dst, mRegI src, mRegP tmp1, mRegP tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveI (Binary cop (CmpP tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovI_cmpP_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovI_cmpP_reg_reg"
@@ -6747,50 +6732,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -6800,10 +6774,8 @@
 %}
 
 instruct cmovI_cmpN_reg_reg(mRegI dst, mRegI src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveI (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovI_cmpN_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovI_cmpN_reg_reg"
@@ -6814,50 +6786,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -6867,10 +6828,8 @@
 %}
 
 instruct cmovP_cmpN_reg_reg(mRegP dst, mRegP src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveP (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovP_cmpN_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovP_cmpN_reg_reg"
@@ -6881,50 +6840,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -6934,10 +6882,8 @@
 %}
 
 instruct cmovN_cmpP_reg_reg(mRegN dst, mRegN src, mRegP tmp1, mRegP tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveN (Binary cop (CmpP tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovN_cmpP_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovN_cmpP_reg_reg"
@@ -6948,50 +6894,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7071,10 +7006,8 @@
 
 
 instruct cmovN_cmpN_reg_reg(mRegN dst, mRegN src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveN (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovN_cmpN_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovN_cmpN_reg_reg"
@@ -7085,50 +7018,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7139,10 +7061,8 @@
 
 
 instruct cmovI_cmpU_reg_reg(mRegI dst, mRegI src, mRegI tmp1, mRegI tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveI (Binary cop (CmpU tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovI_cmpU_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovI_cmpU_reg_reg"
@@ -7153,50 +7073,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7207,7 +7116,7 @@
 
 instruct cmovI_cmpL_reg_reg(mRegI dst, mRegI src, mRegL tmp1, mRegL tmp2, cmpOp cop ) %{
   match(Set dst (CMoveI (Binary cop (CmpL tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop  $tmp1, $tmp2\t  @cmovI_cmpL_reg_reg\n"
              "\tCMOV  $dst,$src \t @cmovI_cmpL_reg_reg"
@@ -7217,63 +7126,39 @@
     Register opr2 = as_Register($tmp2$$reg);
     Register dst     = $dst$$Register;
     Register src     = $src$$Register;
-
     int     flag = $cop$$cmpcode;
 
-    Label L, L1;
-
-
     switch(flag)
     {
       case 0x01: //equal
-        __ bne(opr1, opr2, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ subu(AT, opr1, opr2);
+        __ movz(dst, src, AT);
         break;
 
       case 0x02: //not_equal
-        __ beq(opr1, opr2, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ subu(AT, opr1, opr2);
+        __ movn(dst, src, AT);
         break;
 
       case 0x03: //greater
-		__ slt(AT, opr2, opr1);
-		__ beq(AT, R0, L);
-		__ delayed()->nop();
-		__ move(dst, src);
-		__ bind(L);
-
+	__ slt(AT, opr2, opr1);
+        __ movn(dst, src, AT);
         break;
 
       case 0x04: //greater_equal
         __ slt(AT, opr1, opr2);
-        __ bne(AT, R0, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
-
+        __ movz(dst, src, AT);
         break;
 
       case 0x05: //less
         __ slt(AT, opr1, opr2);
-        __ beq(AT, R0, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
-
+        __ movn(dst, src, AT);
         break;
 
       case 0x06: //less_equal
-       __ slt(AT, opr2, opr1);
-       __ bne(AT, R0, L);
-       __ delayed()->nop();
-       __ move(dst, src);
-       __ bind(L);
-
-       break;
+        __ slt(AT, opr2, opr1);
+        __ movz(dst, src, AT);
+        break;
 
       default:
           Unimplemented();
@@ -7285,7 +7170,7 @@
 
 instruct cmovP_cmpL_reg_reg(mRegP dst, mRegP src, mRegL tmp1, mRegL tmp2, cmpOp cop ) %{
   match(Set dst (CMoveP (Binary cop (CmpL tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop  $tmp1, $tmp2\t  @cmovP_cmpL_reg_reg\n"
              "\tCMOV  $dst,$src \t @cmovP_cmpL_reg_reg"
@@ -7295,57 +7180,38 @@
     Register opr2 = as_Register($tmp2$$reg);
     Register dst     = $dst$$Register;
     Register src     = $src$$Register;
-
     int     flag = $cop$$cmpcode;
 
-    Label L, L1;
-
     switch(flag)
     {
       case 0x01: //equal
-        __ bne(opr1, opr2, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ subu(AT, opr1, opr2);
+        __ movz(dst, src, AT);
         break;
 
       case 0x02: //not_equal
-        __ beq(opr1, opr2, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ subu(AT, opr1, opr2);
+        __ movn(dst, src, AT);
         break;
 
       case 0x03: //greater
         __ slt(AT, opr2, opr1);
-        __ beq(AT, R0, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movn(dst, src, AT);
         break;
 
       case 0x04: //greater_equal
         __ slt(AT, opr1, opr2);
-        __ bne(AT, R0, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
         break;
 
       case 0x05: //less
         __ slt(AT, opr1, opr2);
-        __ beq(AT, R0, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movn(dst, src, AT);
         break;
 
       case 0x06: //less_equal
         __ slt(AT, opr2, opr1);
-       	__ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
         break;
 
       default:
@@ -7428,10 +7294,8 @@
 
 
 instruct cmovP_cmpP_reg_reg(mRegP dst, mRegP src, mRegP tmp1, mRegP tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveP (Binary cop (CmpP tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovP_cmpP_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovP_cmpP_reg_reg"
@@ -7442,50 +7306,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(R0, AT, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7495,10 +7348,8 @@
 %}
 
 instruct cmovP_cmpI_reg_reg(mRegP dst, mRegP src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveP (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop $tmp1,$tmp2\t @cmovP_cmpI_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovP_cmpI_reg_reg"
@@ -7509,50 +7360,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ slt(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ slt(AT, op1, op2);
-        __ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ slt(AT, op1, op2);
-       	__ beq(R0, AT, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ slt(AT, op2, op1);
-       	__ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7562,10 +7402,8 @@
 %}
 
 instruct cmovN_cmpI_reg_reg(mRegN dst, mRegN src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveN (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop $tmp1,$tmp2\t @cmovN_cmpI_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovN_cmpI_reg_reg"
@@ -7576,50 +7414,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ slt(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ slt(AT, op1, op2);
-        __ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ slt(AT, op1, op2);
-       	__ beq(R0, AT, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ slt(AT, op2, op1);
-       	__ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7631,7 +7458,7 @@
 
 instruct cmovL_cmpI_reg_reg(mRegL dst, mRegL src, mRegI tmp1, mRegI tmp2, cmpOp cop ) %{
   match(Set dst (CMoveL (Binary cop (CmpI tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop  $tmp1, $tmp2\t  @cmovL_cmpI_reg_reg\n"
              "\tCMOV  $dst,$src \t @cmovL_cmpI_reg_reg"
@@ -7643,50 +7470,39 @@
     Register dst = as_Register($dst$$reg);
     Register src = as_Register($src$$reg);
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //great
         __ slt(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //great_equal
         __ slt(AT, op1, op2);
-        __ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //less
         __ slt(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //less_equal
         __ slt(AT, op2, op1);
-       	__ bne(AT, R0, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
        break;
+
       default:
           Unimplemented();
     }  
@@ -7697,7 +7513,7 @@
 
 instruct cmovL_cmpL_reg_reg(mRegL dst, mRegL src, mRegL tmp1, mRegL tmp2, cmpOp cop ) %{
   match(Set dst (CMoveL (Binary cop (CmpL tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMP$cop  $tmp1, $tmp2\t  @cmovL_cmpL_reg_reg\n"
              "\tCMOV  $dst,$src \t @cmovL_cmpL_reg_reg"
@@ -7707,57 +7523,38 @@
     Register opr2 = as_Register($tmp2$$reg);
     Register dst  = as_Register($dst$$reg);
     Register src  = as_Register($src$$reg);
-
     int     flag = $cop$$cmpcode;
 
-    Label L;
-
     switch(flag)
     {
       case 0x01: //equal
-        __ bne(opr1, opr2, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ subu(AT, opr1, opr2);
+        __ movz(dst, src, AT);
         break;
 
       case 0x02: //not_equal
-        __ beq(opr1, opr2, L);
-        __ delayed()->nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ subu(AT, opr1, opr2);
+        __ movn(dst, src, AT);
         break;
 
       case 0x03: //greater
         __ slt(AT, opr2, opr1);
-        __ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movn(dst, src, AT);
         break;
 
       case 0x04: //greater_equal
         __ slt(AT, opr1, opr2);
-        __ bne(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movz(dst, src, AT);
         break;
 
       case 0x05: //less
         __ slt(AT, opr1, opr2);
-        __ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
+        __ movn(dst, src, AT);
         break;
 
       case 0x06: //less_equal
        __ slt(AT, opr2, opr1);
-       __ bne(AT, R0, L);
-       __ nop();
-       __ move(dst, src);
-       __ bind(L);
+       __ movz(dst, src, AT);
        break;
 
       default:
@@ -7769,10 +7566,8 @@
 %}
 
 instruct cmovL_cmpN_reg_reg(mRegL dst, mRegL src, mRegN tmp1, mRegN tmp2, cmpOpU cop ) %{
-  //predicate(VM_Version::supports_cmov() );
-  //predicate(false );
   match(Set dst (CMoveL (Binary cop (CmpN tmp1 tmp2)) (Binary dst src)));
-  ins_cost(200);
+  ins_cost(80);
   format %{
              "CMPU$cop $tmp1,$tmp2\t @cmovL_cmpN_reg_reg\n\t"
              "CMOV $dst,$src\t @cmovL_cmpN_reg_reg"
@@ -7783,50 +7578,39 @@
     Register dst = $dst$$Register;
     Register src = $src$$Register;
     int     flag = $cop$$cmpcode;
-    Label      L; 
 
     switch(flag)
     {
       case 0x01: //equal
-       	__ bne(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movz(dst, src, AT);
+        break;
+
       case 0x02: //not_equal
-       	__ beq(op1, op2, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ subu32(AT, op1, op2);
+        __ movn(dst, src, AT);
+        break;
+
       case 0x03: //above
         __ sltu(AT, op2, op1);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x04: //above_equal
         __ sltu(AT, op1, op2);
-        __ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movz(dst, src, AT);
+        break;
+
       case 0x05: //below
         __ sltu(AT, op1, op2);
-       	__ beq(AT, R0, L);
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-        break;
+        __ movn(dst, src, AT);
+        break;
+
       case 0x06: //below_equal
         __ sltu(AT, op2, op1);
-       	__ bne(R0, AT, L); 
-        __ nop();
-        __ move(dst, src);
-        __ bind(L);
-       break;
+        __ movz(dst, src, AT);
+        break;
+
       default:
           Unimplemented();
     }