Mercurial > jdk8-mips64-public > hotspot / changeset

     1.1 --- a/src/cpu/sparc/vm/vm_version_sparc.cpp	Tue Dec 17 06:08:33 2019 +0000
     1.2 +++ b/src/cpu/sparc/vm/vm_version_sparc.cpp	Fri Nov 13 18:14:41 2015 +0300
     1.3 @@ -286,35 +286,35 @@
     1.4  
     1.5    // SPARC T4 and above should have support for AES instructions
     1.6    if (has_aes()) {
     1.7 -    if (UseVIS > 2) { // AES intrinsics use MOVxTOd/MOVdTOx which are VIS3
     1.8 -      if (FLAG_IS_DEFAULT(UseAES)) {
     1.9 -        FLAG_SET_DEFAULT(UseAES, true);
    1.10 +    if (FLAG_IS_DEFAULT(UseAES)) {
    1.11 +      FLAG_SET_DEFAULT(UseAES, true);
    1.12 +    }
    1.13 +    if (!UseAES) {
    1.14 +      if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    1.15 +        warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
    1.16        }
    1.17 -      if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    1.18 -        FLAG_SET_DEFAULT(UseAESIntrinsics, true);
    1.19 -      }
    1.20 -      // we disable both the AES flags if either of them is disabled on the command line
    1.21 -      if (!UseAES || !UseAESIntrinsics) {
    1.22 -        FLAG_SET_DEFAULT(UseAES, false);
    1.23 +      FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    1.24 +    } else {
    1.25 +      // The AES intrinsic stubs require AES instruction support (of course)
    1.26 +      // but also require VIS3 mode or higher for instructions it use.
    1.27 +      if (UseVIS > 2) {
    1.28 +        if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    1.29 +          FLAG_SET_DEFAULT(UseAESIntrinsics, true);
    1.30 +        }
    1.31 +      } else {
    1.32 +        if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    1.33 +          warning("SPARC AES intrinsics require VIS3 instructions. Intrinsics will be disabled.");
    1.34 +        }
    1.35          FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    1.36        }
    1.37 -    } else {
    1.38 -        if (UseAES || UseAESIntrinsics) {
    1.39 -          warning("SPARC AES intrinsics require VIS3 instruction support. Intrinsics will be disabled.");
    1.40 -          if (UseAES) {
    1.41 -            FLAG_SET_DEFAULT(UseAES, false);
    1.42 -          }
    1.43 -          if (UseAESIntrinsics) {
    1.44 -            FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    1.45 -          }
    1.46 -        }
    1.47      }
    1.48    } else if (UseAES || UseAESIntrinsics) {
    1.49 -    warning("AES instructions are not available on this CPU");
    1.50 -    if (UseAES) {
    1.51 +    if (UseAES && !FLAG_IS_DEFAULT(UseAES)) {
    1.52 +      warning("AES instructions are not available on this CPU");
    1.53        FLAG_SET_DEFAULT(UseAES, false);
    1.54      }
    1.55 -    if (UseAESIntrinsics) {
    1.56 +    if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    1.57 +      warning("AES intrinsics are not available on this CPU");
    1.58        FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    1.59      }
    1.60    }

     2.1 --- a/src/cpu/x86/vm/vm_version_x86.cpp	Tue Dec 17 06:08:33 2019 +0000
     2.2 +++ b/src/cpu/x86/vm/vm_version_x86.cpp	Fri Nov 13 18:14:41 2015 +0300
     2.3 @@ -553,12 +553,36 @@
     2.4    // Use AES instructions if available.
     2.5    if (supports_aes()) {
     2.6      if (FLAG_IS_DEFAULT(UseAES)) {
     2.7 -      UseAES = true;
     2.8 +      FLAG_SET_DEFAULT(UseAES, true);
     2.9      }
    2.10 -  } else if (UseAES) {
    2.11 -    if (!FLAG_IS_DEFAULT(UseAES))
    2.12 +    if (!UseAES) {
    2.13 +      if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    2.14 +        warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
    2.15 +      }
    2.16 +      FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    2.17 +    } else {
    2.18 +      if (UseSSE > 2) {
    2.19 +        if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    2.20 +          FLAG_SET_DEFAULT(UseAESIntrinsics, true);
    2.21 +        }
    2.22 +      } else {
    2.23 +        // The AES intrinsic stubs require AES instruction support (of course)
    2.24 +        // but also require sse3 mode or higher for instructions it use.
    2.25 +        if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    2.26 +          warning("X86 AES intrinsics require SSE3 instructions or higher. Intrinsics will be disabled.");
    2.27 +        }
    2.28 +        FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    2.29 +      }
    2.30 +    }
    2.31 +  } else if (UseAES || UseAESIntrinsics) {
    2.32 +    if (UseAES && !FLAG_IS_DEFAULT(UseAES)) {
    2.33        warning("AES instructions are not available on this CPU");
    2.34 -    FLAG_SET_DEFAULT(UseAES, false);
    2.35 +      FLAG_SET_DEFAULT(UseAES, false);
    2.36 +    }
    2.37 +    if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    2.38 +      warning("AES intrinsics are not available on this CPU");
    2.39 +      FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    2.40 +    }
    2.41    }
    2.42  
    2.43    // Use CLMUL instructions if available.
    2.44 @@ -582,18 +606,6 @@
    2.45      FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
    2.46    }
    2.47  
    2.48 -  // The AES intrinsic stubs require AES instruction support (of course)
    2.49 -  // but also require sse3 mode for instructions it use.
    2.50 -  if (UseAES && (UseSSE > 2)) {
    2.51 -    if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
    2.52 -      UseAESIntrinsics = true;
    2.53 -    }
    2.54 -  } else if (UseAESIntrinsics) {
    2.55 -    if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
    2.56 -      warning("AES intrinsics are not available on this CPU");
    2.57 -    FLAG_SET_DEFAULT(UseAESIntrinsics, false);
    2.58 -  }
    2.59 -
    2.60    // GHASH/GCM intrinsics
    2.61    if (UseCLMUL && (UseSSE > 2)) {
    2.62      if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {