Mercurial > jdk8-mips64-public > hotspot / file comparison
comparison: src/cpu/x86/vm/vm_version_x86.cpp
src/cpu/x86/vm/vm_version_x86.cpp
- changeset 9795
- 9ef81b9152f1
- parent 9788
- 44ef77ad417c
- child 9806
- 758c07667682
equal
deleted
inserted
replaced
| 9794:31527d7b83e1 | 9795:9ef81b9152f1 |
|---|---|
| 551 UseAVX = 0; | 551 UseAVX = 0; |
| 552 | 552 |
| 553 // Use AES instructions if available. | 553 // Use AES instructions if available. |
| 554 if (supports_aes()) { | 554 if (supports_aes()) { |
| 555 if (FLAG_IS_DEFAULT(UseAES)) { | 555 if (FLAG_IS_DEFAULT(UseAES)) { |
| 556 UseAES = true; | 556 FLAG_SET_DEFAULT(UseAES, true); |
| 557 } | 557 } |
| 558 } else if (UseAES) { | 558 if (!UseAES) { |
| 559 if (!FLAG_IS_DEFAULT(UseAES)) | 559 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { |
| 560 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled."); | |
| 561 } | |
| 562 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | |
| 563 } else { | |
| 564 if (UseSSE > 2) { | |
| 565 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { | |
| 566 FLAG_SET_DEFAULT(UseAESIntrinsics, true); | |
| 567 } | |
| 568 } else { | |
| 569 // The AES intrinsic stubs require AES instruction support (of course) | |
| 570 // but also require sse3 mode or higher for instructions it use. | |
| 571 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { | |
| 572 warning("X86 AES intrinsics require SSE3 instructions or higher. Intrinsics will be disabled."); | |
| 573 } | |
| 574 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | |
| 575 } | |
| 576 } | |
| 577 } else if (UseAES || UseAESIntrinsics) { | |
| 578 if (UseAES && !FLAG_IS_DEFAULT(UseAES)) { | |
| 560 warning("AES instructions are not available on this CPU"); | 579 warning("AES instructions are not available on this CPU"); |
| 561 FLAG_SET_DEFAULT(UseAES, false); | 580 FLAG_SET_DEFAULT(UseAES, false); |
| 581 } | |
| 582 if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) { | |
| 583 warning("AES intrinsics are not available on this CPU"); | |
| 584 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | |
| 585 } | |
| 562 } | 586 } |
| 563 | 587 |
| 564 // Use CLMUL instructions if available. | 588 // Use CLMUL instructions if available. |
| 565 if (supports_clmul()) { | 589 if (supports_clmul()) { |
| 566 if (FLAG_IS_DEFAULT(UseCLMUL)) { | 590 if (FLAG_IS_DEFAULT(UseCLMUL)) { |
| 578 } | 602 } |
| 579 } else if (UseCRC32Intrinsics) { | 603 } else if (UseCRC32Intrinsics) { |
| 580 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) | 604 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) |
| 581 warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)"); | 605 warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)"); |
| 582 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); | 606 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); |
| 583 } | |
| 584 | |
| 585 // The AES intrinsic stubs require AES instruction support (of course) | |
| 586 // but also require sse3 mode for instructions it use. | |
| 587 if (UseAES && (UseSSE > 2)) { | |
| 588 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { | |
| 589 UseAESIntrinsics = true; | |
| 590 } | |
| 591 } else if (UseAESIntrinsics) { | |
| 592 if (!FLAG_IS_DEFAULT(UseAESIntrinsics)) | |
| 593 warning("AES intrinsics are not available on this CPU"); | |
| 594 FLAG_SET_DEFAULT(UseAESIntrinsics, false); | |
| 595 } | 607 } |
| 596 | 608 |
| 597 // GHASH/GCM intrinsics | 609 // GHASH/GCM intrinsics |
| 598 if (UseCLMUL && (UseSSE > 2)) { | 610 if (UseCLMUL && (UseSSE > 2)) { |
| 599 if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) { | 611 if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) { |
