Mon, 10 Mar 2014 12:58:02 +0100
8036976: PPC64: implement the template interpreter
Reviewed-by: kvn, coleenp
Contributed-by: axel.siebenborn@sap.com, martin.doerr@sap.com
1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_ppc.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
44 #define __ masm->
46 #ifdef PRODUCT
47 #define BLOCK_COMMENT(str) // nothing
48 #else
49 #define BLOCK_COMMENT(str) __ block_comment(str)
50 #endif
52 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
55 // Used by generate_deopt_blob. Defined in .ad file.
56 extern uint size_deopt_handler();
59 class RegisterSaver {
60 // Used for saving volatile registers.
61 public:
63 // Support different return pc locations.
64 enum ReturnPCLocation {
65 return_pc_is_lr,
66 return_pc_is_r4,
67 return_pc_is_thread_saved_exception_pc
68 };
70 static OopMap* push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
71 int* out_frame_size_in_bytes,
72 bool generate_oop_map,
73 int return_pc_adjustment,
74 ReturnPCLocation return_pc_location);
75 static void restore_live_registers_and_pop_frame(MacroAssembler* masm,
76 int frame_size_in_bytes,
77 bool restore_ctr);
79 static void push_frame_and_save_argument_registers(MacroAssembler* masm,
80 Register r_temp,
81 int frame_size,
82 int total_args,
83 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
84 static void restore_argument_registers_and_pop_frame(MacroAssembler*masm,
85 int frame_size,
86 int total_args,
87 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
89 // During deoptimization only the result registers need to be restored
90 // all the other values have already been extracted.
91 static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes);
93 // Constants and data structures:
95 typedef enum {
96 int_reg = 0,
97 float_reg = 1,
98 special_reg = 2
99 } RegisterType;
101 typedef enum {
102 reg_size = 8,
103 half_reg_size = reg_size / 2,
104 } RegisterConstants;
106 typedef struct {
107 RegisterType reg_type;
108 int reg_num;
109 VMReg vmreg;
110 } LiveRegType;
111 };
114 #define RegisterSaver_LiveSpecialReg(regname) \
115 { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }
117 #define RegisterSaver_LiveIntReg(regname) \
118 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() }
120 #define RegisterSaver_LiveFloatReg(regname) \
121 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() }
123 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
124 // Live registers which get spilled to the stack. Register
125 // positions in this array correspond directly to the stack layout.
127 //
128 // live special registers:
129 //
130 RegisterSaver_LiveSpecialReg(SR_CTR),
131 //
132 // live float registers:
133 //
134 RegisterSaver_LiveFloatReg( F0 ),
135 RegisterSaver_LiveFloatReg( F1 ),
136 RegisterSaver_LiveFloatReg( F2 ),
137 RegisterSaver_LiveFloatReg( F3 ),
138 RegisterSaver_LiveFloatReg( F4 ),
139 RegisterSaver_LiveFloatReg( F5 ),
140 RegisterSaver_LiveFloatReg( F6 ),
141 RegisterSaver_LiveFloatReg( F7 ),
142 RegisterSaver_LiveFloatReg( F8 ),
143 RegisterSaver_LiveFloatReg( F9 ),
144 RegisterSaver_LiveFloatReg( F10 ),
145 RegisterSaver_LiveFloatReg( F11 ),
146 RegisterSaver_LiveFloatReg( F12 ),
147 RegisterSaver_LiveFloatReg( F13 ),
148 RegisterSaver_LiveFloatReg( F14 ),
149 RegisterSaver_LiveFloatReg( F15 ),
150 RegisterSaver_LiveFloatReg( F16 ),
151 RegisterSaver_LiveFloatReg( F17 ),
152 RegisterSaver_LiveFloatReg( F18 ),
153 RegisterSaver_LiveFloatReg( F19 ),
154 RegisterSaver_LiveFloatReg( F20 ),
155 RegisterSaver_LiveFloatReg( F21 ),
156 RegisterSaver_LiveFloatReg( F22 ),
157 RegisterSaver_LiveFloatReg( F23 ),
158 RegisterSaver_LiveFloatReg( F24 ),
159 RegisterSaver_LiveFloatReg( F25 ),
160 RegisterSaver_LiveFloatReg( F26 ),
161 RegisterSaver_LiveFloatReg( F27 ),
162 RegisterSaver_LiveFloatReg( F28 ),
163 RegisterSaver_LiveFloatReg( F29 ),
164 RegisterSaver_LiveFloatReg( F30 ),
165 RegisterSaver_LiveFloatReg( F31 ),
166 //
167 // live integer registers:
168 //
169 RegisterSaver_LiveIntReg( R0 ),
170 //RegisterSaver_LiveIntReg( R1 ), // stack pointer
171 RegisterSaver_LiveIntReg( R2 ),
172 RegisterSaver_LiveIntReg( R3 ),
173 RegisterSaver_LiveIntReg( R4 ),
174 RegisterSaver_LiveIntReg( R5 ),
175 RegisterSaver_LiveIntReg( R6 ),
176 RegisterSaver_LiveIntReg( R7 ),
177 RegisterSaver_LiveIntReg( R8 ),
178 RegisterSaver_LiveIntReg( R9 ),
179 RegisterSaver_LiveIntReg( R10 ),
180 RegisterSaver_LiveIntReg( R11 ),
181 RegisterSaver_LiveIntReg( R12 ),
182 //RegisterSaver_LiveIntReg( R13 ), // system thread id
183 RegisterSaver_LiveIntReg( R14 ),
184 RegisterSaver_LiveIntReg( R15 ),
185 RegisterSaver_LiveIntReg( R16 ),
186 RegisterSaver_LiveIntReg( R17 ),
187 RegisterSaver_LiveIntReg( R18 ),
188 RegisterSaver_LiveIntReg( R19 ),
189 RegisterSaver_LiveIntReg( R20 ),
190 RegisterSaver_LiveIntReg( R21 ),
191 RegisterSaver_LiveIntReg( R22 ),
192 RegisterSaver_LiveIntReg( R23 ),
193 RegisterSaver_LiveIntReg( R24 ),
194 RegisterSaver_LiveIntReg( R25 ),
195 RegisterSaver_LiveIntReg( R26 ),
196 RegisterSaver_LiveIntReg( R27 ),
197 RegisterSaver_LiveIntReg( R28 ),
198 RegisterSaver_LiveIntReg( R29 ),
199 RegisterSaver_LiveIntReg( R31 ),
200 RegisterSaver_LiveIntReg( R30 ), // r30 must be the last register
201 };
203 OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
204 int* out_frame_size_in_bytes,
205 bool generate_oop_map,
206 int return_pc_adjustment,
207 ReturnPCLocation return_pc_location) {
208 // Push an abi_reg_args-frame and store all registers which may be live.
209 // If requested, create an OopMap: Record volatile registers as
210 // callee-save values in an OopMap so their save locations will be
211 // propagated to the RegisterMap of the caller frame during
212 // StackFrameStream construction (needed for deoptimization; see
213 // compiledVFrame::create_stack_value).
214 // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.
216 int i;
217 int offset;
219 // calcualte frame size
220 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
221 sizeof(RegisterSaver::LiveRegType);
222 const int register_save_size = regstosave_num * reg_size;
223 const int frame_size_in_bytes = round_to(register_save_size, frame::alignment_in_bytes)
224 + frame::abi_reg_args_size;
225 *out_frame_size_in_bytes = frame_size_in_bytes;
226 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
227 const int register_save_offset = frame_size_in_bytes - register_save_size;
229 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
230 OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL;
232 BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");
234 // Save r30 in the last slot of the not yet pushed frame so that we
235 // can use it as scratch reg.
236 __ std(R30, -reg_size, R1_SP);
237 assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size),
238 "consistency check");
240 // save the flags
241 // Do the save_LR_CR by hand and adjust the return pc if requested.
242 __ mfcr(R30);
243 __ std(R30, _abi(cr), R1_SP);
244 switch (return_pc_location) {
245 case return_pc_is_lr: __ mflr(R30); break;
246 case return_pc_is_r4: __ mr(R30, R4); break;
247 case return_pc_is_thread_saved_exception_pc:
248 __ ld(R30, thread_(saved_exception_pc)); break;
249 default: ShouldNotReachHere();
250 }
251 if (return_pc_adjustment != 0)
252 __ addi(R30, R30, return_pc_adjustment);
253 __ std(R30, _abi(lr), R1_SP);
255 // push a new frame
256 __ push_frame(frame_size_in_bytes, R30);
258 // save all registers (ints and floats)
259 offset = register_save_offset;
260 for (int i = 0; i < regstosave_num; i++) {
261 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
262 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
264 switch (reg_type) {
265 case RegisterSaver::int_reg: {
266 if (reg_num != 30) { // We spilled R30 right at the beginning.
267 __ std(as_Register(reg_num), offset, R1_SP);
268 }
269 break;
270 }
271 case RegisterSaver::float_reg: {
272 __ stfd(as_FloatRegister(reg_num), offset, R1_SP);
273 break;
274 }
275 case RegisterSaver::special_reg: {
276 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
277 __ mfctr(R30);
278 __ std(R30, offset, R1_SP);
279 } else {
280 Unimplemented();
281 }
282 break;
283 }
284 default:
285 ShouldNotReachHere();
286 }
288 if (generate_oop_map) {
289 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
290 RegisterSaver_LiveRegs[i].vmreg);
291 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),
292 RegisterSaver_LiveRegs[i].vmreg->next());
293 }
294 offset += reg_size;
295 }
297 BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");
299 // And we're done.
300 return map;
301 }
304 // Pop the current frame and restore all the registers that we
305 // saved.
306 void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
307 int frame_size_in_bytes,
308 bool restore_ctr) {
309 int i;
310 int offset;
311 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
312 sizeof(RegisterSaver::LiveRegType);
313 const int register_save_size = regstosave_num * reg_size;
314 const int register_save_offset = frame_size_in_bytes - register_save_size;
316 BLOCK_COMMENT("restore_live_registers_and_pop_frame {");
318 // restore all registers (ints and floats)
319 offset = register_save_offset;
320 for (int i = 0; i < regstosave_num; i++) {
321 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
322 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
324 switch (reg_type) {
325 case RegisterSaver::int_reg: {
326 if (reg_num != 30) // R30 restored at the end, it's the tmp reg!
327 __ ld(as_Register(reg_num), offset, R1_SP);
328 break;
329 }
330 case RegisterSaver::float_reg: {
331 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
332 break;
333 }
334 case RegisterSaver::special_reg: {
335 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
336 if (restore_ctr) { // Nothing to do here if ctr already contains the next address.
337 __ ld(R30, offset, R1_SP);
338 __ mtctr(R30);
339 }
340 } else {
341 Unimplemented();
342 }
343 break;
344 }
345 default:
346 ShouldNotReachHere();
347 }
348 offset += reg_size;
349 }
351 // pop the frame
352 __ pop_frame();
354 // restore the flags
355 __ restore_LR_CR(R30);
357 // restore scratch register's value
358 __ ld(R30, -reg_size, R1_SP);
360 BLOCK_COMMENT("} restore_live_registers_and_pop_frame");
361 }
363 void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp,
364 int frame_size,int total_args, const VMRegPair *regs,
365 const VMRegPair *regs2) {
366 __ push_frame(frame_size, r_temp);
367 int st_off = frame_size - wordSize;
368 for (int i = 0; i < total_args; i++) {
369 VMReg r_1 = regs[i].first();
370 VMReg r_2 = regs[i].second();
371 if (!r_1->is_valid()) {
372 assert(!r_2->is_valid(), "");
373 continue;
374 }
375 if (r_1->is_Register()) {
376 Register r = r_1->as_Register();
377 __ std(r, st_off, R1_SP);
378 st_off -= wordSize;
379 } else if (r_1->is_FloatRegister()) {
380 FloatRegister f = r_1->as_FloatRegister();
381 __ stfd(f, st_off, R1_SP);
382 st_off -= wordSize;
383 }
384 }
385 if (regs2 != NULL) {
386 for (int i = 0; i < total_args; i++) {
387 VMReg r_1 = regs2[i].first();
388 VMReg r_2 = regs2[i].second();
389 if (!r_1->is_valid()) {
390 assert(!r_2->is_valid(), "");
391 continue;
392 }
393 if (r_1->is_Register()) {
394 Register r = r_1->as_Register();
395 __ std(r, st_off, R1_SP);
396 st_off -= wordSize;
397 } else if (r_1->is_FloatRegister()) {
398 FloatRegister f = r_1->as_FloatRegister();
399 __ stfd(f, st_off, R1_SP);
400 st_off -= wordSize;
401 }
402 }
403 }
404 }
406 void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size,
407 int total_args, const VMRegPair *regs,
408 const VMRegPair *regs2) {
409 int st_off = frame_size - wordSize;
410 for (int i = 0; i < total_args; i++) {
411 VMReg r_1 = regs[i].first();
412 VMReg r_2 = regs[i].second();
413 if (r_1->is_Register()) {
414 Register r = r_1->as_Register();
415 __ ld(r, st_off, R1_SP);
416 st_off -= wordSize;
417 } else if (r_1->is_FloatRegister()) {
418 FloatRegister f = r_1->as_FloatRegister();
419 __ lfd(f, st_off, R1_SP);
420 st_off -= wordSize;
421 }
422 }
423 if (regs2 != NULL)
424 for (int i = 0; i < total_args; i++) {
425 VMReg r_1 = regs2[i].first();
426 VMReg r_2 = regs2[i].second();
427 if (r_1->is_Register()) {
428 Register r = r_1->as_Register();
429 __ ld(r, st_off, R1_SP);
430 st_off -= wordSize;
431 } else if (r_1->is_FloatRegister()) {
432 FloatRegister f = r_1->as_FloatRegister();
433 __ lfd(f, st_off, R1_SP);
434 st_off -= wordSize;
435 }
436 }
437 __ pop_frame();
438 }
440 // Restore the registers that might be holding a result.
441 void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {
442 int i;
443 int offset;
444 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
445 sizeof(RegisterSaver::LiveRegType);
446 const int register_save_size = regstosave_num * reg_size;
447 const int register_save_offset = frame_size_in_bytes - register_save_size;
449 // restore all result registers (ints and floats)
450 offset = register_save_offset;
451 for (int i = 0; i < regstosave_num; i++) {
452 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
453 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
454 switch (reg_type) {
455 case RegisterSaver::int_reg: {
456 if (as_Register(reg_num)==R3_RET) // int result_reg
457 __ ld(as_Register(reg_num), offset, R1_SP);
458 break;
459 }
460 case RegisterSaver::float_reg: {
461 if (as_FloatRegister(reg_num)==F1_RET) // float result_reg
462 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
463 break;
464 }
465 case RegisterSaver::special_reg: {
466 // Special registers don't hold a result.
467 break;
468 }
469 default:
470 ShouldNotReachHere();
471 }
472 offset += reg_size;
473 }
474 }
476 // Is vector's size (in bytes) bigger than a size saved by default?
477 bool SharedRuntime::is_wide_vector(int size) {
478 ResourceMark rm;
479 // Note, MaxVectorSize == 8 on PPC64.
480 assert(size <= 8, err_msg_res("%d bytes vectors are not supported", size));
481 return size > 8;
482 }
483 #ifdef COMPILER2
484 static int reg2slot(VMReg r) {
485 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();
486 }
488 static int reg2offset(VMReg r) {
489 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
490 }
491 #endif
493 // ---------------------------------------------------------------------------
494 // Read the array of BasicTypes from a signature, and compute where the
495 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
496 // quantities. Values less than VMRegImpl::stack0 are registers, those above
497 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
498 // as framesizes are fixed.
499 // VMRegImpl::stack0 refers to the first slot 0(sp).
500 // and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register
501 // up to RegisterImpl::number_of_registers) are the 64-bit
502 // integer registers.
504 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
505 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
506 // units regardless of build. Of course for i486 there is no 64 bit build
508 // The Java calling convention is a "shifted" version of the C ABI.
509 // By skipping the first C ABI register we can call non-static jni methods
510 // with small numbers of arguments without having to shuffle the arguments
511 // at all. Since we control the java ABI we ought to at least get some
512 // advantage out of it.
514 const VMReg java_iarg_reg[8] = {
515 R3->as_VMReg(),
516 R4->as_VMReg(),
517 R5->as_VMReg(),
518 R6->as_VMReg(),
519 R7->as_VMReg(),
520 R8->as_VMReg(),
521 R9->as_VMReg(),
522 R10->as_VMReg()
523 };
525 const VMReg java_farg_reg[13] = {
526 F1->as_VMReg(),
527 F2->as_VMReg(),
528 F3->as_VMReg(),
529 F4->as_VMReg(),
530 F5->as_VMReg(),
531 F6->as_VMReg(),
532 F7->as_VMReg(),
533 F8->as_VMReg(),
534 F9->as_VMReg(),
535 F10->as_VMReg(),
536 F11->as_VMReg(),
537 F12->as_VMReg(),
538 F13->as_VMReg()
539 };
541 const int num_java_iarg_registers = sizeof(java_iarg_reg) / sizeof(java_iarg_reg[0]);
542 const int num_java_farg_registers = sizeof(java_farg_reg) / sizeof(java_farg_reg[0]);
544 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
545 VMRegPair *regs,
546 int total_args_passed,
547 int is_outgoing) {
548 // C2c calling conventions for compiled-compiled calls.
549 // Put 8 ints/longs into registers _AND_ 13 float/doubles into
550 // registers _AND_ put the rest on the stack.
552 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats
553 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
555 int i;
556 VMReg reg;
557 int stk = 0;
558 int ireg = 0;
559 int freg = 0;
561 // We put the first 8 arguments into registers and the rest on the
562 // stack, float arguments are already in their argument registers
563 // due to c2c calling conventions (see calling_convention).
564 for (int i = 0; i < total_args_passed; ++i) {
565 switch(sig_bt[i]) {
566 case T_BOOLEAN:
567 case T_CHAR:
568 case T_BYTE:
569 case T_SHORT:
570 case T_INT:
571 if (ireg < num_java_iarg_registers) {
572 // Put int/ptr in register
573 reg = java_iarg_reg[ireg];
574 ++ireg;
575 } else {
576 // Put int/ptr on stack.
577 reg = VMRegImpl::stack2reg(stk);
578 stk += inc_stk_for_intfloat;
579 }
580 regs[i].set1(reg);
581 break;
582 case T_LONG:
583 assert(sig_bt[i+1] == T_VOID, "expecting half");
584 if (ireg < num_java_iarg_registers) {
585 // Put long in register.
586 reg = java_iarg_reg[ireg];
587 ++ireg;
588 } else {
589 // Put long on stack. They must be aligned to 2 slots.
590 if (stk & 0x1) ++stk;
591 reg = VMRegImpl::stack2reg(stk);
592 stk += inc_stk_for_longdouble;
593 }
594 regs[i].set2(reg);
595 break;
596 case T_OBJECT:
597 case T_ARRAY:
598 case T_ADDRESS:
599 if (ireg < num_java_iarg_registers) {
600 // Put ptr in register.
601 reg = java_iarg_reg[ireg];
602 ++ireg;
603 } else {
604 // Put ptr on stack. Objects must be aligned to 2 slots too,
605 // because "64-bit pointers record oop-ishness on 2 aligned
606 // adjacent registers." (see OopFlow::build_oop_map).
607 if (stk & 0x1) ++stk;
608 reg = VMRegImpl::stack2reg(stk);
609 stk += inc_stk_for_longdouble;
610 }
611 regs[i].set2(reg);
612 break;
613 case T_FLOAT:
614 if (freg < num_java_farg_registers) {
615 // Put float in register.
616 reg = java_farg_reg[freg];
617 ++freg;
618 } else {
619 // Put float on stack.
620 reg = VMRegImpl::stack2reg(stk);
621 stk += inc_stk_for_intfloat;
622 }
623 regs[i].set1(reg);
624 break;
625 case T_DOUBLE:
626 assert(sig_bt[i+1] == T_VOID, "expecting half");
627 if (freg < num_java_farg_registers) {
628 // Put double in register.
629 reg = java_farg_reg[freg];
630 ++freg;
631 } else {
632 // Put double on stack. They must be aligned to 2 slots.
633 if (stk & 0x1) ++stk;
634 reg = VMRegImpl::stack2reg(stk);
635 stk += inc_stk_for_longdouble;
636 }
637 regs[i].set2(reg);
638 break;
639 case T_VOID:
640 // Do not count halves.
641 regs[i].set_bad();
642 break;
643 default:
644 ShouldNotReachHere();
645 }
646 }
647 return round_to(stk, 2);
648 }
650 #ifdef COMPILER2
651 // Calling convention for calling C code.
652 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
653 VMRegPair *regs,
654 VMRegPair *regs2,
655 int total_args_passed) {
656 // Calling conventions for C runtime calls and calls to JNI native methods.
657 //
658 // PPC64 convention: Hoist the first 8 int/ptr/long's in the first 8
659 // int regs, leaving int regs undefined if the arg is flt/dbl. Hoist
660 // the first 13 flt/dbl's in the first 13 fp regs but additionally
661 // copy flt/dbl to the stack if they are beyond the 8th argument.
663 const VMReg iarg_reg[8] = {
664 R3->as_VMReg(),
665 R4->as_VMReg(),
666 R5->as_VMReg(),
667 R6->as_VMReg(),
668 R7->as_VMReg(),
669 R8->as_VMReg(),
670 R9->as_VMReg(),
671 R10->as_VMReg()
672 };
674 const VMReg farg_reg[13] = {
675 F1->as_VMReg(),
676 F2->as_VMReg(),
677 F3->as_VMReg(),
678 F4->as_VMReg(),
679 F5->as_VMReg(),
680 F6->as_VMReg(),
681 F7->as_VMReg(),
682 F8->as_VMReg(),
683 F9->as_VMReg(),
684 F10->as_VMReg(),
685 F11->as_VMReg(),
686 F12->as_VMReg(),
687 F13->as_VMReg()
688 };
690 // Check calling conventions consistency.
691 assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
692 sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
693 "consistency");
695 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
696 // 2 such slots, like 64 bit values do.
697 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
698 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
700 int i;
701 VMReg reg;
702 // Leave room for C-compatible ABI_REG_ARGS.
703 int stk = (frame::abi_reg_args_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
704 int arg = 0;
705 int freg = 0;
707 // Avoid passing C arguments in the wrong stack slots.
708 #if defined(ABI_ELFv2)
709 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 96,
710 "passing C arguments in wrong stack slots");
711 #else
712 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112,
713 "passing C arguments in wrong stack slots");
714 #endif
715 // We fill-out regs AND regs2 if an argument must be passed in a
716 // register AND in a stack slot. If regs2 is NULL in such a
717 // situation, we bail-out with a fatal error.
718 for (int i = 0; i < total_args_passed; ++i, ++arg) {
719 // Initialize regs2 to BAD.
720 if (regs2 != NULL) regs2[i].set_bad();
722 switch(sig_bt[i]) {
724 //
725 // If arguments 0-7 are integers, they are passed in integer registers.
726 // Argument i is placed in iarg_reg[i].
727 //
728 case T_BOOLEAN:
729 case T_CHAR:
730 case T_BYTE:
731 case T_SHORT:
732 case T_INT:
733 // We must cast ints to longs and use full 64 bit stack slots
734 // here. We do the cast in GraphKit::gen_stub() and just guard
735 // here against loosing that change.
736 assert(CCallingConventionRequiresIntsAsLongs,
737 "argument of type int should be promoted to type long");
738 guarantee(i > 0 && sig_bt[i-1] == T_LONG,
739 "argument of type (bt) should have been promoted to type (T_LONG,bt) for bt in "
740 "{T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
741 // Do not count halves.
742 regs[i].set_bad();
743 --arg;
744 break;
745 case T_LONG:
746 guarantee(sig_bt[i+1] == T_VOID ||
747 sig_bt[i+1] == T_BOOLEAN || sig_bt[i+1] == T_CHAR ||
748 sig_bt[i+1] == T_BYTE || sig_bt[i+1] == T_SHORT ||
749 sig_bt[i+1] == T_INT,
750 "expecting type (T_LONG,half) or type (T_LONG,bt) with bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
751 case T_OBJECT:
752 case T_ARRAY:
753 case T_ADDRESS:
754 case T_METADATA:
755 // Oops are already boxed if required (JNI).
756 if (arg < Argument::n_int_register_parameters_c) {
757 reg = iarg_reg[arg];
758 } else {
759 reg = VMRegImpl::stack2reg(stk);
760 stk += inc_stk_for_longdouble;
761 }
762 regs[i].set2(reg);
763 break;
765 //
766 // Floats are treated differently from int regs: The first 13 float arguments
767 // are passed in registers (not the float args among the first 13 args).
768 // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
769 // in farg_reg[j] if argument i is the j-th float argument of this call.
770 //
771 case T_FLOAT:
772 if (freg < Argument::n_float_register_parameters_c) {
773 // Put float in register ...
774 reg = farg_reg[freg];
775 ++freg;
777 // Argument i for i > 8 is placed on the stack even if it's
778 // placed in a register (if it's a float arg). Aix disassembly
779 // shows that xlC places these float args on the stack AND in
780 // a register. This is not documented, but we follow this
781 // convention, too.
782 if (arg >= Argument::n_regs_not_on_stack_c) {
783 // ... and on the stack.
784 guarantee(regs2 != NULL, "must pass float in register and stack slot");
785 VMReg reg2 = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
786 regs2[i].set1(reg2);
787 stk += inc_stk_for_intfloat;
788 }
790 } else {
791 // Put float on stack.
792 reg = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
793 stk += inc_stk_for_intfloat;
794 }
795 regs[i].set1(reg);
796 break;
797 case T_DOUBLE:
798 assert(sig_bt[i+1] == T_VOID, "expecting half");
799 if (freg < Argument::n_float_register_parameters_c) {
800 // Put double in register ...
801 reg = farg_reg[freg];
802 ++freg;
804 // Argument i for i > 8 is placed on the stack even if it's
805 // placed in a register (if it's a double arg). Aix disassembly
806 // shows that xlC places these float args on the stack AND in
807 // a register. This is not documented, but we follow this
808 // convention, too.
809 if (arg >= Argument::n_regs_not_on_stack_c) {
810 // ... and on the stack.
811 guarantee(regs2 != NULL, "must pass float in register and stack slot");
812 VMReg reg2 = VMRegImpl::stack2reg(stk);
813 regs2[i].set2(reg2);
814 stk += inc_stk_for_longdouble;
815 }
816 } else {
817 // Put double on stack.
818 reg = VMRegImpl::stack2reg(stk);
819 stk += inc_stk_for_longdouble;
820 }
821 regs[i].set2(reg);
822 break;
824 case T_VOID:
825 // Do not count halves.
826 regs[i].set_bad();
827 --arg;
828 break;
829 default:
830 ShouldNotReachHere();
831 }
832 }
834 return round_to(stk, 2);
835 }
836 #endif // COMPILER2
838 static address gen_c2i_adapter(MacroAssembler *masm,
839 int total_args_passed,
840 int comp_args_on_stack,
841 const BasicType *sig_bt,
842 const VMRegPair *regs,
843 Label& call_interpreter,
844 const Register& ientry) {
846 address c2i_entrypoint;
848 const Register sender_SP = R21_sender_SP; // == R21_tmp1
849 const Register code = R22_tmp2;
850 //const Register ientry = R23_tmp3;
851 const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 };
852 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
853 int value_regs_index = 0;
855 const Register return_pc = R27_tmp7;
856 const Register tmp = R28_tmp8;
858 assert_different_registers(sender_SP, code, ientry, return_pc, tmp);
860 // Adapter needs TOP_IJAVA_FRAME_ABI.
861 const int adapter_size = frame::top_ijava_frame_abi_size +
862 round_to(total_args_passed * wordSize, frame::alignment_in_bytes);
864 // regular (verified) c2i entry point
865 c2i_entrypoint = __ pc();
867 // Does compiled code exists? If yes, patch the caller's callsite.
868 __ ld(code, method_(code));
869 __ cmpdi(CCR0, code, 0);
870 __ ld(ientry, method_(interpreter_entry)); // preloaded
871 __ beq(CCR0, call_interpreter);
874 // Patch caller's callsite, method_(code) was not NULL which means that
875 // compiled code exists.
876 __ mflr(return_pc);
877 __ std(return_pc, _abi(lr), R1_SP);
878 RegisterSaver::push_frame_and_save_argument_registers(masm, tmp, adapter_size, total_args_passed, regs);
880 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), R19_method, return_pc);
882 RegisterSaver::restore_argument_registers_and_pop_frame(masm, adapter_size, total_args_passed, regs);
883 __ ld(return_pc, _abi(lr), R1_SP);
884 __ ld(ientry, method_(interpreter_entry)); // preloaded
885 __ mtlr(return_pc);
888 // Call the interpreter.
889 __ BIND(call_interpreter);
890 __ mtctr(ientry);
892 // Get a copy of the current SP for loading caller's arguments.
893 __ mr(sender_SP, R1_SP);
895 // Add space for the adapter.
896 __ resize_frame(-adapter_size, R12_scratch2);
898 int st_off = adapter_size - wordSize;
900 // Write the args into the outgoing interpreter space.
901 for (int i = 0; i < total_args_passed; i++) {
902 VMReg r_1 = regs[i].first();
903 VMReg r_2 = regs[i].second();
904 if (!r_1->is_valid()) {
905 assert(!r_2->is_valid(), "");
906 continue;
907 }
908 if (r_1->is_stack()) {
909 Register tmp_reg = value_regs[value_regs_index];
910 value_regs_index = (value_regs_index + 1) % num_value_regs;
911 // The calling convention produces OptoRegs that ignore the out
912 // preserve area (JIT's ABI). We must account for it here.
913 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
914 if (!r_2->is_valid()) {
915 __ lwz(tmp_reg, ld_off, sender_SP);
916 } else {
917 __ ld(tmp_reg, ld_off, sender_SP);
918 }
919 // Pretend stack targets were loaded into tmp_reg.
920 r_1 = tmp_reg->as_VMReg();
921 }
923 if (r_1->is_Register()) {
924 Register r = r_1->as_Register();
925 if (!r_2->is_valid()) {
926 __ stw(r, st_off, R1_SP);
927 st_off-=wordSize;
928 } else {
929 // Longs are given 2 64-bit slots in the interpreter, but the
930 // data is passed in only 1 slot.
931 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
932 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
933 st_off-=wordSize;
934 }
935 __ std(r, st_off, R1_SP);
936 st_off-=wordSize;
937 }
938 } else {
939 assert(r_1->is_FloatRegister(), "");
940 FloatRegister f = r_1->as_FloatRegister();
941 if (!r_2->is_valid()) {
942 __ stfs(f, st_off, R1_SP);
943 st_off-=wordSize;
944 } else {
945 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
946 // data is passed in only 1 slot.
947 // One of these should get known junk...
948 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
949 st_off-=wordSize;
950 __ stfd(f, st_off, R1_SP);
951 st_off-=wordSize;
952 }
953 }
954 }
956 // Jump to the interpreter just as if interpreter was doing it.
958 #ifdef CC_INTERP
959 const Register tos = R17_tos;
960 #else
961 const Register tos = R15_esp;
962 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
963 #endif
965 // load TOS
966 __ addi(tos, R1_SP, st_off);
968 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
969 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
970 __ bctr();
972 return c2i_entrypoint;
973 }
975 static void gen_i2c_adapter(MacroAssembler *masm,
976 int total_args_passed,
977 int comp_args_on_stack,
978 const BasicType *sig_bt,
979 const VMRegPair *regs) {
981 // Load method's entry-point from method.
982 __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
983 __ mtctr(R12_scratch2);
985 // We will only enter here from an interpreted frame and never from after
986 // passing thru a c2i. Azul allowed this but we do not. If we lose the
987 // race and use a c2i we will remain interpreted for the race loser(s).
988 // This removes all sorts of headaches on the x86 side and also eliminates
989 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
991 // Note: r13 contains the senderSP on entry. We must preserve it since
992 // we may do a i2c -> c2i transition if we lose a race where compiled
993 // code goes non-entrant while we get args ready.
994 // In addition we use r13 to locate all the interpreter args as
995 // we must align the stack to 16 bytes on an i2c entry else we
996 // lose alignment we expect in all compiled code and register
997 // save code can segv when fxsave instructions find improperly
998 // aligned stack pointer.
1000 #ifdef CC_INTERP
1001 const Register ld_ptr = R17_tos;
1002 #else
1003 const Register ld_ptr = R15_esp;
1004 #endif
1006 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
1007 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
1008 int value_regs_index = 0;
1010 int ld_offset = total_args_passed*wordSize;
1012 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
1013 // in registers, we will occasionally have no stack args.
1014 int comp_words_on_stack = 0;
1015 if (comp_args_on_stack) {
1016 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1017 // registers are below. By subtracting stack0, we either get a negative
1018 // number (all values in registers) or the maximum stack slot accessed.
1020 // Convert 4-byte c2 stack slots to words.
1021 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1022 // Round up to miminum stack alignment, in wordSize.
1023 comp_words_on_stack = round_to(comp_words_on_stack, 2);
1024 __ resize_frame(-comp_words_on_stack * wordSize, R11_scratch1);
1025 }
1027 // Now generate the shuffle code. Pick up all register args and move the
1028 // rest through register value=Z_R12.
1029 BLOCK_COMMENT("Shuffle arguments");
1030 for (int i = 0; i < total_args_passed; i++) {
1031 if (sig_bt[i] == T_VOID) {
1032 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
1033 continue;
1034 }
1036 // Pick up 0, 1 or 2 words from ld_ptr.
1037 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
1038 "scrambled load targets?");
1039 VMReg r_1 = regs[i].first();
1040 VMReg r_2 = regs[i].second();
1041 if (!r_1->is_valid()) {
1042 assert(!r_2->is_valid(), "");
1043 continue;
1044 }
1045 if (r_1->is_FloatRegister()) {
1046 if (!r_2->is_valid()) {
1047 __ lfs(r_1->as_FloatRegister(), ld_offset, ld_ptr);
1048 ld_offset-=wordSize;
1049 } else {
1050 // Skip the unused interpreter slot.
1051 __ lfd(r_1->as_FloatRegister(), ld_offset-wordSize, ld_ptr);
1052 ld_offset-=2*wordSize;
1053 }
1054 } else {
1055 Register r;
1056 if (r_1->is_stack()) {
1057 // Must do a memory to memory move thru "value".
1058 r = value_regs[value_regs_index];
1059 value_regs_index = (value_regs_index + 1) % num_value_regs;
1060 } else {
1061 r = r_1->as_Register();
1062 }
1063 if (!r_2->is_valid()) {
1064 // Not sure we need to do this but it shouldn't hurt.
1065 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ADDRESS || sig_bt[i] == T_ARRAY) {
1066 __ ld(r, ld_offset, ld_ptr);
1067 ld_offset-=wordSize;
1068 } else {
1069 __ lwz(r, ld_offset, ld_ptr);
1070 ld_offset-=wordSize;
1071 }
1072 } else {
1073 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
1074 // data is passed in only 1 slot.
1075 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
1076 ld_offset-=wordSize;
1077 }
1078 __ ld(r, ld_offset, ld_ptr);
1079 ld_offset-=wordSize;
1080 }
1082 if (r_1->is_stack()) {
1083 // Now store value where the compiler expects it
1084 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size;
1086 if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN ||
1087 sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) {
1088 __ stw(r, st_off, R1_SP);
1089 } else {
1090 __ std(r, st_off, R1_SP);
1091 }
1092 }
1093 }
1094 }
1096 BLOCK_COMMENT("Store method");
1097 // Store method into thread->callee_target.
1098 // We might end up in handle_wrong_method if the callee is
1099 // deoptimized as we race thru here. If that happens we don't want
1100 // to take a safepoint because the caller frame will look
1101 // interpreted and arguments are now "compiled" so it is much better
1102 // to make this transition invisible to the stack walking
1103 // code. Unfortunately if we try and find the callee by normal means
1104 // a safepoint is possible. So we stash the desired callee in the
1105 // thread and the vm will find there should this case occur.
1106 __ std(R19_method, thread_(callee_target));
1108 // Jump to the compiled code just as if compiled code was doing it.
1109 __ bctr();
1110 }
1112 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1113 int total_args_passed,
1114 int comp_args_on_stack,
1115 const BasicType *sig_bt,
1116 const VMRegPair *regs,
1117 AdapterFingerPrint* fingerprint) {
1118 address i2c_entry;
1119 address c2i_unverified_entry;
1120 address c2i_entry;
1123 // entry: i2c
1125 __ align(CodeEntryAlignment);
1126 i2c_entry = __ pc();
1127 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
1130 // entry: c2i unverified
1132 __ align(CodeEntryAlignment);
1133 BLOCK_COMMENT("c2i unverified entry");
1134 c2i_unverified_entry = __ pc();
1136 // inline_cache contains a compiledICHolder
1137 const Register ic = R19_method;
1138 const Register ic_klass = R11_scratch1;
1139 const Register receiver_klass = R12_scratch2;
1140 const Register code = R21_tmp1;
1141 const Register ientry = R23_tmp3;
1143 assert_different_registers(ic, ic_klass, receiver_klass, R3_ARG1, code, ientry);
1144 assert(R11_scratch1 == R11, "need prologue scratch register");
1146 Label call_interpreter;
1148 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()),
1149 "klass offset should reach into any page");
1150 // Check for NULL argument if we don't have implicit null checks.
1151 if (!ImplicitNullChecks || !os::zero_page_read_protected()) {
1152 if (TrapBasedNullChecks) {
1153 __ trap_null_check(R3_ARG1);
1154 } else {
1155 Label valid;
1156 __ cmpdi(CCR0, R3_ARG1, 0);
1157 __ bne_predict_taken(CCR0, valid);
1158 // We have a null argument, branch to ic_miss_stub.
1159 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1160 relocInfo::runtime_call_type);
1161 __ BIND(valid);
1162 }
1163 }
1164 // Assume argument is not NULL, load klass from receiver.
1165 __ load_klass(receiver_klass, R3_ARG1);
1167 __ ld(ic_klass, CompiledICHolder::holder_klass_offset(), ic);
1169 if (TrapBasedICMissChecks) {
1170 __ trap_ic_miss_check(receiver_klass, ic_klass);
1171 } else {
1172 Label valid;
1173 __ cmpd(CCR0, receiver_klass, ic_klass);
1174 __ beq_predict_taken(CCR0, valid);
1175 // We have an unexpected klass, branch to ic_miss_stub.
1176 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1177 relocInfo::runtime_call_type);
1178 __ BIND(valid);
1179 }
1181 // Argument is valid and klass is as expected, continue.
1183 // Extract method from inline cache, verified entry point needs it.
1184 __ ld(R19_method, CompiledICHolder::holder_method_offset(), ic);
1185 assert(R19_method == ic, "the inline cache register is dead here");
1187 __ ld(code, method_(code));
1188 __ cmpdi(CCR0, code, 0);
1189 __ ld(ientry, method_(interpreter_entry)); // preloaded
1190 __ beq_predict_taken(CCR0, call_interpreter);
1192 // Branch to ic_miss_stub.
1193 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1195 // entry: c2i
1197 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
1199 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1200 }
1202 #ifdef COMPILER2
1203 // An oop arg. Must pass a handle not the oop itself.
1204 static void object_move(MacroAssembler* masm,
1205 int frame_size_in_slots,
1206 OopMap* oop_map, int oop_handle_offset,
1207 bool is_receiver, int* receiver_offset,
1208 VMRegPair src, VMRegPair dst,
1209 Register r_caller_sp, Register r_temp_1, Register r_temp_2) {
1210 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)),
1211 "receiver has already been moved");
1213 // We must pass a handle. First figure out the location we use as a handle.
1215 if (src.first()->is_stack()) {
1216 // stack to stack or reg
1218 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1219 Label skip;
1220 const int oop_slot_in_callers_frame = reg2slot(src.first());
1222 guarantee(!is_receiver, "expecting receiver in register");
1223 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot_in_callers_frame + frame_size_in_slots));
1225 __ addi(r_handle, r_caller_sp, reg2offset(src.first()));
1226 __ ld( r_temp_2, reg2offset(src.first()), r_caller_sp);
1227 __ cmpdi(CCR0, r_temp_2, 0);
1228 __ bne(CCR0, skip);
1229 // Use a NULL handle if oop is NULL.
1230 __ li(r_handle, 0);
1231 __ bind(skip);
1233 if (dst.first()->is_stack()) {
1234 // stack to stack
1235 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1236 } else {
1237 // stack to reg
1238 // Nothing to do, r_handle is already the dst register.
1239 }
1240 } else {
1241 // reg to stack or reg
1242 const Register r_oop = src.first()->as_Register();
1243 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1244 const int oop_slot = (r_oop->encoding()-R3_ARG1->encoding()) * VMRegImpl::slots_per_word
1245 + oop_handle_offset; // in slots
1246 const int oop_offset = oop_slot * VMRegImpl::stack_slot_size;
1247 Label skip;
1249 if (is_receiver) {
1250 *receiver_offset = oop_offset;
1251 }
1252 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot));
1254 __ std( r_oop, oop_offset, R1_SP);
1255 __ addi(r_handle, R1_SP, oop_offset);
1257 __ cmpdi(CCR0, r_oop, 0);
1258 __ bne(CCR0, skip);
1259 // Use a NULL handle if oop is NULL.
1260 __ li(r_handle, 0);
1261 __ bind(skip);
1263 if (dst.first()->is_stack()) {
1264 // reg to stack
1265 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1266 } else {
1267 // reg to reg
1268 // Nothing to do, r_handle is already the dst register.
1269 }
1270 }
1271 }
1273 static void int_move(MacroAssembler*masm,
1274 VMRegPair src, VMRegPair dst,
1275 Register r_caller_sp, Register r_temp) {
1276 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long-int");
1277 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1279 if (src.first()->is_stack()) {
1280 if (dst.first()->is_stack()) {
1281 // stack to stack
1282 __ lwa(r_temp, reg2offset(src.first()), r_caller_sp);
1283 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1284 } else {
1285 // stack to reg
1286 __ lwa(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1287 }
1288 } else if (dst.first()->is_stack()) {
1289 // reg to stack
1290 __ extsw(r_temp, src.first()->as_Register());
1291 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1292 } else {
1293 // reg to reg
1294 __ extsw(dst.first()->as_Register(), src.first()->as_Register());
1295 }
1296 }
1298 static void long_move(MacroAssembler*masm,
1299 VMRegPair src, VMRegPair dst,
1300 Register r_caller_sp, Register r_temp) {
1301 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long");
1302 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1304 if (src.first()->is_stack()) {
1305 if (dst.first()->is_stack()) {
1306 // stack to stack
1307 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1308 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1309 } else {
1310 // stack to reg
1311 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1312 }
1313 } else if (dst.first()->is_stack()) {
1314 // reg to stack
1315 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1316 } else {
1317 // reg to reg
1318 if (dst.first()->as_Register() != src.first()->as_Register())
1319 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1320 }
1321 }
1323 static void float_move(MacroAssembler*masm,
1324 VMRegPair src, VMRegPair dst,
1325 Register r_caller_sp, Register r_temp) {
1326 assert(src.first()->is_valid() && !src.second()->is_valid(), "incoming must be float");
1327 assert(dst.first()->is_valid() && !dst.second()->is_valid(), "outgoing must be float");
1329 if (src.first()->is_stack()) {
1330 if (dst.first()->is_stack()) {
1331 // stack to stack
1332 __ lwz(r_temp, reg2offset(src.first()), r_caller_sp);
1333 __ stw(r_temp, reg2offset(dst.first()), R1_SP);
1334 } else {
1335 // stack to reg
1336 __ lfs(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1337 }
1338 } else if (dst.first()->is_stack()) {
1339 // reg to stack
1340 __ stfs(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1341 } else {
1342 // reg to reg
1343 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1344 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1345 }
1346 }
1348 static void double_move(MacroAssembler*masm,
1349 VMRegPair src, VMRegPair dst,
1350 Register r_caller_sp, Register r_temp) {
1351 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be double");
1352 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be double");
1354 if (src.first()->is_stack()) {
1355 if (dst.first()->is_stack()) {
1356 // stack to stack
1357 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1358 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1359 } else {
1360 // stack to reg
1361 __ lfd(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1362 }
1363 } else if (dst.first()->is_stack()) {
1364 // reg to stack
1365 __ stfd(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1366 } else {
1367 // reg to reg
1368 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1369 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1370 }
1371 }
1373 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1374 switch (ret_type) {
1375 case T_BOOLEAN:
1376 case T_CHAR:
1377 case T_BYTE:
1378 case T_SHORT:
1379 case T_INT:
1380 __ stw (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1381 break;
1382 case T_ARRAY:
1383 case T_OBJECT:
1384 case T_LONG:
1385 __ std (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1386 break;
1387 case T_FLOAT:
1388 __ stfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1389 break;
1390 case T_DOUBLE:
1391 __ stfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1392 break;
1393 case T_VOID:
1394 break;
1395 default:
1396 ShouldNotReachHere();
1397 break;
1398 }
1399 }
1401 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1402 switch (ret_type) {
1403 case T_BOOLEAN:
1404 case T_CHAR:
1405 case T_BYTE:
1406 case T_SHORT:
1407 case T_INT:
1408 __ lwz(R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1409 break;
1410 case T_ARRAY:
1411 case T_OBJECT:
1412 case T_LONG:
1413 __ ld (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1414 break;
1415 case T_FLOAT:
1416 __ lfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1417 break;
1418 case T_DOUBLE:
1419 __ lfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1420 break;
1421 case T_VOID:
1422 break;
1423 default:
1424 ShouldNotReachHere();
1425 break;
1426 }
1427 }
1429 static void save_or_restore_arguments(MacroAssembler* masm,
1430 const int stack_slots,
1431 const int total_in_args,
1432 const int arg_save_area,
1433 OopMap* map,
1434 VMRegPair* in_regs,
1435 BasicType* in_sig_bt) {
1436 // If map is non-NULL then the code should store the values,
1437 // otherwise it should load them.
1438 int slot = arg_save_area;
1439 // Save down double word first.
1440 for (int i = 0; i < total_in_args; i++) {
1441 if (in_regs[i].first()->is_FloatRegister() && in_sig_bt[i] == T_DOUBLE) {
1442 int offset = slot * VMRegImpl::stack_slot_size;
1443 slot += VMRegImpl::slots_per_word;
1444 assert(slot <= stack_slots, "overflow (after DOUBLE stack slot)");
1445 if (map != NULL) {
1446 __ stfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1447 } else {
1448 __ lfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1449 }
1450 } else if (in_regs[i].first()->is_Register() &&
1451 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1452 int offset = slot * VMRegImpl::stack_slot_size;
1453 if (map != NULL) {
1454 __ std(in_regs[i].first()->as_Register(), offset, R1_SP);
1455 if (in_sig_bt[i] == T_ARRAY) {
1456 map->set_oop(VMRegImpl::stack2reg(slot));
1457 }
1458 } else {
1459 __ ld(in_regs[i].first()->as_Register(), offset, R1_SP);
1460 }
1461 slot += VMRegImpl::slots_per_word;
1462 assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
1463 }
1464 }
1465 // Save or restore single word registers.
1466 for (int i = 0; i < total_in_args; i++) {
1467 // PPC64: pass ints as longs: must only deal with floats here.
1468 if (in_regs[i].first()->is_FloatRegister()) {
1469 if (in_sig_bt[i] == T_FLOAT) {
1470 int offset = slot * VMRegImpl::stack_slot_size;
1471 slot++;
1472 assert(slot <= stack_slots, "overflow (after FLOAT stack slot)");
1473 if (map != NULL) {
1474 __ stfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1475 } else {
1476 __ lfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1477 }
1478 }
1479 } else if (in_regs[i].first()->is_stack()) {
1480 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1481 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1482 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1483 }
1484 }
1485 }
1486 }
1488 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1489 // keeps a new JNI critical region from starting until a GC has been
1490 // forced. Save down any oops in registers and describe them in an
1491 // OopMap.
1492 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1493 const int stack_slots,
1494 const int total_in_args,
1495 const int arg_save_area,
1496 OopMapSet* oop_maps,
1497 VMRegPair* in_regs,
1498 BasicType* in_sig_bt,
1499 Register tmp_reg ) {
1500 __ block_comment("check GC_locker::needs_gc");
1501 Label cont;
1502 __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GC_locker::needs_gc_address());
1503 __ cmplwi(CCR0, tmp_reg, 0);
1504 __ beq(CCR0, cont);
1506 // Save down any values that are live in registers and call into the
1507 // runtime to halt for a GC.
1508 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1509 save_or_restore_arguments(masm, stack_slots, total_in_args,
1510 arg_save_area, map, in_regs, in_sig_bt);
1512 __ mr(R3_ARG1, R16_thread);
1513 __ set_last_Java_frame(R1_SP, noreg);
1515 __ block_comment("block_for_jni_critical");
1516 address entry_point = CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical);
1517 #if defined(ABI_ELFv2)
1518 __ call_c(entry_point, relocInfo::runtime_call_type);
1519 #else
1520 __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::runtime_call_type);
1521 #endif
1522 address start = __ pc() - __ offset(),
1523 calls_return_pc = __ last_calls_return_pc();
1524 oop_maps->add_gc_map(calls_return_pc - start, map);
1526 __ reset_last_Java_frame();
1528 // Reload all the register arguments.
1529 save_or_restore_arguments(masm, stack_slots, total_in_args,
1530 arg_save_area, NULL, in_regs, in_sig_bt);
1532 __ BIND(cont);
1534 #ifdef ASSERT
1535 if (StressCriticalJNINatives) {
1536 // Stress register saving.
1537 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1538 save_or_restore_arguments(masm, stack_slots, total_in_args,
1539 arg_save_area, map, in_regs, in_sig_bt);
1540 // Destroy argument registers.
1541 for (int i = 0; i < total_in_args; i++) {
1542 if (in_regs[i].first()->is_Register()) {
1543 const Register reg = in_regs[i].first()->as_Register();
1544 __ neg(reg, reg);
1545 } else if (in_regs[i].first()->is_FloatRegister()) {
1546 __ fneg(in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister());
1547 }
1548 }
1550 save_or_restore_arguments(masm, stack_slots, total_in_args,
1551 arg_save_area, NULL, in_regs, in_sig_bt);
1552 }
1553 #endif
1554 }
1556 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst, Register r_caller_sp, Register r_temp) {
1557 if (src.first()->is_stack()) {
1558 if (dst.first()->is_stack()) {
1559 // stack to stack
1560 __ ld(r_temp, reg2offset(src.first()), r_caller_sp);
1561 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1562 } else {
1563 // stack to reg
1564 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1565 }
1566 } else if (dst.first()->is_stack()) {
1567 // reg to stack
1568 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1569 } else {
1570 if (dst.first() != src.first()) {
1571 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1572 }
1573 }
1574 }
1576 // Unpack an array argument into a pointer to the body and the length
1577 // if the array is non-null, otherwise pass 0 for both.
1578 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type,
1579 VMRegPair body_arg, VMRegPair length_arg, Register r_caller_sp,
1580 Register tmp_reg, Register tmp2_reg) {
1581 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1582 "possible collision");
1583 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1584 "possible collision");
1586 // Pass the length, ptr pair.
1587 Label set_out_args;
1588 VMRegPair tmp, tmp2;
1589 tmp.set_ptr(tmp_reg->as_VMReg());
1590 tmp2.set_ptr(tmp2_reg->as_VMReg());
1591 if (reg.first()->is_stack()) {
1592 // Load the arg up from the stack.
1593 move_ptr(masm, reg, tmp, r_caller_sp, /*unused*/ R0);
1594 reg = tmp;
1595 }
1596 __ li(tmp2_reg, 0); // Pass zeros if Array=null.
1597 if (tmp_reg != reg.first()->as_Register()) __ li(tmp_reg, 0);
1598 __ cmpdi(CCR0, reg.first()->as_Register(), 0);
1599 __ beq(CCR0, set_out_args);
1600 __ lwa(tmp2_reg, arrayOopDesc::length_offset_in_bytes(), reg.first()->as_Register());
1601 __ addi(tmp_reg, reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type));
1602 __ bind(set_out_args);
1603 move_ptr(masm, tmp, body_arg, r_caller_sp, /*unused*/ R0);
1604 move_ptr(masm, tmp2, length_arg, r_caller_sp, /*unused*/ R0); // Same as move32_64 on PPC64.
1605 }
1607 static void verify_oop_args(MacroAssembler* masm,
1608 methodHandle method,
1609 const BasicType* sig_bt,
1610 const VMRegPair* regs) {
1611 Register temp_reg = R19_method; // not part of any compiled calling seq
1612 if (VerifyOops) {
1613 for (int i = 0; i < method->size_of_parameters(); i++) {
1614 if (sig_bt[i] == T_OBJECT ||
1615 sig_bt[i] == T_ARRAY) {
1616 VMReg r = regs[i].first();
1617 assert(r->is_valid(), "bad oop arg");
1618 if (r->is_stack()) {
1619 __ ld(temp_reg, reg2offset(r), R1_SP);
1620 __ verify_oop(temp_reg);
1621 } else {
1622 __ verify_oop(r->as_Register());
1623 }
1624 }
1625 }
1626 }
1627 }
1629 static void gen_special_dispatch(MacroAssembler* masm,
1630 methodHandle method,
1631 const BasicType* sig_bt,
1632 const VMRegPair* regs) {
1633 verify_oop_args(masm, method, sig_bt, regs);
1634 vmIntrinsics::ID iid = method->intrinsic_id();
1636 // Now write the args into the outgoing interpreter space
1637 bool has_receiver = false;
1638 Register receiver_reg = noreg;
1639 int member_arg_pos = -1;
1640 Register member_reg = noreg;
1641 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1642 if (ref_kind != 0) {
1643 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1644 member_reg = R19_method; // known to be free at this point
1645 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1646 } else if (iid == vmIntrinsics::_invokeBasic) {
1647 has_receiver = true;
1648 } else {
1649 fatal(err_msg_res("unexpected intrinsic id %d", iid));
1650 }
1652 if (member_reg != noreg) {
1653 // Load the member_arg into register, if necessary.
1654 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1655 VMReg r = regs[member_arg_pos].first();
1656 if (r->is_stack()) {
1657 __ ld(member_reg, reg2offset(r), R1_SP);
1658 } else {
1659 // no data motion is needed
1660 member_reg = r->as_Register();
1661 }
1662 }
1664 if (has_receiver) {
1665 // Make sure the receiver is loaded into a register.
1666 assert(method->size_of_parameters() > 0, "oob");
1667 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1668 VMReg r = regs[0].first();
1669 assert(r->is_valid(), "bad receiver arg");
1670 if (r->is_stack()) {
1671 // Porting note: This assumes that compiled calling conventions always
1672 // pass the receiver oop in a register. If this is not true on some
1673 // platform, pick a temp and load the receiver from stack.
1674 fatal("receiver always in a register");
1675 receiver_reg = R11_scratch1; // TODO (hs24): is R11_scratch1 really free at this point?
1676 __ ld(receiver_reg, reg2offset(r), R1_SP);
1677 } else {
1678 // no data motion is needed
1679 receiver_reg = r->as_Register();
1680 }
1681 }
1683 // Figure out which address we are really jumping to:
1684 MethodHandles::generate_method_handle_dispatch(masm, iid,
1685 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1686 }
1688 #endif // COMPILER2
1690 // ---------------------------------------------------------------------------
1691 // Generate a native wrapper for a given method. The method takes arguments
1692 // in the Java compiled code convention, marshals them to the native
1693 // convention (handlizes oops, etc), transitions to native, makes the call,
1694 // returns to java state (possibly blocking), unhandlizes any result and
1695 // returns.
1696 //
1697 // Critical native functions are a shorthand for the use of
1698 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1699 // functions. The wrapper is expected to unpack the arguments before
1700 // passing them to the callee and perform checks before and after the
1701 // native call to ensure that they GC_locker
1702 // lock_critical/unlock_critical semantics are followed. Some other
1703 // parts of JNI setup are skipped like the tear down of the JNI handle
1704 // block and the check for pending exceptions it's impossible for them
1705 // to be thrown.
1706 //
1707 // They are roughly structured like this:
1708 // if (GC_locker::needs_gc())
1709 // SharedRuntime::block_for_jni_critical();
1710 // tranistion to thread_in_native
1711 // unpack arrray arguments and call native entry point
1712 // check for safepoint in progress
1713 // check if any thread suspend flags are set
1714 // call into JVM and possible unlock the JNI critical
1715 // if a GC was suppressed while in the critical native.
1716 // transition back to thread_in_Java
1717 // return to caller
1718 //
1719 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1720 methodHandle method,
1721 int compile_id,
1722 BasicType *in_sig_bt,
1723 VMRegPair *in_regs,
1724 BasicType ret_type) {
1725 #ifdef COMPILER2
1726 if (method->is_method_handle_intrinsic()) {
1727 vmIntrinsics::ID iid = method->intrinsic_id();
1728 intptr_t start = (intptr_t)__ pc();
1729 int vep_offset = ((intptr_t)__ pc()) - start;
1730 gen_special_dispatch(masm,
1731 method,
1732 in_sig_bt,
1733 in_regs);
1734 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1735 __ flush();
1736 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1737 return nmethod::new_native_nmethod(method,
1738 compile_id,
1739 masm->code(),
1740 vep_offset,
1741 frame_complete,
1742 stack_slots / VMRegImpl::slots_per_word,
1743 in_ByteSize(-1),
1744 in_ByteSize(-1),
1745 (OopMapSet*)NULL);
1746 }
1748 bool is_critical_native = true;
1749 address native_func = method->critical_native_function();
1750 if (native_func == NULL) {
1751 native_func = method->native_function();
1752 is_critical_native = false;
1753 }
1754 assert(native_func != NULL, "must have function");
1756 // First, create signature for outgoing C call
1757 // --------------------------------------------------------------------------
1759 int total_in_args = method->size_of_parameters();
1760 // We have received a description of where all the java args are located
1761 // on entry to the wrapper. We need to convert these args to where
1762 // the jni function will expect them. To figure out where they go
1763 // we convert the java signature to a C signature by inserting
1764 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1765 //
1766 // Additionally, on ppc64 we must convert integers to longs in the C
1767 // signature. We do this in advance in order to have no trouble with
1768 // indexes into the bt-arrays.
1769 // So convert the signature and registers now, and adjust the total number
1770 // of in-arguments accordingly.
1771 int i2l_argcnt = convert_ints_to_longints_argcnt(total_in_args, in_sig_bt); // PPC64: pass ints as longs.
1773 // Calculate the total number of C arguments and create arrays for the
1774 // signature and the outgoing registers.
1775 // On ppc64, we have two arrays for the outgoing registers, because
1776 // some floating-point arguments must be passed in registers _and_
1777 // in stack locations.
1778 bool method_is_static = method->is_static();
1779 int total_c_args = i2l_argcnt;
1781 if (!is_critical_native) {
1782 int n_hidden_args = method_is_static ? 2 : 1;
1783 total_c_args += n_hidden_args;
1784 } else {
1785 // No JNIEnv*, no this*, but unpacked arrays (base+length).
1786 for (int i = 0; i < total_in_args; i++) {
1787 if (in_sig_bt[i] == T_ARRAY) {
1788 total_c_args += 2; // PPC64: T_LONG, T_INT, T_ADDRESS (see convert_ints_to_longints and c_calling_convention)
1789 }
1790 }
1791 }
1793 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1794 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1795 VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1796 BasicType* in_elem_bt = NULL;
1798 // Create the signature for the C call:
1799 // 1) add the JNIEnv*
1800 // 2) add the class if the method is static
1801 // 3) copy the rest of the incoming signature (shifted by the number of
1802 // hidden arguments).
1804 int argc = 0;
1805 if (!is_critical_native) {
1806 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs.
1808 out_sig_bt[argc++] = T_ADDRESS;
1809 if (method->is_static()) {
1810 out_sig_bt[argc++] = T_OBJECT;
1811 }
1813 for (int i = 0; i < total_in_args ; i++ ) {
1814 out_sig_bt[argc++] = in_sig_bt[i];
1815 }
1816 } else {
1817 Thread* THREAD = Thread::current();
1818 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, i2l_argcnt);
1819 SignatureStream ss(method->signature());
1820 int o = 0;
1821 for (int i = 0; i < total_in_args ; i++, o++) {
1822 if (in_sig_bt[i] == T_ARRAY) {
1823 // Arrays are passed as int, elem* pair
1824 Symbol* atype = ss.as_symbol(CHECK_NULL);
1825 const char* at = atype->as_C_string();
1826 if (strlen(at) == 2) {
1827 assert(at[0] == '[', "must be");
1828 switch (at[1]) {
1829 case 'B': in_elem_bt[o] = T_BYTE; break;
1830 case 'C': in_elem_bt[o] = T_CHAR; break;
1831 case 'D': in_elem_bt[o] = T_DOUBLE; break;
1832 case 'F': in_elem_bt[o] = T_FLOAT; break;
1833 case 'I': in_elem_bt[o] = T_INT; break;
1834 case 'J': in_elem_bt[o] = T_LONG; break;
1835 case 'S': in_elem_bt[o] = T_SHORT; break;
1836 case 'Z': in_elem_bt[o] = T_BOOLEAN; break;
1837 default: ShouldNotReachHere();
1838 }
1839 }
1840 } else {
1841 in_elem_bt[o] = T_VOID;
1842 switch(in_sig_bt[i]) { // PPC64: pass ints as longs.
1843 case T_BOOLEAN:
1844 case T_CHAR:
1845 case T_BYTE:
1846 case T_SHORT:
1847 case T_INT: in_elem_bt[++o] = T_VOID; break;
1848 default: break;
1849 }
1850 }
1851 if (in_sig_bt[i] != T_VOID) {
1852 assert(in_sig_bt[i] == ss.type(), "must match");
1853 ss.next();
1854 }
1855 }
1856 assert(i2l_argcnt==o, "must match");
1858 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs.
1860 for (int i = 0; i < total_in_args ; i++ ) {
1861 if (in_sig_bt[i] == T_ARRAY) {
1862 // Arrays are passed as int, elem* pair.
1863 out_sig_bt[argc++] = T_LONG; // PPC64: pass ints as longs.
1864 out_sig_bt[argc++] = T_INT;
1865 out_sig_bt[argc++] = T_ADDRESS;
1866 } else {
1867 out_sig_bt[argc++] = in_sig_bt[i];
1868 }
1869 }
1870 }
1873 // Compute the wrapper's frame size.
1874 // --------------------------------------------------------------------------
1876 // Now figure out where the args must be stored and how much stack space
1877 // they require.
1878 //
1879 // Compute framesize for the wrapper. We need to handlize all oops in
1880 // incoming registers.
1881 //
1882 // Calculate the total number of stack slots we will need:
1883 // 1) abi requirements
1884 // 2) outgoing arguments
1885 // 3) space for inbound oop handle area
1886 // 4) space for handlizing a klass if static method
1887 // 5) space for a lock if synchronized method
1888 // 6) workspace for saving return values, int <-> float reg moves, etc.
1889 // 7) alignment
1890 //
1891 // Layout of the native wrapper frame:
1892 // (stack grows upwards, memory grows downwards)
1893 //
1894 // NW [ABI_REG_ARGS] <-- 1) R1_SP
1895 // [outgoing arguments] <-- 2) R1_SP + out_arg_slot_offset
1896 // [oopHandle area] <-- 3) R1_SP + oop_handle_offset (save area for critical natives)
1897 // klass <-- 4) R1_SP + klass_offset
1898 // lock <-- 5) R1_SP + lock_offset
1899 // [workspace] <-- 6) R1_SP + workspace_offset
1900 // [alignment] (optional) <-- 7)
1901 // caller [JIT_TOP_ABI_48] <-- r_callers_sp
1902 //
1903 // - *_slot_offset Indicates offset from SP in number of stack slots.
1904 // - *_offset Indicates offset from SP in bytes.
1906 int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) // 1+2)
1907 + SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention.
1909 // Now the space for the inbound oop handle area.
1910 int total_save_slots = num_java_iarg_registers * VMRegImpl::slots_per_word;
1911 if (is_critical_native) {
1912 // Critical natives may have to call out so they need a save area
1913 // for register arguments.
1914 int double_slots = 0;
1915 int single_slots = 0;
1916 for (int i = 0; i < total_in_args; i++) {
1917 if (in_regs[i].first()->is_Register()) {
1918 const Register reg = in_regs[i].first()->as_Register();
1919 switch (in_sig_bt[i]) {
1920 case T_BOOLEAN:
1921 case T_BYTE:
1922 case T_SHORT:
1923 case T_CHAR:
1924 case T_INT: /*single_slots++;*/ break; // PPC64: pass ints as longs.
1925 case T_ARRAY:
1926 case T_LONG: double_slots++; break;
1927 default: ShouldNotReachHere();
1928 }
1929 } else if (in_regs[i].first()->is_FloatRegister()) {
1930 switch (in_sig_bt[i]) {
1931 case T_FLOAT: single_slots++; break;
1932 case T_DOUBLE: double_slots++; break;
1933 default: ShouldNotReachHere();
1934 }
1935 }
1936 }
1937 total_save_slots = double_slots * 2 + round_to(single_slots, 2); // round to even
1938 }
1940 int oop_handle_slot_offset = stack_slots;
1941 stack_slots += total_save_slots; // 3)
1943 int klass_slot_offset = 0;
1944 int klass_offset = -1;
1945 if (method_is_static && !is_critical_native) { // 4)
1946 klass_slot_offset = stack_slots;
1947 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1948 stack_slots += VMRegImpl::slots_per_word;
1949 }
1951 int lock_slot_offset = 0;
1952 int lock_offset = -1;
1953 if (method->is_synchronized()) { // 5)
1954 lock_slot_offset = stack_slots;
1955 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size;
1956 stack_slots += VMRegImpl::slots_per_word;
1957 }
1959 int workspace_slot_offset = stack_slots; // 6)
1960 stack_slots += 2;
1962 // Now compute actual number of stack words we need.
1963 // Rounding to make stack properly aligned.
1964 stack_slots = round_to(stack_slots, // 7)
1965 frame::alignment_in_bytes / VMRegImpl::stack_slot_size);
1966 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size;
1969 // Now we can start generating code.
1970 // --------------------------------------------------------------------------
1972 intptr_t start_pc = (intptr_t)__ pc();
1973 intptr_t vep_start_pc;
1974 intptr_t frame_done_pc;
1975 intptr_t oopmap_pc;
1977 Label ic_miss;
1978 Label handle_pending_exception;
1980 Register r_callers_sp = R21;
1981 Register r_temp_1 = R22;
1982 Register r_temp_2 = R23;
1983 Register r_temp_3 = R24;
1984 Register r_temp_4 = R25;
1985 Register r_temp_5 = R26;
1986 Register r_temp_6 = R27;
1987 Register r_return_pc = R28;
1989 Register r_carg1_jnienv = noreg;
1990 Register r_carg2_classorobject = noreg;
1991 if (!is_critical_native) {
1992 r_carg1_jnienv = out_regs[0].first()->as_Register();
1993 r_carg2_classorobject = out_regs[1].first()->as_Register();
1994 }
1997 // Generate the Unverified Entry Point (UEP).
1998 // --------------------------------------------------------------------------
1999 assert(start_pc == (intptr_t)__ pc(), "uep must be at start");
2001 // Check ic: object class == cached class?
2002 if (!method_is_static) {
2003 Register ic = as_Register(Matcher::inline_cache_reg_encode());
2004 Register receiver_klass = r_temp_1;
2006 __ cmpdi(CCR0, R3_ARG1, 0);
2007 __ beq(CCR0, ic_miss);
2008 __ verify_oop(R3_ARG1);
2009 __ load_klass(receiver_klass, R3_ARG1);
2011 __ cmpd(CCR0, receiver_klass, ic);
2012 __ bne(CCR0, ic_miss);
2013 }
2016 // Generate the Verified Entry Point (VEP).
2017 // --------------------------------------------------------------------------
2018 vep_start_pc = (intptr_t)__ pc();
2020 __ save_LR_CR(r_temp_1);
2021 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame.
2022 __ mr(r_callers_sp, R1_SP); // Remember frame pointer.
2023 __ push_frame(frame_size_in_bytes, r_temp_1); // Push the c2n adapter's frame.
2024 frame_done_pc = (intptr_t)__ pc();
2026 // Native nmethod wrappers never take possesion of the oop arguments.
2027 // So the caller will gc the arguments.
2028 // The only thing we need an oopMap for is if the call is static.
2029 //
2030 // An OopMap for lock (and class if static), and one for the VM call itself.
2031 OopMapSet *oop_maps = new OopMapSet();
2032 OopMap *oop_map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2034 if (is_critical_native) {
2035 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, oop_handle_slot_offset, oop_maps, in_regs, in_sig_bt, r_temp_1);
2036 }
2038 // Move arguments from register/stack to register/stack.
2039 // --------------------------------------------------------------------------
2040 //
2041 // We immediately shuffle the arguments so that for any vm call we have
2042 // to make from here on out (sync slow path, jvmti, etc.) we will have
2043 // captured the oops from our caller and have a valid oopMap for them.
2044 //
2045 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
2046 // (derived from JavaThread* which is in R16_thread) and, if static,
2047 // the class mirror instead of a receiver. This pretty much guarantees that
2048 // register layout will not match. We ignore these extra arguments during
2049 // the shuffle. The shuffle is described by the two calling convention
2050 // vectors we have in our possession. We simply walk the java vector to
2051 // get the source locations and the c vector to get the destinations.
2053 // Record sp-based slot for receiver on stack for non-static methods.
2054 int receiver_offset = -1;
2056 // We move the arguments backward because the floating point registers
2057 // destination will always be to a register with a greater or equal
2058 // register number or the stack.
2059 // in is the index of the incoming Java arguments
2060 // out is the index of the outgoing C arguments
2062 #ifdef ASSERT
2063 bool reg_destroyed[RegisterImpl::number_of_registers];
2064 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2065 for (int r = 0 ; r < RegisterImpl::number_of_registers ; r++) {
2066 reg_destroyed[r] = false;
2067 }
2068 for (int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++) {
2069 freg_destroyed[f] = false;
2070 }
2071 #endif // ASSERT
2073 for (int in = total_in_args - 1, out = total_c_args - 1; in >= 0 ; in--, out--) {
2075 #ifdef ASSERT
2076 if (in_regs[in].first()->is_Register()) {
2077 assert(!reg_destroyed[in_regs[in].first()->as_Register()->encoding()], "ack!");
2078 } else if (in_regs[in].first()->is_FloatRegister()) {
2079 assert(!freg_destroyed[in_regs[in].first()->as_FloatRegister()->encoding()], "ack!");
2080 }
2081 if (out_regs[out].first()->is_Register()) {
2082 reg_destroyed[out_regs[out].first()->as_Register()->encoding()] = true;
2083 } else if (out_regs[out].first()->is_FloatRegister()) {
2084 freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true;
2085 }
2086 if (out_regs2[out].first()->is_Register()) {
2087 reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true;
2088 } else if (out_regs2[out].first()->is_FloatRegister()) {
2089 freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true;
2090 }
2091 #endif // ASSERT
2093 switch (in_sig_bt[in]) {
2094 case T_BOOLEAN:
2095 case T_CHAR:
2096 case T_BYTE:
2097 case T_SHORT:
2098 case T_INT:
2099 guarantee(in > 0 && in_sig_bt[in-1] == T_LONG,
2100 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
2101 break;
2102 case T_LONG:
2103 if (in_sig_bt[in+1] == T_VOID) {
2104 long_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2105 } else {
2106 guarantee(in_sig_bt[in+1] == T_BOOLEAN || in_sig_bt[in+1] == T_CHAR ||
2107 in_sig_bt[in+1] == T_BYTE || in_sig_bt[in+1] == T_SHORT ||
2108 in_sig_bt[in+1] == T_INT,
2109 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
2110 int_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2111 }
2112 break;
2113 case T_ARRAY:
2114 if (is_critical_native) {
2115 int body_arg = out;
2116 out -= 2; // Point to length arg. PPC64: pass ints as longs.
2117 unpack_array_argument(masm, in_regs[in], in_elem_bt[in], out_regs[body_arg], out_regs[out],
2118 r_callers_sp, r_temp_1, r_temp_2);
2119 break;
2120 }
2121 case T_OBJECT:
2122 assert(!is_critical_native, "no oop arguments");
2123 object_move(masm, stack_slots,
2124 oop_map, oop_handle_slot_offset,
2125 ((in == 0) && (!method_is_static)), &receiver_offset,
2126 in_regs[in], out_regs[out],
2127 r_callers_sp, r_temp_1, r_temp_2);
2128 break;
2129 case T_VOID:
2130 break;
2131 case T_FLOAT:
2132 float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2133 if (out_regs2[out].first()->is_valid()) {
2134 float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2135 }
2136 break;
2137 case T_DOUBLE:
2138 double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2139 if (out_regs2[out].first()->is_valid()) {
2140 double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2141 }
2142 break;
2143 case T_ADDRESS:
2144 fatal("found type (T_ADDRESS) in java args");
2145 break;
2146 default:
2147 ShouldNotReachHere();
2148 break;
2149 }
2150 }
2152 // Pre-load a static method's oop into ARG2.
2153 // Used both by locking code and the normal JNI call code.
2154 if (method_is_static && !is_critical_native) {
2155 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()),
2156 r_carg2_classorobject);
2158 // Now handlize the static class mirror in carg2. It's known not-null.
2159 __ std(r_carg2_classorobject, klass_offset, R1_SP);
2160 oop_map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2161 __ addi(r_carg2_classorobject, R1_SP, klass_offset);
2162 }
2164 // Get JNIEnv* which is first argument to native.
2165 if (!is_critical_native) {
2166 __ addi(r_carg1_jnienv, R16_thread, in_bytes(JavaThread::jni_environment_offset()));
2167 }
2169 // NOTE:
2170 //
2171 // We have all of the arguments setup at this point.
2172 // We MUST NOT touch any outgoing regs from this point on.
2173 // So if we must call out we must push a new frame.
2175 // Get current pc for oopmap, and load it patchable relative to global toc.
2176 oopmap_pc = (intptr_t) __ pc();
2177 __ calculate_address_from_global_toc(r_return_pc, (address)oopmap_pc, true, true, true, true);
2179 // We use the same pc/oopMap repeatedly when we call out.
2180 oop_maps->add_gc_map(oopmap_pc - start_pc, oop_map);
2182 // r_return_pc now has the pc loaded that we will use when we finally call
2183 // to native.
2185 // Make sure that thread is non-volatile; it crosses a bunch of VM calls below.
2186 assert(R16_thread->is_nonvolatile(), "thread must be in non-volatile register");
2189 # if 0
2190 // DTrace method entry
2191 # endif
2193 // Lock a synchronized method.
2194 // --------------------------------------------------------------------------
2196 if (method->is_synchronized()) {
2197 assert(!is_critical_native, "unhandled");
2198 ConditionRegister r_flag = CCR1;
2199 Register r_oop = r_temp_4;
2200 const Register r_box = r_temp_5;
2201 Label done, locked;
2203 // Load the oop for the object or class. r_carg2_classorobject contains
2204 // either the handlized oop from the incoming arguments or the handlized
2205 // class mirror (if the method is static).
2206 __ ld(r_oop, 0, r_carg2_classorobject);
2208 // Get the lock box slot's address.
2209 __ addi(r_box, R1_SP, lock_offset);
2211 # ifdef ASSERT
2212 if (UseBiasedLocking) {
2213 // Making the box point to itself will make it clear it went unused
2214 // but also be obviously invalid.
2215 __ std(r_box, 0, r_box);
2216 }
2217 # endif // ASSERT
2219 // Try fastpath for locking.
2220 // fast_lock kills r_temp_1, r_temp_2, r_temp_3.
2221 __ compiler_fast_lock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2222 __ beq(r_flag, locked);
2224 // None of the above fast optimizations worked so we have to get into the
2225 // slow case of monitor enter. Inline a special case of call_VM that
2226 // disallows any pending_exception.
2228 // Save argument registers and leave room for C-compatible ABI_REG_ARGS.
2229 int frame_size = frame::abi_reg_args_size +
2230 round_to(total_c_args * wordSize, frame::alignment_in_bytes);
2231 __ mr(R11_scratch1, R1_SP);
2232 RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2);
2234 // Do the call.
2235 __ set_last_Java_frame(R11_scratch1, r_return_pc);
2236 assert(r_return_pc->is_nonvolatile(), "expecting return pc to be in non-volatile register");
2237 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread);
2238 __ reset_last_Java_frame();
2240 RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2);
2242 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2243 "no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C", 0);
2245 __ bind(locked);
2246 }
2249 // Publish thread state
2250 // --------------------------------------------------------------------------
2252 // Use that pc we placed in r_return_pc a while back as the current frame anchor.
2253 __ set_last_Java_frame(R1_SP, r_return_pc);
2255 // Transition from _thread_in_Java to _thread_in_native.
2256 __ li(R0, _thread_in_native);
2257 __ release();
2258 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2259 __ stw(R0, thread_(thread_state));
2260 if (UseMembar) {
2261 __ fence();
2262 }
2265 // The JNI call
2266 // --------------------------------------------------------------------------
2267 #if defined(ABI_ELFv2)
2268 __ call_c(native_func, relocInfo::runtime_call_type);
2269 #else
2270 FunctionDescriptor* fd_native_method = (FunctionDescriptor*) native_func;
2271 __ call_c(fd_native_method, relocInfo::runtime_call_type);
2272 #endif
2275 // Now, we are back from the native code.
2278 // Unpack the native result.
2279 // --------------------------------------------------------------------------
2281 // For int-types, we do any needed sign-extension required.
2282 // Care must be taken that the return values (R3_RET and F1_RET)
2283 // will survive any VM calls for blocking or unlocking.
2284 // An OOP result (handle) is done specially in the slow-path code.
2286 switch (ret_type) {
2287 case T_VOID: break; // Nothing to do!
2288 case T_FLOAT: break; // Got it where we want it (unless slow-path).
2289 case T_DOUBLE: break; // Got it where we want it (unless slow-path).
2290 case T_LONG: break; // Got it where we want it (unless slow-path).
2291 case T_OBJECT: break; // Really a handle.
2292 // Cannot de-handlize until after reclaiming jvm_lock.
2293 case T_ARRAY: break;
2295 case T_BOOLEAN: { // 0 -> false(0); !0 -> true(1)
2296 Label skip_modify;
2297 __ cmpwi(CCR0, R3_RET, 0);
2298 __ beq(CCR0, skip_modify);
2299 __ li(R3_RET, 1);
2300 __ bind(skip_modify);
2301 break;
2302 }
2303 case T_BYTE: { // sign extension
2304 __ extsb(R3_RET, R3_RET);
2305 break;
2306 }
2307 case T_CHAR: { // unsigned result
2308 __ andi(R3_RET, R3_RET, 0xffff);
2309 break;
2310 }
2311 case T_SHORT: { // sign extension
2312 __ extsh(R3_RET, R3_RET);
2313 break;
2314 }
2315 case T_INT: // nothing to do
2316 break;
2317 default:
2318 ShouldNotReachHere();
2319 break;
2320 }
2323 // Publish thread state
2324 // --------------------------------------------------------------------------
2326 // Switch thread to "native transition" state before reading the
2327 // synchronization state. This additional state is necessary because reading
2328 // and testing the synchronization state is not atomic w.r.t. GC, as this
2329 // scenario demonstrates:
2330 // - Java thread A, in _thread_in_native state, loads _not_synchronized
2331 // and is preempted.
2332 // - VM thread changes sync state to synchronizing and suspends threads
2333 // for GC.
2334 // - Thread A is resumed to finish this native method, but doesn't block
2335 // here since it didn't see any synchronization in progress, and escapes.
2337 // Transition from _thread_in_native to _thread_in_native_trans.
2338 __ li(R0, _thread_in_native_trans);
2339 __ release();
2340 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2341 __ stw(R0, thread_(thread_state));
2344 // Must we block?
2345 // --------------------------------------------------------------------------
2347 // Block, if necessary, before resuming in _thread_in_Java state.
2348 // In order for GC to work, don't clear the last_Java_sp until after blocking.
2349 Label after_transition;
2350 {
2351 Label no_block, sync;
2353 if (os::is_MP()) {
2354 if (UseMembar) {
2355 // Force this write out before the read below.
2356 __ fence();
2357 } else {
2358 // Write serialization page so VM thread can do a pseudo remote membar.
2359 // We use the current thread pointer to calculate a thread specific
2360 // offset to write to within the page. This minimizes bus traffic
2361 // due to cache line collision.
2362 __ serialize_memory(R16_thread, r_temp_4, r_temp_5);
2363 }
2364 }
2366 Register sync_state_addr = r_temp_4;
2367 Register sync_state = r_temp_5;
2368 Register suspend_flags = r_temp_6;
2370 __ load_const(sync_state_addr, SafepointSynchronize::address_of_state(), /*temp*/ sync_state);
2372 // TODO: PPC port assert(4 == SafepointSynchronize::sz_state(), "unexpected field size");
2373 __ lwz(sync_state, 0, sync_state_addr);
2375 // TODO: PPC port assert(4 == Thread::sz_suspend_flags(), "unexpected field size");
2376 __ lwz(suspend_flags, thread_(suspend_flags));
2378 __ acquire();
2380 Label do_safepoint;
2381 // No synchronization in progress nor yet synchronized.
2382 __ cmpwi(CCR0, sync_state, SafepointSynchronize::_not_synchronized);
2383 // Not suspended.
2384 __ cmpwi(CCR1, suspend_flags, 0);
2386 __ bne(CCR0, sync);
2387 __ beq(CCR1, no_block);
2389 // Block. Save any potential method result value before the operation and
2390 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this
2391 // lets us share the oopMap we used when we went native rather than create
2392 // a distinct one for this pc.
2393 __ bind(sync);
2395 address entry_point = is_critical_native
2396 ? CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)
2397 : CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans);
2398 save_native_result(masm, ret_type, workspace_slot_offset);
2399 __ call_VM_leaf(entry_point, R16_thread);
2400 restore_native_result(masm, ret_type, workspace_slot_offset);
2402 if (is_critical_native) {
2403 __ b(after_transition); // No thread state transition here.
2404 }
2405 __ bind(no_block);
2406 }
2408 // Publish thread state.
2409 // --------------------------------------------------------------------------
2411 // Thread state is thread_in_native_trans. Any safepoint blocking has
2412 // already happened so we can now change state to _thread_in_Java.
2414 // Transition from _thread_in_native_trans to _thread_in_Java.
2415 __ li(R0, _thread_in_Java);
2416 __ release();
2417 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2418 __ stw(R0, thread_(thread_state));
2419 if (UseMembar) {
2420 __ fence();
2421 }
2422 __ bind(after_transition);
2424 // Reguard any pages if necessary.
2425 // --------------------------------------------------------------------------
2427 Label no_reguard;
2428 __ lwz(r_temp_1, thread_(stack_guard_state));
2429 __ cmpwi(CCR0, r_temp_1, JavaThread::stack_guard_yellow_disabled);
2430 __ bne(CCR0, no_reguard);
2432 save_native_result(masm, ret_type, workspace_slot_offset);
2433 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2434 restore_native_result(masm, ret_type, workspace_slot_offset);
2436 __ bind(no_reguard);
2439 // Unlock
2440 // --------------------------------------------------------------------------
2442 if (method->is_synchronized()) {
2444 ConditionRegister r_flag = CCR1;
2445 const Register r_oop = r_temp_4;
2446 const Register r_box = r_temp_5;
2447 const Register r_exception = r_temp_6;
2448 Label done;
2450 // Get oop and address of lock object box.
2451 if (method_is_static) {
2452 assert(klass_offset != -1, "");
2453 __ ld(r_oop, klass_offset, R1_SP);
2454 } else {
2455 assert(receiver_offset != -1, "");
2456 __ ld(r_oop, receiver_offset, R1_SP);
2457 }
2458 __ addi(r_box, R1_SP, lock_offset);
2460 // Try fastpath for unlocking.
2461 __ compiler_fast_unlock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2462 __ beq(r_flag, done);
2464 // Save and restore any potential method result value around the unlocking operation.
2465 save_native_result(masm, ret_type, workspace_slot_offset);
2467 // Must save pending exception around the slow-path VM call. Since it's a
2468 // leaf call, the pending exception (if any) can be kept in a register.
2469 __ ld(r_exception, thread_(pending_exception));
2470 assert(r_exception->is_nonvolatile(), "exception register must be non-volatile");
2471 __ li(R0, 0);
2472 __ std(R0, thread_(pending_exception));
2474 // Slow case of monitor enter.
2475 // Inline a special case of call_VM that disallows any pending_exception.
2476 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), r_oop, r_box);
2478 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2479 "no pending exception allowed on exit from SharedRuntime::complete_monitor_unlocking_C", 0);
2481 restore_native_result(masm, ret_type, workspace_slot_offset);
2483 // Check_forward_pending_exception jump to forward_exception if any pending
2484 // exception is set. The forward_exception routine expects to see the
2485 // exception in pending_exception and not in a register. Kind of clumsy,
2486 // since all folks who branch to forward_exception must have tested
2487 // pending_exception first and hence have it in a register already.
2488 __ std(r_exception, thread_(pending_exception));
2490 __ bind(done);
2491 }
2493 # if 0
2494 // DTrace method exit
2495 # endif
2497 // Clear "last Java frame" SP and PC.
2498 // --------------------------------------------------------------------------
2500 __ reset_last_Java_frame();
2502 // Unpack oop result.
2503 // --------------------------------------------------------------------------
2505 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2506 Label skip_unboxing;
2507 __ cmpdi(CCR0, R3_RET, 0);
2508 __ beq(CCR0, skip_unboxing);
2509 __ ld(R3_RET, 0, R3_RET);
2510 __ bind(skip_unboxing);
2511 __ verify_oop(R3_RET);
2512 }
2515 // Reset handle block.
2516 // --------------------------------------------------------------------------
2517 if (!is_critical_native) {
2518 __ ld(r_temp_1, thread_(active_handles));
2519 // TODO: PPC port assert(4 == JNIHandleBlock::top_size_in_bytes(), "unexpected field size");
2520 __ li(r_temp_2, 0);
2521 __ stw(r_temp_2, JNIHandleBlock::top_offset_in_bytes(), r_temp_1);
2524 // Check for pending exceptions.
2525 // --------------------------------------------------------------------------
2526 __ ld(r_temp_2, thread_(pending_exception));
2527 __ cmpdi(CCR0, r_temp_2, 0);
2528 __ bne(CCR0, handle_pending_exception);
2529 }
2531 // Return
2532 // --------------------------------------------------------------------------
2534 __ pop_frame();
2535 __ restore_LR_CR(R11);
2536 __ blr();
2539 // Handler for pending exceptions (out-of-line).
2540 // --------------------------------------------------------------------------
2542 // Since this is a native call, we know the proper exception handler
2543 // is the empty function. We just pop this frame and then jump to
2544 // forward_exception_entry.
2545 if (!is_critical_native) {
2546 __ align(InteriorEntryAlignment);
2547 __ bind(handle_pending_exception);
2549 __ pop_frame();
2550 __ restore_LR_CR(R11);
2551 __ b64_patchable((address)StubRoutines::forward_exception_entry(),
2552 relocInfo::runtime_call_type);
2553 }
2555 // Handler for a cache miss (out-of-line).
2556 // --------------------------------------------------------------------------
2558 if (!method_is_static) {
2559 __ align(InteriorEntryAlignment);
2560 __ bind(ic_miss);
2562 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
2563 relocInfo::runtime_call_type);
2564 }
2566 // Done.
2567 // --------------------------------------------------------------------------
2569 __ flush();
2571 nmethod *nm = nmethod::new_native_nmethod(method,
2572 compile_id,
2573 masm->code(),
2574 vep_start_pc-start_pc,
2575 frame_done_pc-start_pc,
2576 stack_slots / VMRegImpl::slots_per_word,
2577 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2578 in_ByteSize(lock_offset),
2579 oop_maps);
2581 if (is_critical_native) {
2582 nm->set_lazy_critical_native(true);
2583 }
2585 return nm;
2586 #else
2587 ShouldNotReachHere();
2588 return NULL;
2589 #endif // COMPILER2
2590 }
2592 // This function returns the adjust size (in number of words) to a c2i adapter
2593 // activation for use during deoptimization.
2594 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2595 return round_to((callee_locals - callee_parameters) * Interpreter::stackElementWords, frame::alignment_in_bytes);
2596 }
2598 uint SharedRuntime::out_preserve_stack_slots() {
2599 #ifdef COMPILER2
2600 return frame::jit_out_preserve_size / VMRegImpl::stack_slot_size;
2601 #else
2602 return 0;
2603 #endif
2604 }
2606 #ifdef COMPILER2
2607 // Frame generation for deopt and uncommon trap blobs.
2608 static void push_skeleton_frame(MacroAssembler* masm, bool deopt,
2609 /* Read */
2610 Register unroll_block_reg,
2611 /* Update */
2612 Register frame_sizes_reg,
2613 Register number_of_frames_reg,
2614 Register pcs_reg,
2615 /* Invalidate */
2616 Register frame_size_reg,
2617 Register pc_reg) {
2619 __ ld(pc_reg, 0, pcs_reg);
2620 __ ld(frame_size_reg, 0, frame_sizes_reg);
2621 __ std(pc_reg, _abi(lr), R1_SP);
2622 __ push_frame(frame_size_reg, R0/*tmp*/);
2623 #ifdef CC_INTERP
2624 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2625 #else
2626 #ifdef ASSERT
2627 __ load_const_optimized(pc_reg, 0x5afe);
2628 __ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
2629 #endif
2630 __ std(R1_SP, _ijava_state_neg(sender_sp), R1_SP);
2631 #endif // CC_INTERP
2632 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
2633 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
2634 __ addi(pcs_reg, pcs_reg, wordSize);
2635 }
2637 // Loop through the UnrollBlock info and create new frames.
2638 static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
2639 /* read */
2640 Register unroll_block_reg,
2641 /* invalidate */
2642 Register frame_sizes_reg,
2643 Register number_of_frames_reg,
2644 Register pcs_reg,
2645 Register frame_size_reg,
2646 Register pc_reg) {
2647 Label loop;
2649 // _number_of_frames is of type int (deoptimization.hpp)
2650 __ lwa(number_of_frames_reg,
2651 Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(),
2652 unroll_block_reg);
2653 __ ld(pcs_reg,
2654 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(),
2655 unroll_block_reg);
2656 __ ld(frame_sizes_reg,
2657 Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(),
2658 unroll_block_reg);
2660 // stack: (caller_of_deoptee, ...).
2662 // At this point we either have an interpreter frame or a compiled
2663 // frame on top of stack. If it is a compiled frame we push a new c2i
2664 // adapter here
2666 // Memorize top-frame stack-pointer.
2667 __ mr(frame_size_reg/*old_sp*/, R1_SP);
2669 // Resize interpreter top frame OR C2I adapter.
2671 // At this moment, the top frame (which is the caller of the deoptee) is
2672 // an interpreter frame or a newly pushed C2I adapter or an entry frame.
2673 // The top frame has a TOP_IJAVA_FRAME_ABI and the frame contains the
2674 // outgoing arguments.
2675 //
2676 // In order to push the interpreter frame for the deoptee, we need to
2677 // resize the top frame such that we are able to place the deoptee's
2678 // locals in the frame.
2679 // Additionally, we have to turn the top frame's TOP_IJAVA_FRAME_ABI
2680 // into a valid PARENT_IJAVA_FRAME_ABI.
2682 __ lwa(R11_scratch1,
2683 Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(),
2684 unroll_block_reg);
2685 __ neg(R11_scratch1, R11_scratch1);
2687 // R11_scratch1 contains size of locals for frame resizing.
2688 // R12_scratch2 contains top frame's lr.
2690 // Resize frame by complete frame size prevents TOC from being
2691 // overwritten by locals. A more stack space saving way would be
2692 // to copy the TOC to its location in the new abi.
2693 __ addi(R11_scratch1, R11_scratch1, - frame::parent_ijava_frame_abi_size);
2695 // now, resize the frame
2696 __ resize_frame(R11_scratch1, pc_reg/*tmp*/);
2698 // In the case where we have resized a c2i frame above, the optional
2699 // alignment below the locals has size 32 (why?).
2700 __ std(R12_scratch2, _abi(lr), R1_SP);
2702 // Initialize initial_caller_sp.
2703 #ifdef CC_INTERP
2704 __ std(frame_size_reg/*old_sp*/, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2705 #else
2706 #ifdef ASSERT
2707 __ load_const_optimized(pc_reg, 0x5afe);
2708 __ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
2709 #endif
2710 __ std(frame_size_reg, _ijava_state_neg(sender_sp), R1_SP);
2711 #endif // CC_INTERP
2713 #ifdef ASSERT
2714 // Make sure that there is at least one entry in the array.
2715 __ cmpdi(CCR0, number_of_frames_reg, 0);
2716 __ asm_assert_ne("array_size must be > 0", 0x205);
2717 #endif
2719 // Now push the new interpreter frames.
2720 //
2721 __ bind(loop);
2722 // Allocate a new frame, fill in the pc.
2723 push_skeleton_frame(masm, deopt,
2724 unroll_block_reg,
2725 frame_sizes_reg,
2726 number_of_frames_reg,
2727 pcs_reg,
2728 frame_size_reg,
2729 pc_reg);
2730 __ cmpdi(CCR0, number_of_frames_reg, 0);
2731 __ bne(CCR0, loop);
2733 // Get the return address pointing into the frame manager.
2734 __ ld(R0, 0, pcs_reg);
2735 // Store it in the top interpreter frame.
2736 __ std(R0, _abi(lr), R1_SP);
2737 // Initialize frame_manager_lr of interpreter top frame.
2738 #ifdef CC_INTERP
2739 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP);
2740 #endif
2741 }
2742 #endif
2744 void SharedRuntime::generate_deopt_blob() {
2745 // Allocate space for the code
2746 ResourceMark rm;
2747 // Setup code generation tools
2748 CodeBuffer buffer("deopt_blob", 2048, 1024);
2749 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2750 Label exec_mode_initialized;
2751 int frame_size_in_words;
2752 OopMap* map = NULL;
2753 OopMapSet *oop_maps = new OopMapSet();
2755 // size of ABI112 plus spill slots for R3_RET and F1_RET.
2756 const int frame_size_in_bytes = frame::abi_reg_args_spill_size;
2757 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
2758 int first_frame_size_in_bytes = 0; // frame size of "unpack frame" for call to fetch_unroll_info.
2760 const Register exec_mode_reg = R21_tmp1;
2762 const address start = __ pc();
2764 #ifdef COMPILER2
2765 // --------------------------------------------------------------------------
2766 // Prolog for non exception case!
2768 // We have been called from the deopt handler of the deoptee.
2769 //
2770 // deoptee:
2771 // ...
2772 // call X
2773 // ...
2774 // deopt_handler: call_deopt_stub
2775 // cur. return pc --> ...
2776 //
2777 // So currently SR_LR points behind the call in the deopt handler.
2778 // We adjust it such that it points to the start of the deopt handler.
2779 // The return_pc has been stored in the frame of the deoptee and
2780 // will replace the address of the deopt_handler in the call
2781 // to Deoptimization::fetch_unroll_info below.
2782 // We can't grab a free register here, because all registers may
2783 // contain live values, so let the RegisterSaver do the adjustment
2784 // of the return pc.
2785 const int return_pc_adjustment_no_exception = -size_deopt_handler();
2787 // Push the "unpack frame"
2788 // Save everything in sight.
2789 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2790 &first_frame_size_in_bytes,
2791 /*generate_oop_map=*/ true,
2792 return_pc_adjustment_no_exception,
2793 RegisterSaver::return_pc_is_lr);
2794 assert(map != NULL, "OopMap must have been created");
2796 __ li(exec_mode_reg, Deoptimization::Unpack_deopt);
2797 // Save exec mode for unpack_frames.
2798 __ b(exec_mode_initialized);
2800 // --------------------------------------------------------------------------
2801 // Prolog for exception case
2803 // An exception is pending.
2804 // We have been called with a return (interpreter) or a jump (exception blob).
2805 //
2806 // - R3_ARG1: exception oop
2807 // - R4_ARG2: exception pc
2809 int exception_offset = __ pc() - start;
2811 BLOCK_COMMENT("Prolog for exception case");
2813 // The RegisterSaves doesn't need to adjust the return pc for this situation.
2814 const int return_pc_adjustment_exception = 0;
2816 // Push the "unpack frame".
2817 // Save everything in sight.
2818 assert(R4 == R4_ARG2, "exception pc must be in r4");
2819 RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2820 &first_frame_size_in_bytes,
2821 /*generate_oop_map=*/ false,
2822 return_pc_adjustment_exception,
2823 RegisterSaver::return_pc_is_r4);
2825 // Deopt during an exception. Save exec mode for unpack_frames.
2826 __ li(exec_mode_reg, Deoptimization::Unpack_exception);
2828 // Store exception oop and pc in thread (location known to GC).
2829 // This is needed since the call to "fetch_unroll_info()" may safepoint.
2830 __ std(R3_ARG1, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2831 __ std(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2833 // fall through
2835 // --------------------------------------------------------------------------
2836 __ BIND(exec_mode_initialized);
2838 {
2839 const Register unroll_block_reg = R22_tmp2;
2841 // We need to set `last_Java_frame' because `fetch_unroll_info' will
2842 // call `last_Java_frame()'. The value of the pc in the frame is not
2843 // particularly important. It just needs to identify this blob.
2844 __ set_last_Java_frame(R1_SP, noreg);
2846 // With EscapeAnalysis turned on, this call may safepoint!
2847 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), R16_thread);
2848 address calls_return_pc = __ last_calls_return_pc();
2849 // Set an oopmap for the call site that describes all our saved registers.
2850 oop_maps->add_gc_map(calls_return_pc - start, map);
2852 __ reset_last_Java_frame();
2853 // Save the return value.
2854 __ mr(unroll_block_reg, R3_RET);
2856 // Restore only the result registers that have been saved
2857 // by save_volatile_registers(...).
2858 RegisterSaver::restore_result_registers(masm, first_frame_size_in_bytes);
2860 // In excp_deopt_mode, restore and clear exception oop which we
2861 // stored in the thread during exception entry above. The exception
2862 // oop will be the return value of this stub.
2863 Label skip_restore_excp;
2864 __ cmpdi(CCR0, exec_mode_reg, Deoptimization::Unpack_exception);
2865 __ bne(CCR0, skip_restore_excp);
2866 __ ld(R3_RET, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2867 __ ld(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2868 __ li(R0, 0);
2869 __ std(R0, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2870 __ std(R0, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2871 __ BIND(skip_restore_excp);
2873 // reload narrro_oop_base
2874 if (UseCompressedOops && Universe::narrow_oop_base() != 0) {
2875 __ load_const_optimized(R30, Universe::narrow_oop_base());
2876 }
2878 __ pop_frame();
2880 // stack: (deoptee, optional i2c, caller of deoptee, ...).
2882 // pop the deoptee's frame
2883 __ pop_frame();
2885 // stack: (caller_of_deoptee, ...).
2887 // Loop through the `UnrollBlock' info and create interpreter frames.
2888 push_skeleton_frames(masm, true/*deopt*/,
2889 unroll_block_reg,
2890 R23_tmp3,
2891 R24_tmp4,
2892 R25_tmp5,
2893 R26_tmp6,
2894 R27_tmp7);
2896 // stack: (skeletal interpreter frame, ..., optional skeletal
2897 // interpreter frame, optional c2i, caller of deoptee, ...).
2898 }
2900 // push an `unpack_frame' taking care of float / int return values.
2901 __ push_frame(frame_size_in_bytes, R0/*tmp*/);
2903 // stack: (unpack frame, skeletal interpreter frame, ..., optional
2904 // skeletal interpreter frame, optional c2i, caller of deoptee,
2905 // ...).
2907 // Spill live volatile registers since we'll do a call.
2908 __ std( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2909 __ stfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2911 // Let the unpacker layout information in the skeletal frames just
2912 // allocated.
2913 __ get_PC_trash_LR(R3_RET);
2914 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R3_RET);
2915 // This is a call to a LEAF method, so no oop map is required.
2916 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
2917 R16_thread/*thread*/, exec_mode_reg/*exec_mode*/);
2918 __ reset_last_Java_frame();
2920 // Restore the volatiles saved above.
2921 __ ld( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2922 __ lfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2924 // Pop the unpack frame.
2925 __ pop_frame();
2926 __ restore_LR_CR(R0);
2928 // stack: (top interpreter frame, ..., optional interpreter frame,
2929 // optional c2i, caller of deoptee, ...).
2931 // Initialize R14_state.
2932 #ifdef CC_INTERP
2933 __ ld(R14_state, 0, R1_SP);
2934 __ addi(R14_state, R14_state, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
2935 // Also inititialize R15_prev_state.
2936 __ restore_prev_state();
2937 #else
2938 __ restore_interpreter_state(R11_scratch1);
2939 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
2940 #endif // CC_INTERP
2943 // Return to the interpreter entry point.
2944 __ blr();
2945 __ flush();
2946 #else // COMPILER2
2947 __ unimplemented("deopt blob needed only with compiler");
2948 int exception_offset = __ pc() - start;
2949 #endif // COMPILER2
2951 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, 0, first_frame_size_in_bytes / wordSize);
2952 }
2954 #ifdef COMPILER2
2955 void SharedRuntime::generate_uncommon_trap_blob() {
2956 // Allocate space for the code.
2957 ResourceMark rm;
2958 // Setup code generation tools.
2959 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2960 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2961 address start = __ pc();
2963 Register unroll_block_reg = R21_tmp1;
2964 Register klass_index_reg = R22_tmp2;
2965 Register unc_trap_reg = R23_tmp3;
2967 OopMapSet* oop_maps = new OopMapSet();
2968 int frame_size_in_bytes = frame::abi_reg_args_size;
2969 OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
2971 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
2973 // Push a dummy `unpack_frame' and call
2974 // `Deoptimization::uncommon_trap' to pack the compiled frame into a
2975 // vframe array and return the `UnrollBlock' information.
2977 // Save LR to compiled frame.
2978 __ save_LR_CR(R11_scratch1);
2980 // Push an "uncommon_trap" frame.
2981 __ push_frame_reg_args(0, R11_scratch1);
2983 // stack: (unpack frame, deoptee, optional i2c, caller_of_deoptee, ...).
2985 // Set the `unpack_frame' as last_Java_frame.
2986 // `Deoptimization::uncommon_trap' expects it and considers its
2987 // sender frame as the deoptee frame.
2988 // Remember the offset of the instruction whose address will be
2989 // moved to R11_scratch1.
2990 address gc_map_pc = __ get_PC_trash_LR(R11_scratch1);
2992 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
2994 __ mr(klass_index_reg, R3);
2995 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap),
2996 R16_thread, klass_index_reg);
2998 // Set an oopmap for the call site.
2999 oop_maps->add_gc_map(gc_map_pc - start, map);
3001 __ reset_last_Java_frame();
3003 // Pop the `unpack frame'.
3004 __ pop_frame();
3006 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
3008 // Save the return value.
3009 __ mr(unroll_block_reg, R3_RET);
3011 // Pop the uncommon_trap frame.
3012 __ pop_frame();
3014 // stack: (caller_of_deoptee, ...).
3016 // Allocate new interpreter frame(s) and possibly a c2i adapter
3017 // frame.
3018 push_skeleton_frames(masm, false/*deopt*/,
3019 unroll_block_reg,
3020 R22_tmp2,
3021 R23_tmp3,
3022 R24_tmp4,
3023 R25_tmp5,
3024 R26_tmp6);
3026 // stack: (skeletal interpreter frame, ..., optional skeletal
3027 // interpreter frame, optional c2i, caller of deoptee, ...).
3029 // Push a dummy `unpack_frame' taking care of float return values.
3030 // Call `Deoptimization::unpack_frames' to layout information in the
3031 // interpreter frames just created.
3033 // Push a simple "unpack frame" here.
3034 __ push_frame_reg_args(0, R11_scratch1);
3036 // stack: (unpack frame, skeletal interpreter frame, ..., optional
3037 // skeletal interpreter frame, optional c2i, caller of deoptee,
3038 // ...).
3040 // Set the "unpack_frame" as last_Java_frame.
3041 __ get_PC_trash_LR(R11_scratch1);
3042 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
3044 // Indicate it is the uncommon trap case.
3045 __ li(unc_trap_reg, Deoptimization::Unpack_uncommon_trap);
3046 // Let the unpacker layout information in the skeletal frames just
3047 // allocated.
3048 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
3049 R16_thread, unc_trap_reg);
3051 __ reset_last_Java_frame();
3052 // Pop the `unpack frame'.
3053 __ pop_frame();
3054 // Restore LR from top interpreter frame.
3055 __ restore_LR_CR(R11_scratch1);
3057 // stack: (top interpreter frame, ..., optional interpreter frame,
3058 // optional c2i, caller of deoptee, ...).
3060 #ifdef CC_INTERP
3061 // Initialize R14_state, ...
3062 __ ld(R11_scratch1, 0, R1_SP);
3063 __ addi(R14_state, R11_scratch1, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
3064 // also initialize R15_prev_state.
3065 __ restore_prev_state();
3066 #else
3067 __ restore_interpreter_state(R11_scratch1);
3068 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
3069 #endif // CC_INTERP
3071 // Return to the interpreter entry point.
3072 __ blr();
3074 masm->flush();
3076 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, frame_size_in_bytes/wordSize);
3077 }
3078 #endif // COMPILER2
3080 // Generate a special Compile2Runtime blob that saves all registers, and setup oopmap.
3081 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3082 assert(StubRoutines::forward_exception_entry() != NULL,
3083 "must be generated before");
3085 ResourceMark rm;
3086 OopMapSet *oop_maps = new OopMapSet();
3087 OopMap* map;
3089 // Allocate space for the code. Setup code generation tools.
3090 CodeBuffer buffer("handler_blob", 2048, 1024);
3091 MacroAssembler* masm = new MacroAssembler(&buffer);
3093 address start = __ pc();
3094 int frame_size_in_bytes = 0;
3096 RegisterSaver::ReturnPCLocation return_pc_location;
3097 bool cause_return = (poll_type == POLL_AT_RETURN);
3098 if (cause_return) {
3099 // Nothing to do here. The frame has already been popped in MachEpilogNode.
3100 // Register LR already contains the return pc.
3101 return_pc_location = RegisterSaver::return_pc_is_lr;
3102 } else {
3103 // Use thread()->saved_exception_pc() as return pc.
3104 return_pc_location = RegisterSaver::return_pc_is_thread_saved_exception_pc;
3105 }
3107 // Save registers, fpu state, and flags.
3108 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3109 &frame_size_in_bytes,
3110 /*generate_oop_map=*/ true,
3111 /*return_pc_adjustment=*/0,
3112 return_pc_location);
3114 // The following is basically a call_VM. However, we need the precise
3115 // address of the call in order to generate an oopmap. Hence, we do all the
3116 // work outselves.
3117 __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg);
3119 // The return address must always be correct so that the frame constructor
3120 // never sees an invalid pc.
3122 // Do the call
3123 __ call_VM_leaf(call_ptr, R16_thread);
3124 address calls_return_pc = __ last_calls_return_pc();
3126 // Set an oopmap for the call site. This oopmap will map all
3127 // oop-registers and debug-info registers as callee-saved. This
3128 // will allow deoptimization at this safepoint to find all possible
3129 // debug-info recordings, as well as let GC find all oops.
3130 oop_maps->add_gc_map(calls_return_pc - start, map);
3132 Label noException;
3134 // Clear the last Java frame.
3135 __ reset_last_Java_frame();
3137 BLOCK_COMMENT(" Check pending exception.");
3138 const Register pending_exception = R0;
3139 __ ld(pending_exception, thread_(pending_exception));
3140 __ cmpdi(CCR0, pending_exception, 0);
3141 __ beq(CCR0, noException);
3143 // Exception pending
3144 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3145 frame_size_in_bytes,
3146 /*restore_ctr=*/true);
3148 BLOCK_COMMENT(" Jump to forward_exception_entry.");
3149 // Jump to forward_exception_entry, with the issuing PC in LR
3150 // so it looks like the original nmethod called forward_exception_entry.
3151 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3153 // No exception case.
3154 __ BIND(noException);
3157 // Normal exit, restore registers and exit.
3158 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3159 frame_size_in_bytes,
3160 /*restore_ctr=*/true);
3162 __ blr();
3164 // Make sure all code is generated
3165 masm->flush();
3167 // Fill-out other meta info
3168 // CodeBlob frame size is in words.
3169 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_bytes / wordSize);
3170 }
3172 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss)
3173 //
3174 // Generate a stub that calls into the vm to find out the proper destination
3175 // of a java call. All the argument registers are live at this point
3176 // but since this is generic code we don't know what they are and the caller
3177 // must do any gc of the args.
3178 //
3179 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3181 // allocate space for the code
3182 ResourceMark rm;
3184 CodeBuffer buffer(name, 1000, 512);
3185 MacroAssembler* masm = new MacroAssembler(&buffer);
3187 int frame_size_in_bytes;
3189 OopMapSet *oop_maps = new OopMapSet();
3190 OopMap* map = NULL;
3192 address start = __ pc();
3194 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3195 &frame_size_in_bytes,
3196 /*generate_oop_map*/ true,
3197 /*return_pc_adjustment*/ 0,
3198 RegisterSaver::return_pc_is_lr);
3200 // Use noreg as last_Java_pc, the return pc will be reconstructed
3201 // from the physical frame.
3202 __ set_last_Java_frame(/*sp*/R1_SP, noreg);
3204 int frame_complete = __ offset();
3206 // Pass R19_method as 2nd (optional) argument, used by
3207 // counter_overflow_stub.
3208 __ call_VM_leaf(destination, R16_thread, R19_method);
3209 address calls_return_pc = __ last_calls_return_pc();
3210 // Set an oopmap for the call site.
3211 // We need this not only for callee-saved registers, but also for volatile
3212 // registers that the compiler might be keeping live across a safepoint.
3213 // Create the oopmap for the call's return pc.
3214 oop_maps->add_gc_map(calls_return_pc - start, map);
3216 // R3_RET contains the address we are going to jump to assuming no exception got installed.
3218 // clear last_Java_sp
3219 __ reset_last_Java_frame();
3221 // Check for pending exceptions.
3222 BLOCK_COMMENT("Check for pending exceptions.");
3223 Label pending;
3224 __ ld(R11_scratch1, thread_(pending_exception));
3225 __ cmpdi(CCR0, R11_scratch1, 0);
3226 __ bne(CCR0, pending);
3228 __ mtctr(R3_RET); // Ctr will not be touched by restore_live_registers_and_pop_frame.
3230 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ false);
3232 // Get the returned method.
3233 __ get_vm_result_2(R19_method);
3235 __ bctr();
3238 // Pending exception after the safepoint.
3239 __ BIND(pending);
3241 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ true);
3243 // exception pending => remove activation and forward to exception handler
3245 __ li(R11_scratch1, 0);
3246 __ ld(R3_ARG1, thread_(pending_exception));
3247 __ std(R11_scratch1, in_bytes(JavaThread::vm_result_offset()), R16_thread);
3248 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3250 // -------------
3251 // Make sure all code is generated.
3252 masm->flush();
3254 // return the blob
3255 // frame_size_words or bytes??
3256 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_bytes/wordSize,
3257 oop_maps, true);
3258 }