Tue, 25 Mar 2014 12:54:21 -0700
8037821: Account for trampoline stubs when estimating code buffer sizes
Summary: Take into account space needed for "trampoline code" used by calls on PPC64.
Reviewed-by: kvn
Contributed-by: lutz.schmidt@sap.com
1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_ppc.inline.hpp"
37 #include "adfiles/ad_ppc_64.hpp"
38 #ifdef COMPILER1
39 #include "c1/c1_Runtime1.hpp"
40 #endif
41 #ifdef COMPILER2
42 #include "opto/runtime.hpp"
43 #endif
45 #define __ masm->
47 #ifdef PRODUCT
48 #define BLOCK_COMMENT(str) // nothing
49 #else
50 #define BLOCK_COMMENT(str) __ block_comment(str)
51 #endif
53 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
56 class RegisterSaver {
57 // Used for saving volatile registers.
58 public:
60 // Support different return pc locations.
61 enum ReturnPCLocation {
62 return_pc_is_lr,
63 return_pc_is_r4,
64 return_pc_is_thread_saved_exception_pc
65 };
67 static OopMap* push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
68 int* out_frame_size_in_bytes,
69 bool generate_oop_map,
70 int return_pc_adjustment,
71 ReturnPCLocation return_pc_location);
72 static void restore_live_registers_and_pop_frame(MacroAssembler* masm,
73 int frame_size_in_bytes,
74 bool restore_ctr);
76 static void push_frame_and_save_argument_registers(MacroAssembler* masm,
77 Register r_temp,
78 int frame_size,
79 int total_args,
80 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
81 static void restore_argument_registers_and_pop_frame(MacroAssembler*masm,
82 int frame_size,
83 int total_args,
84 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
86 // During deoptimization only the result registers need to be restored
87 // all the other values have already been extracted.
88 static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes);
90 // Constants and data structures:
92 typedef enum {
93 int_reg = 0,
94 float_reg = 1,
95 special_reg = 2
96 } RegisterType;
98 typedef enum {
99 reg_size = 8,
100 half_reg_size = reg_size / 2,
101 } RegisterConstants;
103 typedef struct {
104 RegisterType reg_type;
105 int reg_num;
106 VMReg vmreg;
107 } LiveRegType;
108 };
111 #define RegisterSaver_LiveSpecialReg(regname) \
112 { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }
114 #define RegisterSaver_LiveIntReg(regname) \
115 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() }
117 #define RegisterSaver_LiveFloatReg(regname) \
118 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() }
120 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
121 // Live registers which get spilled to the stack. Register
122 // positions in this array correspond directly to the stack layout.
124 //
125 // live special registers:
126 //
127 RegisterSaver_LiveSpecialReg(SR_CTR),
128 //
129 // live float registers:
130 //
131 RegisterSaver_LiveFloatReg( F0 ),
132 RegisterSaver_LiveFloatReg( F1 ),
133 RegisterSaver_LiveFloatReg( F2 ),
134 RegisterSaver_LiveFloatReg( F3 ),
135 RegisterSaver_LiveFloatReg( F4 ),
136 RegisterSaver_LiveFloatReg( F5 ),
137 RegisterSaver_LiveFloatReg( F6 ),
138 RegisterSaver_LiveFloatReg( F7 ),
139 RegisterSaver_LiveFloatReg( F8 ),
140 RegisterSaver_LiveFloatReg( F9 ),
141 RegisterSaver_LiveFloatReg( F10 ),
142 RegisterSaver_LiveFloatReg( F11 ),
143 RegisterSaver_LiveFloatReg( F12 ),
144 RegisterSaver_LiveFloatReg( F13 ),
145 RegisterSaver_LiveFloatReg( F14 ),
146 RegisterSaver_LiveFloatReg( F15 ),
147 RegisterSaver_LiveFloatReg( F16 ),
148 RegisterSaver_LiveFloatReg( F17 ),
149 RegisterSaver_LiveFloatReg( F18 ),
150 RegisterSaver_LiveFloatReg( F19 ),
151 RegisterSaver_LiveFloatReg( F20 ),
152 RegisterSaver_LiveFloatReg( F21 ),
153 RegisterSaver_LiveFloatReg( F22 ),
154 RegisterSaver_LiveFloatReg( F23 ),
155 RegisterSaver_LiveFloatReg( F24 ),
156 RegisterSaver_LiveFloatReg( F25 ),
157 RegisterSaver_LiveFloatReg( F26 ),
158 RegisterSaver_LiveFloatReg( F27 ),
159 RegisterSaver_LiveFloatReg( F28 ),
160 RegisterSaver_LiveFloatReg( F29 ),
161 RegisterSaver_LiveFloatReg( F30 ),
162 RegisterSaver_LiveFloatReg( F31 ),
163 //
164 // live integer registers:
165 //
166 RegisterSaver_LiveIntReg( R0 ),
167 //RegisterSaver_LiveIntReg( R1 ), // stack pointer
168 RegisterSaver_LiveIntReg( R2 ),
169 RegisterSaver_LiveIntReg( R3 ),
170 RegisterSaver_LiveIntReg( R4 ),
171 RegisterSaver_LiveIntReg( R5 ),
172 RegisterSaver_LiveIntReg( R6 ),
173 RegisterSaver_LiveIntReg( R7 ),
174 RegisterSaver_LiveIntReg( R8 ),
175 RegisterSaver_LiveIntReg( R9 ),
176 RegisterSaver_LiveIntReg( R10 ),
177 RegisterSaver_LiveIntReg( R11 ),
178 RegisterSaver_LiveIntReg( R12 ),
179 //RegisterSaver_LiveIntReg( R13 ), // system thread id
180 RegisterSaver_LiveIntReg( R14 ),
181 RegisterSaver_LiveIntReg( R15 ),
182 RegisterSaver_LiveIntReg( R16 ),
183 RegisterSaver_LiveIntReg( R17 ),
184 RegisterSaver_LiveIntReg( R18 ),
185 RegisterSaver_LiveIntReg( R19 ),
186 RegisterSaver_LiveIntReg( R20 ),
187 RegisterSaver_LiveIntReg( R21 ),
188 RegisterSaver_LiveIntReg( R22 ),
189 RegisterSaver_LiveIntReg( R23 ),
190 RegisterSaver_LiveIntReg( R24 ),
191 RegisterSaver_LiveIntReg( R25 ),
192 RegisterSaver_LiveIntReg( R26 ),
193 RegisterSaver_LiveIntReg( R27 ),
194 RegisterSaver_LiveIntReg( R28 ),
195 RegisterSaver_LiveIntReg( R29 ),
196 RegisterSaver_LiveIntReg( R31 ),
197 RegisterSaver_LiveIntReg( R30 ), // r30 must be the last register
198 };
200 OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
201 int* out_frame_size_in_bytes,
202 bool generate_oop_map,
203 int return_pc_adjustment,
204 ReturnPCLocation return_pc_location) {
205 // Push an abi_reg_args-frame and store all registers which may be live.
206 // If requested, create an OopMap: Record volatile registers as
207 // callee-save values in an OopMap so their save locations will be
208 // propagated to the RegisterMap of the caller frame during
209 // StackFrameStream construction (needed for deoptimization; see
210 // compiledVFrame::create_stack_value).
211 // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.
213 int i;
214 int offset;
216 // calcualte frame size
217 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
218 sizeof(RegisterSaver::LiveRegType);
219 const int register_save_size = regstosave_num * reg_size;
220 const int frame_size_in_bytes = round_to(register_save_size, frame::alignment_in_bytes)
221 + frame::abi_reg_args_size;
222 *out_frame_size_in_bytes = frame_size_in_bytes;
223 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
224 const int register_save_offset = frame_size_in_bytes - register_save_size;
226 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
227 OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL;
229 BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");
231 // Save r30 in the last slot of the not yet pushed frame so that we
232 // can use it as scratch reg.
233 __ std(R30, -reg_size, R1_SP);
234 assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size),
235 "consistency check");
237 // save the flags
238 // Do the save_LR_CR by hand and adjust the return pc if requested.
239 __ mfcr(R30);
240 __ std(R30, _abi(cr), R1_SP);
241 switch (return_pc_location) {
242 case return_pc_is_lr: __ mflr(R30); break;
243 case return_pc_is_r4: __ mr(R30, R4); break;
244 case return_pc_is_thread_saved_exception_pc:
245 __ ld(R30, thread_(saved_exception_pc)); break;
246 default: ShouldNotReachHere();
247 }
248 if (return_pc_adjustment != 0)
249 __ addi(R30, R30, return_pc_adjustment);
250 __ std(R30, _abi(lr), R1_SP);
252 // push a new frame
253 __ push_frame(frame_size_in_bytes, R30);
255 // save all registers (ints and floats)
256 offset = register_save_offset;
257 for (int i = 0; i < regstosave_num; i++) {
258 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
259 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
261 switch (reg_type) {
262 case RegisterSaver::int_reg: {
263 if (reg_num != 30) { // We spilled R30 right at the beginning.
264 __ std(as_Register(reg_num), offset, R1_SP);
265 }
266 break;
267 }
268 case RegisterSaver::float_reg: {
269 __ stfd(as_FloatRegister(reg_num), offset, R1_SP);
270 break;
271 }
272 case RegisterSaver::special_reg: {
273 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
274 __ mfctr(R30);
275 __ std(R30, offset, R1_SP);
276 } else {
277 Unimplemented();
278 }
279 break;
280 }
281 default:
282 ShouldNotReachHere();
283 }
285 if (generate_oop_map) {
286 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
287 RegisterSaver_LiveRegs[i].vmreg);
288 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),
289 RegisterSaver_LiveRegs[i].vmreg->next());
290 }
291 offset += reg_size;
292 }
294 BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");
296 // And we're done.
297 return map;
298 }
301 // Pop the current frame and restore all the registers that we
302 // saved.
303 void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
304 int frame_size_in_bytes,
305 bool restore_ctr) {
306 int i;
307 int offset;
308 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
309 sizeof(RegisterSaver::LiveRegType);
310 const int register_save_size = regstosave_num * reg_size;
311 const int register_save_offset = frame_size_in_bytes - register_save_size;
313 BLOCK_COMMENT("restore_live_registers_and_pop_frame {");
315 // restore all registers (ints and floats)
316 offset = register_save_offset;
317 for (int i = 0; i < regstosave_num; i++) {
318 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
319 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
321 switch (reg_type) {
322 case RegisterSaver::int_reg: {
323 if (reg_num != 30) // R30 restored at the end, it's the tmp reg!
324 __ ld(as_Register(reg_num), offset, R1_SP);
325 break;
326 }
327 case RegisterSaver::float_reg: {
328 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
329 break;
330 }
331 case RegisterSaver::special_reg: {
332 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
333 if (restore_ctr) { // Nothing to do here if ctr already contains the next address.
334 __ ld(R30, offset, R1_SP);
335 __ mtctr(R30);
336 }
337 } else {
338 Unimplemented();
339 }
340 break;
341 }
342 default:
343 ShouldNotReachHere();
344 }
345 offset += reg_size;
346 }
348 // pop the frame
349 __ pop_frame();
351 // restore the flags
352 __ restore_LR_CR(R30);
354 // restore scratch register's value
355 __ ld(R30, -reg_size, R1_SP);
357 BLOCK_COMMENT("} restore_live_registers_and_pop_frame");
358 }
360 void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp,
361 int frame_size,int total_args, const VMRegPair *regs,
362 const VMRegPair *regs2) {
363 __ push_frame(frame_size, r_temp);
364 int st_off = frame_size - wordSize;
365 for (int i = 0; i < total_args; i++) {
366 VMReg r_1 = regs[i].first();
367 VMReg r_2 = regs[i].second();
368 if (!r_1->is_valid()) {
369 assert(!r_2->is_valid(), "");
370 continue;
371 }
372 if (r_1->is_Register()) {
373 Register r = r_1->as_Register();
374 __ std(r, st_off, R1_SP);
375 st_off -= wordSize;
376 } else if (r_1->is_FloatRegister()) {
377 FloatRegister f = r_1->as_FloatRegister();
378 __ stfd(f, st_off, R1_SP);
379 st_off -= wordSize;
380 }
381 }
382 if (regs2 != NULL) {
383 for (int i = 0; i < total_args; i++) {
384 VMReg r_1 = regs2[i].first();
385 VMReg r_2 = regs2[i].second();
386 if (!r_1->is_valid()) {
387 assert(!r_2->is_valid(), "");
388 continue;
389 }
390 if (r_1->is_Register()) {
391 Register r = r_1->as_Register();
392 __ std(r, st_off, R1_SP);
393 st_off -= wordSize;
394 } else if (r_1->is_FloatRegister()) {
395 FloatRegister f = r_1->as_FloatRegister();
396 __ stfd(f, st_off, R1_SP);
397 st_off -= wordSize;
398 }
399 }
400 }
401 }
403 void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size,
404 int total_args, const VMRegPair *regs,
405 const VMRegPair *regs2) {
406 int st_off = frame_size - wordSize;
407 for (int i = 0; i < total_args; i++) {
408 VMReg r_1 = regs[i].first();
409 VMReg r_2 = regs[i].second();
410 if (r_1->is_Register()) {
411 Register r = r_1->as_Register();
412 __ ld(r, st_off, R1_SP);
413 st_off -= wordSize;
414 } else if (r_1->is_FloatRegister()) {
415 FloatRegister f = r_1->as_FloatRegister();
416 __ lfd(f, st_off, R1_SP);
417 st_off -= wordSize;
418 }
419 }
420 if (regs2 != NULL)
421 for (int i = 0; i < total_args; i++) {
422 VMReg r_1 = regs2[i].first();
423 VMReg r_2 = regs2[i].second();
424 if (r_1->is_Register()) {
425 Register r = r_1->as_Register();
426 __ ld(r, st_off, R1_SP);
427 st_off -= wordSize;
428 } else if (r_1->is_FloatRegister()) {
429 FloatRegister f = r_1->as_FloatRegister();
430 __ lfd(f, st_off, R1_SP);
431 st_off -= wordSize;
432 }
433 }
434 __ pop_frame();
435 }
437 // Restore the registers that might be holding a result.
438 void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {
439 int i;
440 int offset;
441 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
442 sizeof(RegisterSaver::LiveRegType);
443 const int register_save_size = regstosave_num * reg_size;
444 const int register_save_offset = frame_size_in_bytes - register_save_size;
446 // restore all result registers (ints and floats)
447 offset = register_save_offset;
448 for (int i = 0; i < regstosave_num; i++) {
449 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
450 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
451 switch (reg_type) {
452 case RegisterSaver::int_reg: {
453 if (as_Register(reg_num)==R3_RET) // int result_reg
454 __ ld(as_Register(reg_num), offset, R1_SP);
455 break;
456 }
457 case RegisterSaver::float_reg: {
458 if (as_FloatRegister(reg_num)==F1_RET) // float result_reg
459 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
460 break;
461 }
462 case RegisterSaver::special_reg: {
463 // Special registers don't hold a result.
464 break;
465 }
466 default:
467 ShouldNotReachHere();
468 }
469 offset += reg_size;
470 }
471 }
473 // Is vector's size (in bytes) bigger than a size saved by default?
474 bool SharedRuntime::is_wide_vector(int size) {
475 ResourceMark rm;
476 // Note, MaxVectorSize == 8 on PPC64.
477 assert(size <= 8, err_msg_res("%d bytes vectors are not supported", size));
478 return size > 8;
479 }
480 #ifdef COMPILER2
481 static int reg2slot(VMReg r) {
482 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();
483 }
485 static int reg2offset(VMReg r) {
486 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
487 }
488 #endif
490 // ---------------------------------------------------------------------------
491 // Read the array of BasicTypes from a signature, and compute where the
492 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
493 // quantities. Values less than VMRegImpl::stack0 are registers, those above
494 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
495 // as framesizes are fixed.
496 // VMRegImpl::stack0 refers to the first slot 0(sp).
497 // and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register
498 // up to RegisterImpl::number_of_registers) are the 64-bit
499 // integer registers.
501 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
502 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
503 // units regardless of build. Of course for i486 there is no 64 bit build
505 // The Java calling convention is a "shifted" version of the C ABI.
506 // By skipping the first C ABI register we can call non-static jni methods
507 // with small numbers of arguments without having to shuffle the arguments
508 // at all. Since we control the java ABI we ought to at least get some
509 // advantage out of it.
511 const VMReg java_iarg_reg[8] = {
512 R3->as_VMReg(),
513 R4->as_VMReg(),
514 R5->as_VMReg(),
515 R6->as_VMReg(),
516 R7->as_VMReg(),
517 R8->as_VMReg(),
518 R9->as_VMReg(),
519 R10->as_VMReg()
520 };
522 const VMReg java_farg_reg[13] = {
523 F1->as_VMReg(),
524 F2->as_VMReg(),
525 F3->as_VMReg(),
526 F4->as_VMReg(),
527 F5->as_VMReg(),
528 F6->as_VMReg(),
529 F7->as_VMReg(),
530 F8->as_VMReg(),
531 F9->as_VMReg(),
532 F10->as_VMReg(),
533 F11->as_VMReg(),
534 F12->as_VMReg(),
535 F13->as_VMReg()
536 };
538 const int num_java_iarg_registers = sizeof(java_iarg_reg) / sizeof(java_iarg_reg[0]);
539 const int num_java_farg_registers = sizeof(java_farg_reg) / sizeof(java_farg_reg[0]);
541 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
542 VMRegPair *regs,
543 int total_args_passed,
544 int is_outgoing) {
545 // C2c calling conventions for compiled-compiled calls.
546 // Put 8 ints/longs into registers _AND_ 13 float/doubles into
547 // registers _AND_ put the rest on the stack.
549 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats
550 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
552 int i;
553 VMReg reg;
554 int stk = 0;
555 int ireg = 0;
556 int freg = 0;
558 // We put the first 8 arguments into registers and the rest on the
559 // stack, float arguments are already in their argument registers
560 // due to c2c calling conventions (see calling_convention).
561 for (int i = 0; i < total_args_passed; ++i) {
562 switch(sig_bt[i]) {
563 case T_BOOLEAN:
564 case T_CHAR:
565 case T_BYTE:
566 case T_SHORT:
567 case T_INT:
568 if (ireg < num_java_iarg_registers) {
569 // Put int/ptr in register
570 reg = java_iarg_reg[ireg];
571 ++ireg;
572 } else {
573 // Put int/ptr on stack.
574 reg = VMRegImpl::stack2reg(stk);
575 stk += inc_stk_for_intfloat;
576 }
577 regs[i].set1(reg);
578 break;
579 case T_LONG:
580 assert(sig_bt[i+1] == T_VOID, "expecting half");
581 if (ireg < num_java_iarg_registers) {
582 // Put long in register.
583 reg = java_iarg_reg[ireg];
584 ++ireg;
585 } else {
586 // Put long on stack. They must be aligned to 2 slots.
587 if (stk & 0x1) ++stk;
588 reg = VMRegImpl::stack2reg(stk);
589 stk += inc_stk_for_longdouble;
590 }
591 regs[i].set2(reg);
592 break;
593 case T_OBJECT:
594 case T_ARRAY:
595 case T_ADDRESS:
596 if (ireg < num_java_iarg_registers) {
597 // Put ptr in register.
598 reg = java_iarg_reg[ireg];
599 ++ireg;
600 } else {
601 // Put ptr on stack. Objects must be aligned to 2 slots too,
602 // because "64-bit pointers record oop-ishness on 2 aligned
603 // adjacent registers." (see OopFlow::build_oop_map).
604 if (stk & 0x1) ++stk;
605 reg = VMRegImpl::stack2reg(stk);
606 stk += inc_stk_for_longdouble;
607 }
608 regs[i].set2(reg);
609 break;
610 case T_FLOAT:
611 if (freg < num_java_farg_registers) {
612 // Put float in register.
613 reg = java_farg_reg[freg];
614 ++freg;
615 } else {
616 // Put float on stack.
617 reg = VMRegImpl::stack2reg(stk);
618 stk += inc_stk_for_intfloat;
619 }
620 regs[i].set1(reg);
621 break;
622 case T_DOUBLE:
623 assert(sig_bt[i+1] == T_VOID, "expecting half");
624 if (freg < num_java_farg_registers) {
625 // Put double in register.
626 reg = java_farg_reg[freg];
627 ++freg;
628 } else {
629 // Put double on stack. They must be aligned to 2 slots.
630 if (stk & 0x1) ++stk;
631 reg = VMRegImpl::stack2reg(stk);
632 stk += inc_stk_for_longdouble;
633 }
634 regs[i].set2(reg);
635 break;
636 case T_VOID:
637 // Do not count halves.
638 regs[i].set_bad();
639 break;
640 default:
641 ShouldNotReachHere();
642 }
643 }
644 return round_to(stk, 2);
645 }
647 #ifdef COMPILER2
648 // Calling convention for calling C code.
649 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
650 VMRegPair *regs,
651 VMRegPair *regs2,
652 int total_args_passed) {
653 // Calling conventions for C runtime calls and calls to JNI native methods.
654 //
655 // PPC64 convention: Hoist the first 8 int/ptr/long's in the first 8
656 // int regs, leaving int regs undefined if the arg is flt/dbl. Hoist
657 // the first 13 flt/dbl's in the first 13 fp regs but additionally
658 // copy flt/dbl to the stack if they are beyond the 8th argument.
660 const VMReg iarg_reg[8] = {
661 R3->as_VMReg(),
662 R4->as_VMReg(),
663 R5->as_VMReg(),
664 R6->as_VMReg(),
665 R7->as_VMReg(),
666 R8->as_VMReg(),
667 R9->as_VMReg(),
668 R10->as_VMReg()
669 };
671 const VMReg farg_reg[13] = {
672 F1->as_VMReg(),
673 F2->as_VMReg(),
674 F3->as_VMReg(),
675 F4->as_VMReg(),
676 F5->as_VMReg(),
677 F6->as_VMReg(),
678 F7->as_VMReg(),
679 F8->as_VMReg(),
680 F9->as_VMReg(),
681 F10->as_VMReg(),
682 F11->as_VMReg(),
683 F12->as_VMReg(),
684 F13->as_VMReg()
685 };
687 // Check calling conventions consistency.
688 assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
689 sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
690 "consistency");
692 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
693 // 2 such slots, like 64 bit values do.
694 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
695 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
697 int i;
698 VMReg reg;
699 // Leave room for C-compatible ABI_REG_ARGS.
700 int stk = (frame::abi_reg_args_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
701 int arg = 0;
702 int freg = 0;
704 // Avoid passing C arguments in the wrong stack slots.
705 #if defined(ABI_ELFv2)
706 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 96,
707 "passing C arguments in wrong stack slots");
708 #else
709 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112,
710 "passing C arguments in wrong stack slots");
711 #endif
712 // We fill-out regs AND regs2 if an argument must be passed in a
713 // register AND in a stack slot. If regs2 is NULL in such a
714 // situation, we bail-out with a fatal error.
715 for (int i = 0; i < total_args_passed; ++i, ++arg) {
716 // Initialize regs2 to BAD.
717 if (regs2 != NULL) regs2[i].set_bad();
719 switch(sig_bt[i]) {
721 //
722 // If arguments 0-7 are integers, they are passed in integer registers.
723 // Argument i is placed in iarg_reg[i].
724 //
725 case T_BOOLEAN:
726 case T_CHAR:
727 case T_BYTE:
728 case T_SHORT:
729 case T_INT:
730 // We must cast ints to longs and use full 64 bit stack slots
731 // here. We do the cast in GraphKit::gen_stub() and just guard
732 // here against loosing that change.
733 assert(CCallingConventionRequiresIntsAsLongs,
734 "argument of type int should be promoted to type long");
735 guarantee(i > 0 && sig_bt[i-1] == T_LONG,
736 "argument of type (bt) should have been promoted to type (T_LONG,bt) for bt in "
737 "{T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
738 // Do not count halves.
739 regs[i].set_bad();
740 --arg;
741 break;
742 case T_LONG:
743 guarantee(sig_bt[i+1] == T_VOID ||
744 sig_bt[i+1] == T_BOOLEAN || sig_bt[i+1] == T_CHAR ||
745 sig_bt[i+1] == T_BYTE || sig_bt[i+1] == T_SHORT ||
746 sig_bt[i+1] == T_INT,
747 "expecting type (T_LONG,half) or type (T_LONG,bt) with bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
748 case T_OBJECT:
749 case T_ARRAY:
750 case T_ADDRESS:
751 case T_METADATA:
752 // Oops are already boxed if required (JNI).
753 if (arg < Argument::n_int_register_parameters_c) {
754 reg = iarg_reg[arg];
755 } else {
756 reg = VMRegImpl::stack2reg(stk);
757 stk += inc_stk_for_longdouble;
758 }
759 regs[i].set2(reg);
760 break;
762 //
763 // Floats are treated differently from int regs: The first 13 float arguments
764 // are passed in registers (not the float args among the first 13 args).
765 // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
766 // in farg_reg[j] if argument i is the j-th float argument of this call.
767 //
768 case T_FLOAT:
769 if (freg < Argument::n_float_register_parameters_c) {
770 // Put float in register ...
771 reg = farg_reg[freg];
772 ++freg;
774 // Argument i for i > 8 is placed on the stack even if it's
775 // placed in a register (if it's a float arg). Aix disassembly
776 // shows that xlC places these float args on the stack AND in
777 // a register. This is not documented, but we follow this
778 // convention, too.
779 if (arg >= Argument::n_regs_not_on_stack_c) {
780 // ... and on the stack.
781 guarantee(regs2 != NULL, "must pass float in register and stack slot");
782 VMReg reg2 = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
783 regs2[i].set1(reg2);
784 stk += inc_stk_for_intfloat;
785 }
787 } else {
788 // Put float on stack.
789 reg = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
790 stk += inc_stk_for_intfloat;
791 }
792 regs[i].set1(reg);
793 break;
794 case T_DOUBLE:
795 assert(sig_bt[i+1] == T_VOID, "expecting half");
796 if (freg < Argument::n_float_register_parameters_c) {
797 // Put double in register ...
798 reg = farg_reg[freg];
799 ++freg;
801 // Argument i for i > 8 is placed on the stack even if it's
802 // placed in a register (if it's a double arg). Aix disassembly
803 // shows that xlC places these float args on the stack AND in
804 // a register. This is not documented, but we follow this
805 // convention, too.
806 if (arg >= Argument::n_regs_not_on_stack_c) {
807 // ... and on the stack.
808 guarantee(regs2 != NULL, "must pass float in register and stack slot");
809 VMReg reg2 = VMRegImpl::stack2reg(stk);
810 regs2[i].set2(reg2);
811 stk += inc_stk_for_longdouble;
812 }
813 } else {
814 // Put double on stack.
815 reg = VMRegImpl::stack2reg(stk);
816 stk += inc_stk_for_longdouble;
817 }
818 regs[i].set2(reg);
819 break;
821 case T_VOID:
822 // Do not count halves.
823 regs[i].set_bad();
824 --arg;
825 break;
826 default:
827 ShouldNotReachHere();
828 }
829 }
831 return round_to(stk, 2);
832 }
833 #endif // COMPILER2
835 static address gen_c2i_adapter(MacroAssembler *masm,
836 int total_args_passed,
837 int comp_args_on_stack,
838 const BasicType *sig_bt,
839 const VMRegPair *regs,
840 Label& call_interpreter,
841 const Register& ientry) {
843 address c2i_entrypoint;
845 const Register sender_SP = R21_sender_SP; // == R21_tmp1
846 const Register code = R22_tmp2;
847 //const Register ientry = R23_tmp3;
848 const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 };
849 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
850 int value_regs_index = 0;
852 const Register return_pc = R27_tmp7;
853 const Register tmp = R28_tmp8;
855 assert_different_registers(sender_SP, code, ientry, return_pc, tmp);
857 // Adapter needs TOP_IJAVA_FRAME_ABI.
858 const int adapter_size = frame::top_ijava_frame_abi_size +
859 round_to(total_args_passed * wordSize, frame::alignment_in_bytes);
861 // regular (verified) c2i entry point
862 c2i_entrypoint = __ pc();
864 // Does compiled code exists? If yes, patch the caller's callsite.
865 __ ld(code, method_(code));
866 __ cmpdi(CCR0, code, 0);
867 __ ld(ientry, method_(interpreter_entry)); // preloaded
868 __ beq(CCR0, call_interpreter);
871 // Patch caller's callsite, method_(code) was not NULL which means that
872 // compiled code exists.
873 __ mflr(return_pc);
874 __ std(return_pc, _abi(lr), R1_SP);
875 RegisterSaver::push_frame_and_save_argument_registers(masm, tmp, adapter_size, total_args_passed, regs);
877 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), R19_method, return_pc);
879 RegisterSaver::restore_argument_registers_and_pop_frame(masm, adapter_size, total_args_passed, regs);
880 __ ld(return_pc, _abi(lr), R1_SP);
881 __ ld(ientry, method_(interpreter_entry)); // preloaded
882 __ mtlr(return_pc);
885 // Call the interpreter.
886 __ BIND(call_interpreter);
887 __ mtctr(ientry);
889 // Get a copy of the current SP for loading caller's arguments.
890 __ mr(sender_SP, R1_SP);
892 // Add space for the adapter.
893 __ resize_frame(-adapter_size, R12_scratch2);
895 int st_off = adapter_size - wordSize;
897 // Write the args into the outgoing interpreter space.
898 for (int i = 0; i < total_args_passed; i++) {
899 VMReg r_1 = regs[i].first();
900 VMReg r_2 = regs[i].second();
901 if (!r_1->is_valid()) {
902 assert(!r_2->is_valid(), "");
903 continue;
904 }
905 if (r_1->is_stack()) {
906 Register tmp_reg = value_regs[value_regs_index];
907 value_regs_index = (value_regs_index + 1) % num_value_regs;
908 // The calling convention produces OptoRegs that ignore the out
909 // preserve area (JIT's ABI). We must account for it here.
910 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
911 if (!r_2->is_valid()) {
912 __ lwz(tmp_reg, ld_off, sender_SP);
913 } else {
914 __ ld(tmp_reg, ld_off, sender_SP);
915 }
916 // Pretend stack targets were loaded into tmp_reg.
917 r_1 = tmp_reg->as_VMReg();
918 }
920 if (r_1->is_Register()) {
921 Register r = r_1->as_Register();
922 if (!r_2->is_valid()) {
923 __ stw(r, st_off, R1_SP);
924 st_off-=wordSize;
925 } else {
926 // Longs are given 2 64-bit slots in the interpreter, but the
927 // data is passed in only 1 slot.
928 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
929 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
930 st_off-=wordSize;
931 }
932 __ std(r, st_off, R1_SP);
933 st_off-=wordSize;
934 }
935 } else {
936 assert(r_1->is_FloatRegister(), "");
937 FloatRegister f = r_1->as_FloatRegister();
938 if (!r_2->is_valid()) {
939 __ stfs(f, st_off, R1_SP);
940 st_off-=wordSize;
941 } else {
942 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
943 // data is passed in only 1 slot.
944 // One of these should get known junk...
945 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
946 st_off-=wordSize;
947 __ stfd(f, st_off, R1_SP);
948 st_off-=wordSize;
949 }
950 }
951 }
953 // Jump to the interpreter just as if interpreter was doing it.
955 #ifdef CC_INTERP
956 const Register tos = R17_tos;
957 #else
958 const Register tos = R15_esp;
959 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
960 #endif
962 // load TOS
963 __ addi(tos, R1_SP, st_off);
965 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
966 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
967 __ bctr();
969 return c2i_entrypoint;
970 }
972 static void gen_i2c_adapter(MacroAssembler *masm,
973 int total_args_passed,
974 int comp_args_on_stack,
975 const BasicType *sig_bt,
976 const VMRegPair *regs) {
978 // Load method's entry-point from method.
979 __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
980 __ mtctr(R12_scratch2);
982 // We will only enter here from an interpreted frame and never from after
983 // passing thru a c2i. Azul allowed this but we do not. If we lose the
984 // race and use a c2i we will remain interpreted for the race loser(s).
985 // This removes all sorts of headaches on the x86 side and also eliminates
986 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
988 // Note: r13 contains the senderSP on entry. We must preserve it since
989 // we may do a i2c -> c2i transition if we lose a race where compiled
990 // code goes non-entrant while we get args ready.
991 // In addition we use r13 to locate all the interpreter args as
992 // we must align the stack to 16 bytes on an i2c entry else we
993 // lose alignment we expect in all compiled code and register
994 // save code can segv when fxsave instructions find improperly
995 // aligned stack pointer.
997 #ifdef CC_INTERP
998 const Register ld_ptr = R17_tos;
999 #else
1000 const Register ld_ptr = R15_esp;
1001 #endif
1003 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
1004 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
1005 int value_regs_index = 0;
1007 int ld_offset = total_args_passed*wordSize;
1009 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
1010 // in registers, we will occasionally have no stack args.
1011 int comp_words_on_stack = 0;
1012 if (comp_args_on_stack) {
1013 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1014 // registers are below. By subtracting stack0, we either get a negative
1015 // number (all values in registers) or the maximum stack slot accessed.
1017 // Convert 4-byte c2 stack slots to words.
1018 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1019 // Round up to miminum stack alignment, in wordSize.
1020 comp_words_on_stack = round_to(comp_words_on_stack, 2);
1021 __ resize_frame(-comp_words_on_stack * wordSize, R11_scratch1);
1022 }
1024 // Now generate the shuffle code. Pick up all register args and move the
1025 // rest through register value=Z_R12.
1026 BLOCK_COMMENT("Shuffle arguments");
1027 for (int i = 0; i < total_args_passed; i++) {
1028 if (sig_bt[i] == T_VOID) {
1029 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
1030 continue;
1031 }
1033 // Pick up 0, 1 or 2 words from ld_ptr.
1034 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
1035 "scrambled load targets?");
1036 VMReg r_1 = regs[i].first();
1037 VMReg r_2 = regs[i].second();
1038 if (!r_1->is_valid()) {
1039 assert(!r_2->is_valid(), "");
1040 continue;
1041 }
1042 if (r_1->is_FloatRegister()) {
1043 if (!r_2->is_valid()) {
1044 __ lfs(r_1->as_FloatRegister(), ld_offset, ld_ptr);
1045 ld_offset-=wordSize;
1046 } else {
1047 // Skip the unused interpreter slot.
1048 __ lfd(r_1->as_FloatRegister(), ld_offset-wordSize, ld_ptr);
1049 ld_offset-=2*wordSize;
1050 }
1051 } else {
1052 Register r;
1053 if (r_1->is_stack()) {
1054 // Must do a memory to memory move thru "value".
1055 r = value_regs[value_regs_index];
1056 value_regs_index = (value_regs_index + 1) % num_value_regs;
1057 } else {
1058 r = r_1->as_Register();
1059 }
1060 if (!r_2->is_valid()) {
1061 // Not sure we need to do this but it shouldn't hurt.
1062 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ADDRESS || sig_bt[i] == T_ARRAY) {
1063 __ ld(r, ld_offset, ld_ptr);
1064 ld_offset-=wordSize;
1065 } else {
1066 __ lwz(r, ld_offset, ld_ptr);
1067 ld_offset-=wordSize;
1068 }
1069 } else {
1070 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
1071 // data is passed in only 1 slot.
1072 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
1073 ld_offset-=wordSize;
1074 }
1075 __ ld(r, ld_offset, ld_ptr);
1076 ld_offset-=wordSize;
1077 }
1079 if (r_1->is_stack()) {
1080 // Now store value where the compiler expects it
1081 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size;
1083 if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN ||
1084 sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) {
1085 __ stw(r, st_off, R1_SP);
1086 } else {
1087 __ std(r, st_off, R1_SP);
1088 }
1089 }
1090 }
1091 }
1093 BLOCK_COMMENT("Store method");
1094 // Store method into thread->callee_target.
1095 // We might end up in handle_wrong_method if the callee is
1096 // deoptimized as we race thru here. If that happens we don't want
1097 // to take a safepoint because the caller frame will look
1098 // interpreted and arguments are now "compiled" so it is much better
1099 // to make this transition invisible to the stack walking
1100 // code. Unfortunately if we try and find the callee by normal means
1101 // a safepoint is possible. So we stash the desired callee in the
1102 // thread and the vm will find there should this case occur.
1103 __ std(R19_method, thread_(callee_target));
1105 // Jump to the compiled code just as if compiled code was doing it.
1106 __ bctr();
1107 }
1109 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1110 int total_args_passed,
1111 int comp_args_on_stack,
1112 const BasicType *sig_bt,
1113 const VMRegPair *regs,
1114 AdapterFingerPrint* fingerprint) {
1115 address i2c_entry;
1116 address c2i_unverified_entry;
1117 address c2i_entry;
1120 // entry: i2c
1122 __ align(CodeEntryAlignment);
1123 i2c_entry = __ pc();
1124 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
1127 // entry: c2i unverified
1129 __ align(CodeEntryAlignment);
1130 BLOCK_COMMENT("c2i unverified entry");
1131 c2i_unverified_entry = __ pc();
1133 // inline_cache contains a compiledICHolder
1134 const Register ic = R19_method;
1135 const Register ic_klass = R11_scratch1;
1136 const Register receiver_klass = R12_scratch2;
1137 const Register code = R21_tmp1;
1138 const Register ientry = R23_tmp3;
1140 assert_different_registers(ic, ic_klass, receiver_klass, R3_ARG1, code, ientry);
1141 assert(R11_scratch1 == R11, "need prologue scratch register");
1143 Label call_interpreter;
1145 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()),
1146 "klass offset should reach into any page");
1147 // Check for NULL argument if we don't have implicit null checks.
1148 if (!ImplicitNullChecks || !os::zero_page_read_protected()) {
1149 if (TrapBasedNullChecks) {
1150 __ trap_null_check(R3_ARG1);
1151 } else {
1152 Label valid;
1153 __ cmpdi(CCR0, R3_ARG1, 0);
1154 __ bne_predict_taken(CCR0, valid);
1155 // We have a null argument, branch to ic_miss_stub.
1156 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1157 relocInfo::runtime_call_type);
1158 __ BIND(valid);
1159 }
1160 }
1161 // Assume argument is not NULL, load klass from receiver.
1162 __ load_klass(receiver_klass, R3_ARG1);
1164 __ ld(ic_klass, CompiledICHolder::holder_klass_offset(), ic);
1166 if (TrapBasedICMissChecks) {
1167 __ trap_ic_miss_check(receiver_klass, ic_klass);
1168 } else {
1169 Label valid;
1170 __ cmpd(CCR0, receiver_klass, ic_klass);
1171 __ beq_predict_taken(CCR0, valid);
1172 // We have an unexpected klass, branch to ic_miss_stub.
1173 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1174 relocInfo::runtime_call_type);
1175 __ BIND(valid);
1176 }
1178 // Argument is valid and klass is as expected, continue.
1180 // Extract method from inline cache, verified entry point needs it.
1181 __ ld(R19_method, CompiledICHolder::holder_method_offset(), ic);
1182 assert(R19_method == ic, "the inline cache register is dead here");
1184 __ ld(code, method_(code));
1185 __ cmpdi(CCR0, code, 0);
1186 __ ld(ientry, method_(interpreter_entry)); // preloaded
1187 __ beq_predict_taken(CCR0, call_interpreter);
1189 // Branch to ic_miss_stub.
1190 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1192 // entry: c2i
1194 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
1196 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1197 }
1199 #ifdef COMPILER2
1200 // An oop arg. Must pass a handle not the oop itself.
1201 static void object_move(MacroAssembler* masm,
1202 int frame_size_in_slots,
1203 OopMap* oop_map, int oop_handle_offset,
1204 bool is_receiver, int* receiver_offset,
1205 VMRegPair src, VMRegPair dst,
1206 Register r_caller_sp, Register r_temp_1, Register r_temp_2) {
1207 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)),
1208 "receiver has already been moved");
1210 // We must pass a handle. First figure out the location we use as a handle.
1212 if (src.first()->is_stack()) {
1213 // stack to stack or reg
1215 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1216 Label skip;
1217 const int oop_slot_in_callers_frame = reg2slot(src.first());
1219 guarantee(!is_receiver, "expecting receiver in register");
1220 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot_in_callers_frame + frame_size_in_slots));
1222 __ addi(r_handle, r_caller_sp, reg2offset(src.first()));
1223 __ ld( r_temp_2, reg2offset(src.first()), r_caller_sp);
1224 __ cmpdi(CCR0, r_temp_2, 0);
1225 __ bne(CCR0, skip);
1226 // Use a NULL handle if oop is NULL.
1227 __ li(r_handle, 0);
1228 __ bind(skip);
1230 if (dst.first()->is_stack()) {
1231 // stack to stack
1232 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1233 } else {
1234 // stack to reg
1235 // Nothing to do, r_handle is already the dst register.
1236 }
1237 } else {
1238 // reg to stack or reg
1239 const Register r_oop = src.first()->as_Register();
1240 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1241 const int oop_slot = (r_oop->encoding()-R3_ARG1->encoding()) * VMRegImpl::slots_per_word
1242 + oop_handle_offset; // in slots
1243 const int oop_offset = oop_slot * VMRegImpl::stack_slot_size;
1244 Label skip;
1246 if (is_receiver) {
1247 *receiver_offset = oop_offset;
1248 }
1249 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot));
1251 __ std( r_oop, oop_offset, R1_SP);
1252 __ addi(r_handle, R1_SP, oop_offset);
1254 __ cmpdi(CCR0, r_oop, 0);
1255 __ bne(CCR0, skip);
1256 // Use a NULL handle if oop is NULL.
1257 __ li(r_handle, 0);
1258 __ bind(skip);
1260 if (dst.first()->is_stack()) {
1261 // reg to stack
1262 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1263 } else {
1264 // reg to reg
1265 // Nothing to do, r_handle is already the dst register.
1266 }
1267 }
1268 }
1270 static void int_move(MacroAssembler*masm,
1271 VMRegPair src, VMRegPair dst,
1272 Register r_caller_sp, Register r_temp) {
1273 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long-int");
1274 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1276 if (src.first()->is_stack()) {
1277 if (dst.first()->is_stack()) {
1278 // stack to stack
1279 __ lwa(r_temp, reg2offset(src.first()), r_caller_sp);
1280 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1281 } else {
1282 // stack to reg
1283 __ lwa(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1284 }
1285 } else if (dst.first()->is_stack()) {
1286 // reg to stack
1287 __ extsw(r_temp, src.first()->as_Register());
1288 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1289 } else {
1290 // reg to reg
1291 __ extsw(dst.first()->as_Register(), src.first()->as_Register());
1292 }
1293 }
1295 static void long_move(MacroAssembler*masm,
1296 VMRegPair src, VMRegPair dst,
1297 Register r_caller_sp, Register r_temp) {
1298 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long");
1299 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1301 if (src.first()->is_stack()) {
1302 if (dst.first()->is_stack()) {
1303 // stack to stack
1304 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1305 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1306 } else {
1307 // stack to reg
1308 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1309 }
1310 } else if (dst.first()->is_stack()) {
1311 // reg to stack
1312 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1313 } else {
1314 // reg to reg
1315 if (dst.first()->as_Register() != src.first()->as_Register())
1316 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1317 }
1318 }
1320 static void float_move(MacroAssembler*masm,
1321 VMRegPair src, VMRegPair dst,
1322 Register r_caller_sp, Register r_temp) {
1323 assert(src.first()->is_valid() && !src.second()->is_valid(), "incoming must be float");
1324 assert(dst.first()->is_valid() && !dst.second()->is_valid(), "outgoing must be float");
1326 if (src.first()->is_stack()) {
1327 if (dst.first()->is_stack()) {
1328 // stack to stack
1329 __ lwz(r_temp, reg2offset(src.first()), r_caller_sp);
1330 __ stw(r_temp, reg2offset(dst.first()), R1_SP);
1331 } else {
1332 // stack to reg
1333 __ lfs(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1334 }
1335 } else if (dst.first()->is_stack()) {
1336 // reg to stack
1337 __ stfs(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1338 } else {
1339 // reg to reg
1340 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1341 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1342 }
1343 }
1345 static void double_move(MacroAssembler*masm,
1346 VMRegPair src, VMRegPair dst,
1347 Register r_caller_sp, Register r_temp) {
1348 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be double");
1349 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be double");
1351 if (src.first()->is_stack()) {
1352 if (dst.first()->is_stack()) {
1353 // stack to stack
1354 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1355 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1356 } else {
1357 // stack to reg
1358 __ lfd(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1359 }
1360 } else if (dst.first()->is_stack()) {
1361 // reg to stack
1362 __ stfd(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1363 } else {
1364 // reg to reg
1365 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1366 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1367 }
1368 }
1370 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1371 switch (ret_type) {
1372 case T_BOOLEAN:
1373 case T_CHAR:
1374 case T_BYTE:
1375 case T_SHORT:
1376 case T_INT:
1377 __ stw (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1378 break;
1379 case T_ARRAY:
1380 case T_OBJECT:
1381 case T_LONG:
1382 __ std (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1383 break;
1384 case T_FLOAT:
1385 __ stfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1386 break;
1387 case T_DOUBLE:
1388 __ stfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1389 break;
1390 case T_VOID:
1391 break;
1392 default:
1393 ShouldNotReachHere();
1394 break;
1395 }
1396 }
1398 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1399 switch (ret_type) {
1400 case T_BOOLEAN:
1401 case T_CHAR:
1402 case T_BYTE:
1403 case T_SHORT:
1404 case T_INT:
1405 __ lwz(R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1406 break;
1407 case T_ARRAY:
1408 case T_OBJECT:
1409 case T_LONG:
1410 __ ld (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1411 break;
1412 case T_FLOAT:
1413 __ lfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1414 break;
1415 case T_DOUBLE:
1416 __ lfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1417 break;
1418 case T_VOID:
1419 break;
1420 default:
1421 ShouldNotReachHere();
1422 break;
1423 }
1424 }
1426 static void save_or_restore_arguments(MacroAssembler* masm,
1427 const int stack_slots,
1428 const int total_in_args,
1429 const int arg_save_area,
1430 OopMap* map,
1431 VMRegPair* in_regs,
1432 BasicType* in_sig_bt) {
1433 // If map is non-NULL then the code should store the values,
1434 // otherwise it should load them.
1435 int slot = arg_save_area;
1436 // Save down double word first.
1437 for (int i = 0; i < total_in_args; i++) {
1438 if (in_regs[i].first()->is_FloatRegister() && in_sig_bt[i] == T_DOUBLE) {
1439 int offset = slot * VMRegImpl::stack_slot_size;
1440 slot += VMRegImpl::slots_per_word;
1441 assert(slot <= stack_slots, "overflow (after DOUBLE stack slot)");
1442 if (map != NULL) {
1443 __ stfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1444 } else {
1445 __ lfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1446 }
1447 } else if (in_regs[i].first()->is_Register() &&
1448 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1449 int offset = slot * VMRegImpl::stack_slot_size;
1450 if (map != NULL) {
1451 __ std(in_regs[i].first()->as_Register(), offset, R1_SP);
1452 if (in_sig_bt[i] == T_ARRAY) {
1453 map->set_oop(VMRegImpl::stack2reg(slot));
1454 }
1455 } else {
1456 __ ld(in_regs[i].first()->as_Register(), offset, R1_SP);
1457 }
1458 slot += VMRegImpl::slots_per_word;
1459 assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
1460 }
1461 }
1462 // Save or restore single word registers.
1463 for (int i = 0; i < total_in_args; i++) {
1464 // PPC64: pass ints as longs: must only deal with floats here.
1465 if (in_regs[i].first()->is_FloatRegister()) {
1466 if (in_sig_bt[i] == T_FLOAT) {
1467 int offset = slot * VMRegImpl::stack_slot_size;
1468 slot++;
1469 assert(slot <= stack_slots, "overflow (after FLOAT stack slot)");
1470 if (map != NULL) {
1471 __ stfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1472 } else {
1473 __ lfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1474 }
1475 }
1476 } else if (in_regs[i].first()->is_stack()) {
1477 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1478 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1479 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1480 }
1481 }
1482 }
1483 }
1485 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1486 // keeps a new JNI critical region from starting until a GC has been
1487 // forced. Save down any oops in registers and describe them in an
1488 // OopMap.
1489 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1490 const int stack_slots,
1491 const int total_in_args,
1492 const int arg_save_area,
1493 OopMapSet* oop_maps,
1494 VMRegPair* in_regs,
1495 BasicType* in_sig_bt,
1496 Register tmp_reg ) {
1497 __ block_comment("check GC_locker::needs_gc");
1498 Label cont;
1499 __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GC_locker::needs_gc_address());
1500 __ cmplwi(CCR0, tmp_reg, 0);
1501 __ beq(CCR0, cont);
1503 // Save down any values that are live in registers and call into the
1504 // runtime to halt for a GC.
1505 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1506 save_or_restore_arguments(masm, stack_slots, total_in_args,
1507 arg_save_area, map, in_regs, in_sig_bt);
1509 __ mr(R3_ARG1, R16_thread);
1510 __ set_last_Java_frame(R1_SP, noreg);
1512 __ block_comment("block_for_jni_critical");
1513 address entry_point = CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical);
1514 #if defined(ABI_ELFv2)
1515 __ call_c(entry_point, relocInfo::runtime_call_type);
1516 #else
1517 __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::runtime_call_type);
1518 #endif
1519 address start = __ pc() - __ offset(),
1520 calls_return_pc = __ last_calls_return_pc();
1521 oop_maps->add_gc_map(calls_return_pc - start, map);
1523 __ reset_last_Java_frame();
1525 // Reload all the register arguments.
1526 save_or_restore_arguments(masm, stack_slots, total_in_args,
1527 arg_save_area, NULL, in_regs, in_sig_bt);
1529 __ BIND(cont);
1531 #ifdef ASSERT
1532 if (StressCriticalJNINatives) {
1533 // Stress register saving.
1534 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1535 save_or_restore_arguments(masm, stack_slots, total_in_args,
1536 arg_save_area, map, in_regs, in_sig_bt);
1537 // Destroy argument registers.
1538 for (int i = 0; i < total_in_args; i++) {
1539 if (in_regs[i].first()->is_Register()) {
1540 const Register reg = in_regs[i].first()->as_Register();
1541 __ neg(reg, reg);
1542 } else if (in_regs[i].first()->is_FloatRegister()) {
1543 __ fneg(in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister());
1544 }
1545 }
1547 save_or_restore_arguments(masm, stack_slots, total_in_args,
1548 arg_save_area, NULL, in_regs, in_sig_bt);
1549 }
1550 #endif
1551 }
1553 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst, Register r_caller_sp, Register r_temp) {
1554 if (src.first()->is_stack()) {
1555 if (dst.first()->is_stack()) {
1556 // stack to stack
1557 __ ld(r_temp, reg2offset(src.first()), r_caller_sp);
1558 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1559 } else {
1560 // stack to reg
1561 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1562 }
1563 } else if (dst.first()->is_stack()) {
1564 // reg to stack
1565 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1566 } else {
1567 if (dst.first() != src.first()) {
1568 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1569 }
1570 }
1571 }
1573 // Unpack an array argument into a pointer to the body and the length
1574 // if the array is non-null, otherwise pass 0 for both.
1575 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type,
1576 VMRegPair body_arg, VMRegPair length_arg, Register r_caller_sp,
1577 Register tmp_reg, Register tmp2_reg) {
1578 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1579 "possible collision");
1580 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1581 "possible collision");
1583 // Pass the length, ptr pair.
1584 Label set_out_args;
1585 VMRegPair tmp, tmp2;
1586 tmp.set_ptr(tmp_reg->as_VMReg());
1587 tmp2.set_ptr(tmp2_reg->as_VMReg());
1588 if (reg.first()->is_stack()) {
1589 // Load the arg up from the stack.
1590 move_ptr(masm, reg, tmp, r_caller_sp, /*unused*/ R0);
1591 reg = tmp;
1592 }
1593 __ li(tmp2_reg, 0); // Pass zeros if Array=null.
1594 if (tmp_reg != reg.first()->as_Register()) __ li(tmp_reg, 0);
1595 __ cmpdi(CCR0, reg.first()->as_Register(), 0);
1596 __ beq(CCR0, set_out_args);
1597 __ lwa(tmp2_reg, arrayOopDesc::length_offset_in_bytes(), reg.first()->as_Register());
1598 __ addi(tmp_reg, reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type));
1599 __ bind(set_out_args);
1600 move_ptr(masm, tmp, body_arg, r_caller_sp, /*unused*/ R0);
1601 move_ptr(masm, tmp2, length_arg, r_caller_sp, /*unused*/ R0); // Same as move32_64 on PPC64.
1602 }
1604 static void verify_oop_args(MacroAssembler* masm,
1605 methodHandle method,
1606 const BasicType* sig_bt,
1607 const VMRegPair* regs) {
1608 Register temp_reg = R19_method; // not part of any compiled calling seq
1609 if (VerifyOops) {
1610 for (int i = 0; i < method->size_of_parameters(); i++) {
1611 if (sig_bt[i] == T_OBJECT ||
1612 sig_bt[i] == T_ARRAY) {
1613 VMReg r = regs[i].first();
1614 assert(r->is_valid(), "bad oop arg");
1615 if (r->is_stack()) {
1616 __ ld(temp_reg, reg2offset(r), R1_SP);
1617 __ verify_oop(temp_reg);
1618 } else {
1619 __ verify_oop(r->as_Register());
1620 }
1621 }
1622 }
1623 }
1624 }
1626 static void gen_special_dispatch(MacroAssembler* masm,
1627 methodHandle method,
1628 const BasicType* sig_bt,
1629 const VMRegPair* regs) {
1630 verify_oop_args(masm, method, sig_bt, regs);
1631 vmIntrinsics::ID iid = method->intrinsic_id();
1633 // Now write the args into the outgoing interpreter space
1634 bool has_receiver = false;
1635 Register receiver_reg = noreg;
1636 int member_arg_pos = -1;
1637 Register member_reg = noreg;
1638 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1639 if (ref_kind != 0) {
1640 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1641 member_reg = R19_method; // known to be free at this point
1642 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1643 } else if (iid == vmIntrinsics::_invokeBasic) {
1644 has_receiver = true;
1645 } else {
1646 fatal(err_msg_res("unexpected intrinsic id %d", iid));
1647 }
1649 if (member_reg != noreg) {
1650 // Load the member_arg into register, if necessary.
1651 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1652 VMReg r = regs[member_arg_pos].first();
1653 if (r->is_stack()) {
1654 __ ld(member_reg, reg2offset(r), R1_SP);
1655 } else {
1656 // no data motion is needed
1657 member_reg = r->as_Register();
1658 }
1659 }
1661 if (has_receiver) {
1662 // Make sure the receiver is loaded into a register.
1663 assert(method->size_of_parameters() > 0, "oob");
1664 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1665 VMReg r = regs[0].first();
1666 assert(r->is_valid(), "bad receiver arg");
1667 if (r->is_stack()) {
1668 // Porting note: This assumes that compiled calling conventions always
1669 // pass the receiver oop in a register. If this is not true on some
1670 // platform, pick a temp and load the receiver from stack.
1671 fatal("receiver always in a register");
1672 receiver_reg = R11_scratch1; // TODO (hs24): is R11_scratch1 really free at this point?
1673 __ ld(receiver_reg, reg2offset(r), R1_SP);
1674 } else {
1675 // no data motion is needed
1676 receiver_reg = r->as_Register();
1677 }
1678 }
1680 // Figure out which address we are really jumping to:
1681 MethodHandles::generate_method_handle_dispatch(masm, iid,
1682 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1683 }
1685 #endif // COMPILER2
1687 // ---------------------------------------------------------------------------
1688 // Generate a native wrapper for a given method. The method takes arguments
1689 // in the Java compiled code convention, marshals them to the native
1690 // convention (handlizes oops, etc), transitions to native, makes the call,
1691 // returns to java state (possibly blocking), unhandlizes any result and
1692 // returns.
1693 //
1694 // Critical native functions are a shorthand for the use of
1695 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1696 // functions. The wrapper is expected to unpack the arguments before
1697 // passing them to the callee and perform checks before and after the
1698 // native call to ensure that they GC_locker
1699 // lock_critical/unlock_critical semantics are followed. Some other
1700 // parts of JNI setup are skipped like the tear down of the JNI handle
1701 // block and the check for pending exceptions it's impossible for them
1702 // to be thrown.
1703 //
1704 // They are roughly structured like this:
1705 // if (GC_locker::needs_gc())
1706 // SharedRuntime::block_for_jni_critical();
1707 // tranistion to thread_in_native
1708 // unpack arrray arguments and call native entry point
1709 // check for safepoint in progress
1710 // check if any thread suspend flags are set
1711 // call into JVM and possible unlock the JNI critical
1712 // if a GC was suppressed while in the critical native.
1713 // transition back to thread_in_Java
1714 // return to caller
1715 //
1716 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1717 methodHandle method,
1718 int compile_id,
1719 BasicType *in_sig_bt,
1720 VMRegPair *in_regs,
1721 BasicType ret_type) {
1722 #ifdef COMPILER2
1723 if (method->is_method_handle_intrinsic()) {
1724 vmIntrinsics::ID iid = method->intrinsic_id();
1725 intptr_t start = (intptr_t)__ pc();
1726 int vep_offset = ((intptr_t)__ pc()) - start;
1727 gen_special_dispatch(masm,
1728 method,
1729 in_sig_bt,
1730 in_regs);
1731 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1732 __ flush();
1733 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1734 return nmethod::new_native_nmethod(method,
1735 compile_id,
1736 masm->code(),
1737 vep_offset,
1738 frame_complete,
1739 stack_slots / VMRegImpl::slots_per_word,
1740 in_ByteSize(-1),
1741 in_ByteSize(-1),
1742 (OopMapSet*)NULL);
1743 }
1745 bool is_critical_native = true;
1746 address native_func = method->critical_native_function();
1747 if (native_func == NULL) {
1748 native_func = method->native_function();
1749 is_critical_native = false;
1750 }
1751 assert(native_func != NULL, "must have function");
1753 // First, create signature for outgoing C call
1754 // --------------------------------------------------------------------------
1756 int total_in_args = method->size_of_parameters();
1757 // We have received a description of where all the java args are located
1758 // on entry to the wrapper. We need to convert these args to where
1759 // the jni function will expect them. To figure out where they go
1760 // we convert the java signature to a C signature by inserting
1761 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1762 //
1763 // Additionally, on ppc64 we must convert integers to longs in the C
1764 // signature. We do this in advance in order to have no trouble with
1765 // indexes into the bt-arrays.
1766 // So convert the signature and registers now, and adjust the total number
1767 // of in-arguments accordingly.
1768 int i2l_argcnt = convert_ints_to_longints_argcnt(total_in_args, in_sig_bt); // PPC64: pass ints as longs.
1770 // Calculate the total number of C arguments and create arrays for the
1771 // signature and the outgoing registers.
1772 // On ppc64, we have two arrays for the outgoing registers, because
1773 // some floating-point arguments must be passed in registers _and_
1774 // in stack locations.
1775 bool method_is_static = method->is_static();
1776 int total_c_args = i2l_argcnt;
1778 if (!is_critical_native) {
1779 int n_hidden_args = method_is_static ? 2 : 1;
1780 total_c_args += n_hidden_args;
1781 } else {
1782 // No JNIEnv*, no this*, but unpacked arrays (base+length).
1783 for (int i = 0; i < total_in_args; i++) {
1784 if (in_sig_bt[i] == T_ARRAY) {
1785 total_c_args += 2; // PPC64: T_LONG, T_INT, T_ADDRESS (see convert_ints_to_longints and c_calling_convention)
1786 }
1787 }
1788 }
1790 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1791 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1792 VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1793 BasicType* in_elem_bt = NULL;
1795 // Create the signature for the C call:
1796 // 1) add the JNIEnv*
1797 // 2) add the class if the method is static
1798 // 3) copy the rest of the incoming signature (shifted by the number of
1799 // hidden arguments).
1801 int argc = 0;
1802 if (!is_critical_native) {
1803 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs.
1805 out_sig_bt[argc++] = T_ADDRESS;
1806 if (method->is_static()) {
1807 out_sig_bt[argc++] = T_OBJECT;
1808 }
1810 for (int i = 0; i < total_in_args ; i++ ) {
1811 out_sig_bt[argc++] = in_sig_bt[i];
1812 }
1813 } else {
1814 Thread* THREAD = Thread::current();
1815 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, i2l_argcnt);
1816 SignatureStream ss(method->signature());
1817 int o = 0;
1818 for (int i = 0; i < total_in_args ; i++, o++) {
1819 if (in_sig_bt[i] == T_ARRAY) {
1820 // Arrays are passed as int, elem* pair
1821 Symbol* atype = ss.as_symbol(CHECK_NULL);
1822 const char* at = atype->as_C_string();
1823 if (strlen(at) == 2) {
1824 assert(at[0] == '[', "must be");
1825 switch (at[1]) {
1826 case 'B': in_elem_bt[o] = T_BYTE; break;
1827 case 'C': in_elem_bt[o] = T_CHAR; break;
1828 case 'D': in_elem_bt[o] = T_DOUBLE; break;
1829 case 'F': in_elem_bt[o] = T_FLOAT; break;
1830 case 'I': in_elem_bt[o] = T_INT; break;
1831 case 'J': in_elem_bt[o] = T_LONG; break;
1832 case 'S': in_elem_bt[o] = T_SHORT; break;
1833 case 'Z': in_elem_bt[o] = T_BOOLEAN; break;
1834 default: ShouldNotReachHere();
1835 }
1836 }
1837 } else {
1838 in_elem_bt[o] = T_VOID;
1839 switch(in_sig_bt[i]) { // PPC64: pass ints as longs.
1840 case T_BOOLEAN:
1841 case T_CHAR:
1842 case T_BYTE:
1843 case T_SHORT:
1844 case T_INT: in_elem_bt[++o] = T_VOID; break;
1845 default: break;
1846 }
1847 }
1848 if (in_sig_bt[i] != T_VOID) {
1849 assert(in_sig_bt[i] == ss.type(), "must match");
1850 ss.next();
1851 }
1852 }
1853 assert(i2l_argcnt==o, "must match");
1855 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs.
1857 for (int i = 0; i < total_in_args ; i++ ) {
1858 if (in_sig_bt[i] == T_ARRAY) {
1859 // Arrays are passed as int, elem* pair.
1860 out_sig_bt[argc++] = T_LONG; // PPC64: pass ints as longs.
1861 out_sig_bt[argc++] = T_INT;
1862 out_sig_bt[argc++] = T_ADDRESS;
1863 } else {
1864 out_sig_bt[argc++] = in_sig_bt[i];
1865 }
1866 }
1867 }
1870 // Compute the wrapper's frame size.
1871 // --------------------------------------------------------------------------
1873 // Now figure out where the args must be stored and how much stack space
1874 // they require.
1875 //
1876 // Compute framesize for the wrapper. We need to handlize all oops in
1877 // incoming registers.
1878 //
1879 // Calculate the total number of stack slots we will need:
1880 // 1) abi requirements
1881 // 2) outgoing arguments
1882 // 3) space for inbound oop handle area
1883 // 4) space for handlizing a klass if static method
1884 // 5) space for a lock if synchronized method
1885 // 6) workspace for saving return values, int <-> float reg moves, etc.
1886 // 7) alignment
1887 //
1888 // Layout of the native wrapper frame:
1889 // (stack grows upwards, memory grows downwards)
1890 //
1891 // NW [ABI_REG_ARGS] <-- 1) R1_SP
1892 // [outgoing arguments] <-- 2) R1_SP + out_arg_slot_offset
1893 // [oopHandle area] <-- 3) R1_SP + oop_handle_offset (save area for critical natives)
1894 // klass <-- 4) R1_SP + klass_offset
1895 // lock <-- 5) R1_SP + lock_offset
1896 // [workspace] <-- 6) R1_SP + workspace_offset
1897 // [alignment] (optional) <-- 7)
1898 // caller [JIT_TOP_ABI_48] <-- r_callers_sp
1899 //
1900 // - *_slot_offset Indicates offset from SP in number of stack slots.
1901 // - *_offset Indicates offset from SP in bytes.
1903 int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) // 1+2)
1904 + SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention.
1906 // Now the space for the inbound oop handle area.
1907 int total_save_slots = num_java_iarg_registers * VMRegImpl::slots_per_word;
1908 if (is_critical_native) {
1909 // Critical natives may have to call out so they need a save area
1910 // for register arguments.
1911 int double_slots = 0;
1912 int single_slots = 0;
1913 for (int i = 0; i < total_in_args; i++) {
1914 if (in_regs[i].first()->is_Register()) {
1915 const Register reg = in_regs[i].first()->as_Register();
1916 switch (in_sig_bt[i]) {
1917 case T_BOOLEAN:
1918 case T_BYTE:
1919 case T_SHORT:
1920 case T_CHAR:
1921 case T_INT: /*single_slots++;*/ break; // PPC64: pass ints as longs.
1922 case T_ARRAY:
1923 case T_LONG: double_slots++; break;
1924 default: ShouldNotReachHere();
1925 }
1926 } else if (in_regs[i].first()->is_FloatRegister()) {
1927 switch (in_sig_bt[i]) {
1928 case T_FLOAT: single_slots++; break;
1929 case T_DOUBLE: double_slots++; break;
1930 default: ShouldNotReachHere();
1931 }
1932 }
1933 }
1934 total_save_slots = double_slots * 2 + round_to(single_slots, 2); // round to even
1935 }
1937 int oop_handle_slot_offset = stack_slots;
1938 stack_slots += total_save_slots; // 3)
1940 int klass_slot_offset = 0;
1941 int klass_offset = -1;
1942 if (method_is_static && !is_critical_native) { // 4)
1943 klass_slot_offset = stack_slots;
1944 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1945 stack_slots += VMRegImpl::slots_per_word;
1946 }
1948 int lock_slot_offset = 0;
1949 int lock_offset = -1;
1950 if (method->is_synchronized()) { // 5)
1951 lock_slot_offset = stack_slots;
1952 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size;
1953 stack_slots += VMRegImpl::slots_per_word;
1954 }
1956 int workspace_slot_offset = stack_slots; // 6)
1957 stack_slots += 2;
1959 // Now compute actual number of stack words we need.
1960 // Rounding to make stack properly aligned.
1961 stack_slots = round_to(stack_slots, // 7)
1962 frame::alignment_in_bytes / VMRegImpl::stack_slot_size);
1963 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size;
1966 // Now we can start generating code.
1967 // --------------------------------------------------------------------------
1969 intptr_t start_pc = (intptr_t)__ pc();
1970 intptr_t vep_start_pc;
1971 intptr_t frame_done_pc;
1972 intptr_t oopmap_pc;
1974 Label ic_miss;
1975 Label handle_pending_exception;
1977 Register r_callers_sp = R21;
1978 Register r_temp_1 = R22;
1979 Register r_temp_2 = R23;
1980 Register r_temp_3 = R24;
1981 Register r_temp_4 = R25;
1982 Register r_temp_5 = R26;
1983 Register r_temp_6 = R27;
1984 Register r_return_pc = R28;
1986 Register r_carg1_jnienv = noreg;
1987 Register r_carg2_classorobject = noreg;
1988 if (!is_critical_native) {
1989 r_carg1_jnienv = out_regs[0].first()->as_Register();
1990 r_carg2_classorobject = out_regs[1].first()->as_Register();
1991 }
1994 // Generate the Unverified Entry Point (UEP).
1995 // --------------------------------------------------------------------------
1996 assert(start_pc == (intptr_t)__ pc(), "uep must be at start");
1998 // Check ic: object class == cached class?
1999 if (!method_is_static) {
2000 Register ic = as_Register(Matcher::inline_cache_reg_encode());
2001 Register receiver_klass = r_temp_1;
2003 __ cmpdi(CCR0, R3_ARG1, 0);
2004 __ beq(CCR0, ic_miss);
2005 __ verify_oop(R3_ARG1);
2006 __ load_klass(receiver_klass, R3_ARG1);
2008 __ cmpd(CCR0, receiver_klass, ic);
2009 __ bne(CCR0, ic_miss);
2010 }
2013 // Generate the Verified Entry Point (VEP).
2014 // --------------------------------------------------------------------------
2015 vep_start_pc = (intptr_t)__ pc();
2017 __ save_LR_CR(r_temp_1);
2018 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame.
2019 __ mr(r_callers_sp, R1_SP); // Remember frame pointer.
2020 __ push_frame(frame_size_in_bytes, r_temp_1); // Push the c2n adapter's frame.
2021 frame_done_pc = (intptr_t)__ pc();
2023 // Native nmethod wrappers never take possesion of the oop arguments.
2024 // So the caller will gc the arguments.
2025 // The only thing we need an oopMap for is if the call is static.
2026 //
2027 // An OopMap for lock (and class if static), and one for the VM call itself.
2028 OopMapSet *oop_maps = new OopMapSet();
2029 OopMap *oop_map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2031 if (is_critical_native) {
2032 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, oop_handle_slot_offset, oop_maps, in_regs, in_sig_bt, r_temp_1);
2033 }
2035 // Move arguments from register/stack to register/stack.
2036 // --------------------------------------------------------------------------
2037 //
2038 // We immediately shuffle the arguments so that for any vm call we have
2039 // to make from here on out (sync slow path, jvmti, etc.) we will have
2040 // captured the oops from our caller and have a valid oopMap for them.
2041 //
2042 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
2043 // (derived from JavaThread* which is in R16_thread) and, if static,
2044 // the class mirror instead of a receiver. This pretty much guarantees that
2045 // register layout will not match. We ignore these extra arguments during
2046 // the shuffle. The shuffle is described by the two calling convention
2047 // vectors we have in our possession. We simply walk the java vector to
2048 // get the source locations and the c vector to get the destinations.
2050 // Record sp-based slot for receiver on stack for non-static methods.
2051 int receiver_offset = -1;
2053 // We move the arguments backward because the floating point registers
2054 // destination will always be to a register with a greater or equal
2055 // register number or the stack.
2056 // in is the index of the incoming Java arguments
2057 // out is the index of the outgoing C arguments
2059 #ifdef ASSERT
2060 bool reg_destroyed[RegisterImpl::number_of_registers];
2061 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2062 for (int r = 0 ; r < RegisterImpl::number_of_registers ; r++) {
2063 reg_destroyed[r] = false;
2064 }
2065 for (int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++) {
2066 freg_destroyed[f] = false;
2067 }
2068 #endif // ASSERT
2070 for (int in = total_in_args - 1, out = total_c_args - 1; in >= 0 ; in--, out--) {
2072 #ifdef ASSERT
2073 if (in_regs[in].first()->is_Register()) {
2074 assert(!reg_destroyed[in_regs[in].first()->as_Register()->encoding()], "ack!");
2075 } else if (in_regs[in].first()->is_FloatRegister()) {
2076 assert(!freg_destroyed[in_regs[in].first()->as_FloatRegister()->encoding()], "ack!");
2077 }
2078 if (out_regs[out].first()->is_Register()) {
2079 reg_destroyed[out_regs[out].first()->as_Register()->encoding()] = true;
2080 } else if (out_regs[out].first()->is_FloatRegister()) {
2081 freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true;
2082 }
2083 if (out_regs2[out].first()->is_Register()) {
2084 reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true;
2085 } else if (out_regs2[out].first()->is_FloatRegister()) {
2086 freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true;
2087 }
2088 #endif // ASSERT
2090 switch (in_sig_bt[in]) {
2091 case T_BOOLEAN:
2092 case T_CHAR:
2093 case T_BYTE:
2094 case T_SHORT:
2095 case T_INT:
2096 guarantee(in > 0 && in_sig_bt[in-1] == T_LONG,
2097 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
2098 break;
2099 case T_LONG:
2100 if (in_sig_bt[in+1] == T_VOID) {
2101 long_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2102 } else {
2103 guarantee(in_sig_bt[in+1] == T_BOOLEAN || in_sig_bt[in+1] == T_CHAR ||
2104 in_sig_bt[in+1] == T_BYTE || in_sig_bt[in+1] == T_SHORT ||
2105 in_sig_bt[in+1] == T_INT,
2106 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
2107 int_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2108 }
2109 break;
2110 case T_ARRAY:
2111 if (is_critical_native) {
2112 int body_arg = out;
2113 out -= 2; // Point to length arg. PPC64: pass ints as longs.
2114 unpack_array_argument(masm, in_regs[in], in_elem_bt[in], out_regs[body_arg], out_regs[out],
2115 r_callers_sp, r_temp_1, r_temp_2);
2116 break;
2117 }
2118 case T_OBJECT:
2119 assert(!is_critical_native, "no oop arguments");
2120 object_move(masm, stack_slots,
2121 oop_map, oop_handle_slot_offset,
2122 ((in == 0) && (!method_is_static)), &receiver_offset,
2123 in_regs[in], out_regs[out],
2124 r_callers_sp, r_temp_1, r_temp_2);
2125 break;
2126 case T_VOID:
2127 break;
2128 case T_FLOAT:
2129 float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2130 if (out_regs2[out].first()->is_valid()) {
2131 float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2132 }
2133 break;
2134 case T_DOUBLE:
2135 double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2136 if (out_regs2[out].first()->is_valid()) {
2137 double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2138 }
2139 break;
2140 case T_ADDRESS:
2141 fatal("found type (T_ADDRESS) in java args");
2142 break;
2143 default:
2144 ShouldNotReachHere();
2145 break;
2146 }
2147 }
2149 // Pre-load a static method's oop into ARG2.
2150 // Used both by locking code and the normal JNI call code.
2151 if (method_is_static && !is_critical_native) {
2152 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()),
2153 r_carg2_classorobject);
2155 // Now handlize the static class mirror in carg2. It's known not-null.
2156 __ std(r_carg2_classorobject, klass_offset, R1_SP);
2157 oop_map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2158 __ addi(r_carg2_classorobject, R1_SP, klass_offset);
2159 }
2161 // Get JNIEnv* which is first argument to native.
2162 if (!is_critical_native) {
2163 __ addi(r_carg1_jnienv, R16_thread, in_bytes(JavaThread::jni_environment_offset()));
2164 }
2166 // NOTE:
2167 //
2168 // We have all of the arguments setup at this point.
2169 // We MUST NOT touch any outgoing regs from this point on.
2170 // So if we must call out we must push a new frame.
2172 // Get current pc for oopmap, and load it patchable relative to global toc.
2173 oopmap_pc = (intptr_t) __ pc();
2174 __ calculate_address_from_global_toc(r_return_pc, (address)oopmap_pc, true, true, true, true);
2176 // We use the same pc/oopMap repeatedly when we call out.
2177 oop_maps->add_gc_map(oopmap_pc - start_pc, oop_map);
2179 // r_return_pc now has the pc loaded that we will use when we finally call
2180 // to native.
2182 // Make sure that thread is non-volatile; it crosses a bunch of VM calls below.
2183 assert(R16_thread->is_nonvolatile(), "thread must be in non-volatile register");
2186 # if 0
2187 // DTrace method entry
2188 # endif
2190 // Lock a synchronized method.
2191 // --------------------------------------------------------------------------
2193 if (method->is_synchronized()) {
2194 assert(!is_critical_native, "unhandled");
2195 ConditionRegister r_flag = CCR1;
2196 Register r_oop = r_temp_4;
2197 const Register r_box = r_temp_5;
2198 Label done, locked;
2200 // Load the oop for the object or class. r_carg2_classorobject contains
2201 // either the handlized oop from the incoming arguments or the handlized
2202 // class mirror (if the method is static).
2203 __ ld(r_oop, 0, r_carg2_classorobject);
2205 // Get the lock box slot's address.
2206 __ addi(r_box, R1_SP, lock_offset);
2208 # ifdef ASSERT
2209 if (UseBiasedLocking) {
2210 // Making the box point to itself will make it clear it went unused
2211 // but also be obviously invalid.
2212 __ std(r_box, 0, r_box);
2213 }
2214 # endif // ASSERT
2216 // Try fastpath for locking.
2217 // fast_lock kills r_temp_1, r_temp_2, r_temp_3.
2218 __ compiler_fast_lock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2219 __ beq(r_flag, locked);
2221 // None of the above fast optimizations worked so we have to get into the
2222 // slow case of monitor enter. Inline a special case of call_VM that
2223 // disallows any pending_exception.
2225 // Save argument registers and leave room for C-compatible ABI_REG_ARGS.
2226 int frame_size = frame::abi_reg_args_size +
2227 round_to(total_c_args * wordSize, frame::alignment_in_bytes);
2228 __ mr(R11_scratch1, R1_SP);
2229 RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2);
2231 // Do the call.
2232 __ set_last_Java_frame(R11_scratch1, r_return_pc);
2233 assert(r_return_pc->is_nonvolatile(), "expecting return pc to be in non-volatile register");
2234 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread);
2235 __ reset_last_Java_frame();
2237 RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2);
2239 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2240 "no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C", 0);
2242 __ bind(locked);
2243 }
2246 // Publish thread state
2247 // --------------------------------------------------------------------------
2249 // Use that pc we placed in r_return_pc a while back as the current frame anchor.
2250 __ set_last_Java_frame(R1_SP, r_return_pc);
2252 // Transition from _thread_in_Java to _thread_in_native.
2253 __ li(R0, _thread_in_native);
2254 __ release();
2255 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2256 __ stw(R0, thread_(thread_state));
2257 if (UseMembar) {
2258 __ fence();
2259 }
2262 // The JNI call
2263 // --------------------------------------------------------------------------
2264 #if defined(ABI_ELFv2)
2265 __ call_c(native_func, relocInfo::runtime_call_type);
2266 #else
2267 FunctionDescriptor* fd_native_method = (FunctionDescriptor*) native_func;
2268 __ call_c(fd_native_method, relocInfo::runtime_call_type);
2269 #endif
2272 // Now, we are back from the native code.
2275 // Unpack the native result.
2276 // --------------------------------------------------------------------------
2278 // For int-types, we do any needed sign-extension required.
2279 // Care must be taken that the return values (R3_RET and F1_RET)
2280 // will survive any VM calls for blocking or unlocking.
2281 // An OOP result (handle) is done specially in the slow-path code.
2283 switch (ret_type) {
2284 case T_VOID: break; // Nothing to do!
2285 case T_FLOAT: break; // Got it where we want it (unless slow-path).
2286 case T_DOUBLE: break; // Got it where we want it (unless slow-path).
2287 case T_LONG: break; // Got it where we want it (unless slow-path).
2288 case T_OBJECT: break; // Really a handle.
2289 // Cannot de-handlize until after reclaiming jvm_lock.
2290 case T_ARRAY: break;
2292 case T_BOOLEAN: { // 0 -> false(0); !0 -> true(1)
2293 Label skip_modify;
2294 __ cmpwi(CCR0, R3_RET, 0);
2295 __ beq(CCR0, skip_modify);
2296 __ li(R3_RET, 1);
2297 __ bind(skip_modify);
2298 break;
2299 }
2300 case T_BYTE: { // sign extension
2301 __ extsb(R3_RET, R3_RET);
2302 break;
2303 }
2304 case T_CHAR: { // unsigned result
2305 __ andi(R3_RET, R3_RET, 0xffff);
2306 break;
2307 }
2308 case T_SHORT: { // sign extension
2309 __ extsh(R3_RET, R3_RET);
2310 break;
2311 }
2312 case T_INT: // nothing to do
2313 break;
2314 default:
2315 ShouldNotReachHere();
2316 break;
2317 }
2320 // Publish thread state
2321 // --------------------------------------------------------------------------
2323 // Switch thread to "native transition" state before reading the
2324 // synchronization state. This additional state is necessary because reading
2325 // and testing the synchronization state is not atomic w.r.t. GC, as this
2326 // scenario demonstrates:
2327 // - Java thread A, in _thread_in_native state, loads _not_synchronized
2328 // and is preempted.
2329 // - VM thread changes sync state to synchronizing and suspends threads
2330 // for GC.
2331 // - Thread A is resumed to finish this native method, but doesn't block
2332 // here since it didn't see any synchronization in progress, and escapes.
2334 // Transition from _thread_in_native to _thread_in_native_trans.
2335 __ li(R0, _thread_in_native_trans);
2336 __ release();
2337 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2338 __ stw(R0, thread_(thread_state));
2341 // Must we block?
2342 // --------------------------------------------------------------------------
2344 // Block, if necessary, before resuming in _thread_in_Java state.
2345 // In order for GC to work, don't clear the last_Java_sp until after blocking.
2346 Label after_transition;
2347 {
2348 Label no_block, sync;
2350 if (os::is_MP()) {
2351 if (UseMembar) {
2352 // Force this write out before the read below.
2353 __ fence();
2354 } else {
2355 // Write serialization page so VM thread can do a pseudo remote membar.
2356 // We use the current thread pointer to calculate a thread specific
2357 // offset to write to within the page. This minimizes bus traffic
2358 // due to cache line collision.
2359 __ serialize_memory(R16_thread, r_temp_4, r_temp_5);
2360 }
2361 }
2363 Register sync_state_addr = r_temp_4;
2364 Register sync_state = r_temp_5;
2365 Register suspend_flags = r_temp_6;
2367 __ load_const(sync_state_addr, SafepointSynchronize::address_of_state(), /*temp*/ sync_state);
2369 // TODO: PPC port assert(4 == SafepointSynchronize::sz_state(), "unexpected field size");
2370 __ lwz(sync_state, 0, sync_state_addr);
2372 // TODO: PPC port assert(4 == Thread::sz_suspend_flags(), "unexpected field size");
2373 __ lwz(suspend_flags, thread_(suspend_flags));
2375 __ acquire();
2377 Label do_safepoint;
2378 // No synchronization in progress nor yet synchronized.
2379 __ cmpwi(CCR0, sync_state, SafepointSynchronize::_not_synchronized);
2380 // Not suspended.
2381 __ cmpwi(CCR1, suspend_flags, 0);
2383 __ bne(CCR0, sync);
2384 __ beq(CCR1, no_block);
2386 // Block. Save any potential method result value before the operation and
2387 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this
2388 // lets us share the oopMap we used when we went native rather than create
2389 // a distinct one for this pc.
2390 __ bind(sync);
2392 address entry_point = is_critical_native
2393 ? CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)
2394 : CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans);
2395 save_native_result(masm, ret_type, workspace_slot_offset);
2396 __ call_VM_leaf(entry_point, R16_thread);
2397 restore_native_result(masm, ret_type, workspace_slot_offset);
2399 if (is_critical_native) {
2400 __ b(after_transition); // No thread state transition here.
2401 }
2402 __ bind(no_block);
2403 }
2405 // Publish thread state.
2406 // --------------------------------------------------------------------------
2408 // Thread state is thread_in_native_trans. Any safepoint blocking has
2409 // already happened so we can now change state to _thread_in_Java.
2411 // Transition from _thread_in_native_trans to _thread_in_Java.
2412 __ li(R0, _thread_in_Java);
2413 __ release();
2414 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2415 __ stw(R0, thread_(thread_state));
2416 if (UseMembar) {
2417 __ fence();
2418 }
2419 __ bind(after_transition);
2421 // Reguard any pages if necessary.
2422 // --------------------------------------------------------------------------
2424 Label no_reguard;
2425 __ lwz(r_temp_1, thread_(stack_guard_state));
2426 __ cmpwi(CCR0, r_temp_1, JavaThread::stack_guard_yellow_disabled);
2427 __ bne(CCR0, no_reguard);
2429 save_native_result(masm, ret_type, workspace_slot_offset);
2430 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2431 restore_native_result(masm, ret_type, workspace_slot_offset);
2433 __ bind(no_reguard);
2436 // Unlock
2437 // --------------------------------------------------------------------------
2439 if (method->is_synchronized()) {
2441 ConditionRegister r_flag = CCR1;
2442 const Register r_oop = r_temp_4;
2443 const Register r_box = r_temp_5;
2444 const Register r_exception = r_temp_6;
2445 Label done;
2447 // Get oop and address of lock object box.
2448 if (method_is_static) {
2449 assert(klass_offset != -1, "");
2450 __ ld(r_oop, klass_offset, R1_SP);
2451 } else {
2452 assert(receiver_offset != -1, "");
2453 __ ld(r_oop, receiver_offset, R1_SP);
2454 }
2455 __ addi(r_box, R1_SP, lock_offset);
2457 // Try fastpath for unlocking.
2458 __ compiler_fast_unlock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2459 __ beq(r_flag, done);
2461 // Save and restore any potential method result value around the unlocking operation.
2462 save_native_result(masm, ret_type, workspace_slot_offset);
2464 // Must save pending exception around the slow-path VM call. Since it's a
2465 // leaf call, the pending exception (if any) can be kept in a register.
2466 __ ld(r_exception, thread_(pending_exception));
2467 assert(r_exception->is_nonvolatile(), "exception register must be non-volatile");
2468 __ li(R0, 0);
2469 __ std(R0, thread_(pending_exception));
2471 // Slow case of monitor enter.
2472 // Inline a special case of call_VM that disallows any pending_exception.
2473 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), r_oop, r_box);
2475 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2476 "no pending exception allowed on exit from SharedRuntime::complete_monitor_unlocking_C", 0);
2478 restore_native_result(masm, ret_type, workspace_slot_offset);
2480 // Check_forward_pending_exception jump to forward_exception if any pending
2481 // exception is set. The forward_exception routine expects to see the
2482 // exception in pending_exception and not in a register. Kind of clumsy,
2483 // since all folks who branch to forward_exception must have tested
2484 // pending_exception first and hence have it in a register already.
2485 __ std(r_exception, thread_(pending_exception));
2487 __ bind(done);
2488 }
2490 # if 0
2491 // DTrace method exit
2492 # endif
2494 // Clear "last Java frame" SP and PC.
2495 // --------------------------------------------------------------------------
2497 __ reset_last_Java_frame();
2499 // Unpack oop result.
2500 // --------------------------------------------------------------------------
2502 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2503 Label skip_unboxing;
2504 __ cmpdi(CCR0, R3_RET, 0);
2505 __ beq(CCR0, skip_unboxing);
2506 __ ld(R3_RET, 0, R3_RET);
2507 __ bind(skip_unboxing);
2508 __ verify_oop(R3_RET);
2509 }
2512 // Reset handle block.
2513 // --------------------------------------------------------------------------
2514 if (!is_critical_native) {
2515 __ ld(r_temp_1, thread_(active_handles));
2516 // TODO: PPC port assert(4 == JNIHandleBlock::top_size_in_bytes(), "unexpected field size");
2517 __ li(r_temp_2, 0);
2518 __ stw(r_temp_2, JNIHandleBlock::top_offset_in_bytes(), r_temp_1);
2521 // Check for pending exceptions.
2522 // --------------------------------------------------------------------------
2523 __ ld(r_temp_2, thread_(pending_exception));
2524 __ cmpdi(CCR0, r_temp_2, 0);
2525 __ bne(CCR0, handle_pending_exception);
2526 }
2528 // Return
2529 // --------------------------------------------------------------------------
2531 __ pop_frame();
2532 __ restore_LR_CR(R11);
2533 __ blr();
2536 // Handler for pending exceptions (out-of-line).
2537 // --------------------------------------------------------------------------
2539 // Since this is a native call, we know the proper exception handler
2540 // is the empty function. We just pop this frame and then jump to
2541 // forward_exception_entry.
2542 if (!is_critical_native) {
2543 __ align(InteriorEntryAlignment);
2544 __ bind(handle_pending_exception);
2546 __ pop_frame();
2547 __ restore_LR_CR(R11);
2548 __ b64_patchable((address)StubRoutines::forward_exception_entry(),
2549 relocInfo::runtime_call_type);
2550 }
2552 // Handler for a cache miss (out-of-line).
2553 // --------------------------------------------------------------------------
2555 if (!method_is_static) {
2556 __ align(InteriorEntryAlignment);
2557 __ bind(ic_miss);
2559 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
2560 relocInfo::runtime_call_type);
2561 }
2563 // Done.
2564 // --------------------------------------------------------------------------
2566 __ flush();
2568 nmethod *nm = nmethod::new_native_nmethod(method,
2569 compile_id,
2570 masm->code(),
2571 vep_start_pc-start_pc,
2572 frame_done_pc-start_pc,
2573 stack_slots / VMRegImpl::slots_per_word,
2574 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2575 in_ByteSize(lock_offset),
2576 oop_maps);
2578 if (is_critical_native) {
2579 nm->set_lazy_critical_native(true);
2580 }
2582 return nm;
2583 #else
2584 ShouldNotReachHere();
2585 return NULL;
2586 #endif // COMPILER2
2587 }
2589 // This function returns the adjust size (in number of words) to a c2i adapter
2590 // activation for use during deoptimization.
2591 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2592 return round_to((callee_locals - callee_parameters) * Interpreter::stackElementWords, frame::alignment_in_bytes);
2593 }
2595 uint SharedRuntime::out_preserve_stack_slots() {
2596 #ifdef COMPILER2
2597 return frame::jit_out_preserve_size / VMRegImpl::stack_slot_size;
2598 #else
2599 return 0;
2600 #endif
2601 }
2603 #ifdef COMPILER2
2604 // Frame generation for deopt and uncommon trap blobs.
2605 static void push_skeleton_frame(MacroAssembler* masm, bool deopt,
2606 /* Read */
2607 Register unroll_block_reg,
2608 /* Update */
2609 Register frame_sizes_reg,
2610 Register number_of_frames_reg,
2611 Register pcs_reg,
2612 /* Invalidate */
2613 Register frame_size_reg,
2614 Register pc_reg) {
2616 __ ld(pc_reg, 0, pcs_reg);
2617 __ ld(frame_size_reg, 0, frame_sizes_reg);
2618 __ std(pc_reg, _abi(lr), R1_SP);
2619 __ push_frame(frame_size_reg, R0/*tmp*/);
2620 #ifdef CC_INTERP
2621 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2622 #else
2623 #ifdef ASSERT
2624 __ load_const_optimized(pc_reg, 0x5afe);
2625 __ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
2626 #endif
2627 __ std(R1_SP, _ijava_state_neg(sender_sp), R1_SP);
2628 #endif // CC_INTERP
2629 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
2630 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
2631 __ addi(pcs_reg, pcs_reg, wordSize);
2632 }
2634 // Loop through the UnrollBlock info and create new frames.
2635 static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
2636 /* read */
2637 Register unroll_block_reg,
2638 /* invalidate */
2639 Register frame_sizes_reg,
2640 Register number_of_frames_reg,
2641 Register pcs_reg,
2642 Register frame_size_reg,
2643 Register pc_reg) {
2644 Label loop;
2646 // _number_of_frames is of type int (deoptimization.hpp)
2647 __ lwa(number_of_frames_reg,
2648 Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(),
2649 unroll_block_reg);
2650 __ ld(pcs_reg,
2651 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(),
2652 unroll_block_reg);
2653 __ ld(frame_sizes_reg,
2654 Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(),
2655 unroll_block_reg);
2657 // stack: (caller_of_deoptee, ...).
2659 // At this point we either have an interpreter frame or a compiled
2660 // frame on top of stack. If it is a compiled frame we push a new c2i
2661 // adapter here
2663 // Memorize top-frame stack-pointer.
2664 __ mr(frame_size_reg/*old_sp*/, R1_SP);
2666 // Resize interpreter top frame OR C2I adapter.
2668 // At this moment, the top frame (which is the caller of the deoptee) is
2669 // an interpreter frame or a newly pushed C2I adapter or an entry frame.
2670 // The top frame has a TOP_IJAVA_FRAME_ABI and the frame contains the
2671 // outgoing arguments.
2672 //
2673 // In order to push the interpreter frame for the deoptee, we need to
2674 // resize the top frame such that we are able to place the deoptee's
2675 // locals in the frame.
2676 // Additionally, we have to turn the top frame's TOP_IJAVA_FRAME_ABI
2677 // into a valid PARENT_IJAVA_FRAME_ABI.
2679 __ lwa(R11_scratch1,
2680 Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(),
2681 unroll_block_reg);
2682 __ neg(R11_scratch1, R11_scratch1);
2684 // R11_scratch1 contains size of locals for frame resizing.
2685 // R12_scratch2 contains top frame's lr.
2687 // Resize frame by complete frame size prevents TOC from being
2688 // overwritten by locals. A more stack space saving way would be
2689 // to copy the TOC to its location in the new abi.
2690 __ addi(R11_scratch1, R11_scratch1, - frame::parent_ijava_frame_abi_size);
2692 // now, resize the frame
2693 __ resize_frame(R11_scratch1, pc_reg/*tmp*/);
2695 // In the case where we have resized a c2i frame above, the optional
2696 // alignment below the locals has size 32 (why?).
2697 __ std(R12_scratch2, _abi(lr), R1_SP);
2699 // Initialize initial_caller_sp.
2700 #ifdef CC_INTERP
2701 __ std(frame_size_reg/*old_sp*/, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2702 #else
2703 #ifdef ASSERT
2704 __ load_const_optimized(pc_reg, 0x5afe);
2705 __ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
2706 #endif
2707 __ std(frame_size_reg, _ijava_state_neg(sender_sp), R1_SP);
2708 #endif // CC_INTERP
2710 #ifdef ASSERT
2711 // Make sure that there is at least one entry in the array.
2712 __ cmpdi(CCR0, number_of_frames_reg, 0);
2713 __ asm_assert_ne("array_size must be > 0", 0x205);
2714 #endif
2716 // Now push the new interpreter frames.
2717 //
2718 __ bind(loop);
2719 // Allocate a new frame, fill in the pc.
2720 push_skeleton_frame(masm, deopt,
2721 unroll_block_reg,
2722 frame_sizes_reg,
2723 number_of_frames_reg,
2724 pcs_reg,
2725 frame_size_reg,
2726 pc_reg);
2727 __ cmpdi(CCR0, number_of_frames_reg, 0);
2728 __ bne(CCR0, loop);
2730 // Get the return address pointing into the frame manager.
2731 __ ld(R0, 0, pcs_reg);
2732 // Store it in the top interpreter frame.
2733 __ std(R0, _abi(lr), R1_SP);
2734 // Initialize frame_manager_lr of interpreter top frame.
2735 #ifdef CC_INTERP
2736 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP);
2737 #endif
2738 }
2739 #endif
2741 void SharedRuntime::generate_deopt_blob() {
2742 // Allocate space for the code
2743 ResourceMark rm;
2744 // Setup code generation tools
2745 CodeBuffer buffer("deopt_blob", 2048, 1024);
2746 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2747 Label exec_mode_initialized;
2748 int frame_size_in_words;
2749 OopMap* map = NULL;
2750 OopMapSet *oop_maps = new OopMapSet();
2752 // size of ABI112 plus spill slots for R3_RET and F1_RET.
2753 const int frame_size_in_bytes = frame::abi_reg_args_spill_size;
2754 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
2755 int first_frame_size_in_bytes = 0; // frame size of "unpack frame" for call to fetch_unroll_info.
2757 const Register exec_mode_reg = R21_tmp1;
2759 const address start = __ pc();
2761 #ifdef COMPILER2
2762 // --------------------------------------------------------------------------
2763 // Prolog for non exception case!
2765 // We have been called from the deopt handler of the deoptee.
2766 //
2767 // deoptee:
2768 // ...
2769 // call X
2770 // ...
2771 // deopt_handler: call_deopt_stub
2772 // cur. return pc --> ...
2773 //
2774 // So currently SR_LR points behind the call in the deopt handler.
2775 // We adjust it such that it points to the start of the deopt handler.
2776 // The return_pc has been stored in the frame of the deoptee and
2777 // will replace the address of the deopt_handler in the call
2778 // to Deoptimization::fetch_unroll_info below.
2779 // We can't grab a free register here, because all registers may
2780 // contain live values, so let the RegisterSaver do the adjustment
2781 // of the return pc.
2782 const int return_pc_adjustment_no_exception = -HandlerImpl::size_deopt_handler();
2784 // Push the "unpack frame"
2785 // Save everything in sight.
2786 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2787 &first_frame_size_in_bytes,
2788 /*generate_oop_map=*/ true,
2789 return_pc_adjustment_no_exception,
2790 RegisterSaver::return_pc_is_lr);
2791 assert(map != NULL, "OopMap must have been created");
2793 __ li(exec_mode_reg, Deoptimization::Unpack_deopt);
2794 // Save exec mode for unpack_frames.
2795 __ b(exec_mode_initialized);
2797 // --------------------------------------------------------------------------
2798 // Prolog for exception case
2800 // An exception is pending.
2801 // We have been called with a return (interpreter) or a jump (exception blob).
2802 //
2803 // - R3_ARG1: exception oop
2804 // - R4_ARG2: exception pc
2806 int exception_offset = __ pc() - start;
2808 BLOCK_COMMENT("Prolog for exception case");
2810 // The RegisterSaves doesn't need to adjust the return pc for this situation.
2811 const int return_pc_adjustment_exception = 0;
2813 // Push the "unpack frame".
2814 // Save everything in sight.
2815 assert(R4 == R4_ARG2, "exception pc must be in r4");
2816 RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2817 &first_frame_size_in_bytes,
2818 /*generate_oop_map=*/ false,
2819 return_pc_adjustment_exception,
2820 RegisterSaver::return_pc_is_r4);
2822 // Deopt during an exception. Save exec mode for unpack_frames.
2823 __ li(exec_mode_reg, Deoptimization::Unpack_exception);
2825 // Store exception oop and pc in thread (location known to GC).
2826 // This is needed since the call to "fetch_unroll_info()" may safepoint.
2827 __ std(R3_ARG1, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2828 __ std(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2830 // fall through
2832 // --------------------------------------------------------------------------
2833 __ BIND(exec_mode_initialized);
2835 {
2836 const Register unroll_block_reg = R22_tmp2;
2838 // We need to set `last_Java_frame' because `fetch_unroll_info' will
2839 // call `last_Java_frame()'. The value of the pc in the frame is not
2840 // particularly important. It just needs to identify this blob.
2841 __ set_last_Java_frame(R1_SP, noreg);
2843 // With EscapeAnalysis turned on, this call may safepoint!
2844 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), R16_thread);
2845 address calls_return_pc = __ last_calls_return_pc();
2846 // Set an oopmap for the call site that describes all our saved registers.
2847 oop_maps->add_gc_map(calls_return_pc - start, map);
2849 __ reset_last_Java_frame();
2850 // Save the return value.
2851 __ mr(unroll_block_reg, R3_RET);
2853 // Restore only the result registers that have been saved
2854 // by save_volatile_registers(...).
2855 RegisterSaver::restore_result_registers(masm, first_frame_size_in_bytes);
2857 // In excp_deopt_mode, restore and clear exception oop which we
2858 // stored in the thread during exception entry above. The exception
2859 // oop will be the return value of this stub.
2860 Label skip_restore_excp;
2861 __ cmpdi(CCR0, exec_mode_reg, Deoptimization::Unpack_exception);
2862 __ bne(CCR0, skip_restore_excp);
2863 __ ld(R3_RET, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2864 __ ld(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2865 __ li(R0, 0);
2866 __ std(R0, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2867 __ std(R0, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2868 __ BIND(skip_restore_excp);
2870 // reload narrro_oop_base
2871 if (UseCompressedOops && Universe::narrow_oop_base() != 0) {
2872 __ load_const_optimized(R30, Universe::narrow_oop_base());
2873 }
2875 __ pop_frame();
2877 // stack: (deoptee, optional i2c, caller of deoptee, ...).
2879 // pop the deoptee's frame
2880 __ pop_frame();
2882 // stack: (caller_of_deoptee, ...).
2884 // Loop through the `UnrollBlock' info and create interpreter frames.
2885 push_skeleton_frames(masm, true/*deopt*/,
2886 unroll_block_reg,
2887 R23_tmp3,
2888 R24_tmp4,
2889 R25_tmp5,
2890 R26_tmp6,
2891 R27_tmp7);
2893 // stack: (skeletal interpreter frame, ..., optional skeletal
2894 // interpreter frame, optional c2i, caller of deoptee, ...).
2895 }
2897 // push an `unpack_frame' taking care of float / int return values.
2898 __ push_frame(frame_size_in_bytes, R0/*tmp*/);
2900 // stack: (unpack frame, skeletal interpreter frame, ..., optional
2901 // skeletal interpreter frame, optional c2i, caller of deoptee,
2902 // ...).
2904 // Spill live volatile registers since we'll do a call.
2905 __ std( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2906 __ stfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2908 // Let the unpacker layout information in the skeletal frames just
2909 // allocated.
2910 __ get_PC_trash_LR(R3_RET);
2911 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R3_RET);
2912 // This is a call to a LEAF method, so no oop map is required.
2913 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
2914 R16_thread/*thread*/, exec_mode_reg/*exec_mode*/);
2915 __ reset_last_Java_frame();
2917 // Restore the volatiles saved above.
2918 __ ld( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2919 __ lfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2921 // Pop the unpack frame.
2922 __ pop_frame();
2923 __ restore_LR_CR(R0);
2925 // stack: (top interpreter frame, ..., optional interpreter frame,
2926 // optional c2i, caller of deoptee, ...).
2928 // Initialize R14_state.
2929 #ifdef CC_INTERP
2930 __ ld(R14_state, 0, R1_SP);
2931 __ addi(R14_state, R14_state, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
2932 // Also inititialize R15_prev_state.
2933 __ restore_prev_state();
2934 #else
2935 __ restore_interpreter_state(R11_scratch1);
2936 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
2937 #endif // CC_INTERP
2940 // Return to the interpreter entry point.
2941 __ blr();
2942 __ flush();
2943 #else // COMPILER2
2944 __ unimplemented("deopt blob needed only with compiler");
2945 int exception_offset = __ pc() - start;
2946 #endif // COMPILER2
2948 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, 0, first_frame_size_in_bytes / wordSize);
2949 }
2951 #ifdef COMPILER2
2952 void SharedRuntime::generate_uncommon_trap_blob() {
2953 // Allocate space for the code.
2954 ResourceMark rm;
2955 // Setup code generation tools.
2956 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2957 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2958 address start = __ pc();
2960 Register unroll_block_reg = R21_tmp1;
2961 Register klass_index_reg = R22_tmp2;
2962 Register unc_trap_reg = R23_tmp3;
2964 OopMapSet* oop_maps = new OopMapSet();
2965 int frame_size_in_bytes = frame::abi_reg_args_size;
2966 OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
2968 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
2970 // Push a dummy `unpack_frame' and call
2971 // `Deoptimization::uncommon_trap' to pack the compiled frame into a
2972 // vframe array and return the `UnrollBlock' information.
2974 // Save LR to compiled frame.
2975 __ save_LR_CR(R11_scratch1);
2977 // Push an "uncommon_trap" frame.
2978 __ push_frame_reg_args(0, R11_scratch1);
2980 // stack: (unpack frame, deoptee, optional i2c, caller_of_deoptee, ...).
2982 // Set the `unpack_frame' as last_Java_frame.
2983 // `Deoptimization::uncommon_trap' expects it and considers its
2984 // sender frame as the deoptee frame.
2985 // Remember the offset of the instruction whose address will be
2986 // moved to R11_scratch1.
2987 address gc_map_pc = __ get_PC_trash_LR(R11_scratch1);
2989 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
2991 __ mr(klass_index_reg, R3);
2992 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap),
2993 R16_thread, klass_index_reg);
2995 // Set an oopmap for the call site.
2996 oop_maps->add_gc_map(gc_map_pc - start, map);
2998 __ reset_last_Java_frame();
3000 // Pop the `unpack frame'.
3001 __ pop_frame();
3003 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
3005 // Save the return value.
3006 __ mr(unroll_block_reg, R3_RET);
3008 // Pop the uncommon_trap frame.
3009 __ pop_frame();
3011 // stack: (caller_of_deoptee, ...).
3013 // Allocate new interpreter frame(s) and possibly a c2i adapter
3014 // frame.
3015 push_skeleton_frames(masm, false/*deopt*/,
3016 unroll_block_reg,
3017 R22_tmp2,
3018 R23_tmp3,
3019 R24_tmp4,
3020 R25_tmp5,
3021 R26_tmp6);
3023 // stack: (skeletal interpreter frame, ..., optional skeletal
3024 // interpreter frame, optional c2i, caller of deoptee, ...).
3026 // Push a dummy `unpack_frame' taking care of float return values.
3027 // Call `Deoptimization::unpack_frames' to layout information in the
3028 // interpreter frames just created.
3030 // Push a simple "unpack frame" here.
3031 __ push_frame_reg_args(0, R11_scratch1);
3033 // stack: (unpack frame, skeletal interpreter frame, ..., optional
3034 // skeletal interpreter frame, optional c2i, caller of deoptee,
3035 // ...).
3037 // Set the "unpack_frame" as last_Java_frame.
3038 __ get_PC_trash_LR(R11_scratch1);
3039 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
3041 // Indicate it is the uncommon trap case.
3042 __ li(unc_trap_reg, Deoptimization::Unpack_uncommon_trap);
3043 // Let the unpacker layout information in the skeletal frames just
3044 // allocated.
3045 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
3046 R16_thread, unc_trap_reg);
3048 __ reset_last_Java_frame();
3049 // Pop the `unpack frame'.
3050 __ pop_frame();
3051 // Restore LR from top interpreter frame.
3052 __ restore_LR_CR(R11_scratch1);
3054 // stack: (top interpreter frame, ..., optional interpreter frame,
3055 // optional c2i, caller of deoptee, ...).
3057 #ifdef CC_INTERP
3058 // Initialize R14_state, ...
3059 __ ld(R11_scratch1, 0, R1_SP);
3060 __ addi(R14_state, R11_scratch1, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
3061 // also initialize R15_prev_state.
3062 __ restore_prev_state();
3063 #else
3064 __ restore_interpreter_state(R11_scratch1);
3065 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
3066 #endif // CC_INTERP
3068 // Return to the interpreter entry point.
3069 __ blr();
3071 masm->flush();
3073 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, frame_size_in_bytes/wordSize);
3074 }
3075 #endif // COMPILER2
3077 // Generate a special Compile2Runtime blob that saves all registers, and setup oopmap.
3078 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3079 assert(StubRoutines::forward_exception_entry() != NULL,
3080 "must be generated before");
3082 ResourceMark rm;
3083 OopMapSet *oop_maps = new OopMapSet();
3084 OopMap* map;
3086 // Allocate space for the code. Setup code generation tools.
3087 CodeBuffer buffer("handler_blob", 2048, 1024);
3088 MacroAssembler* masm = new MacroAssembler(&buffer);
3090 address start = __ pc();
3091 int frame_size_in_bytes = 0;
3093 RegisterSaver::ReturnPCLocation return_pc_location;
3094 bool cause_return = (poll_type == POLL_AT_RETURN);
3095 if (cause_return) {
3096 // Nothing to do here. The frame has already been popped in MachEpilogNode.
3097 // Register LR already contains the return pc.
3098 return_pc_location = RegisterSaver::return_pc_is_lr;
3099 } else {
3100 // Use thread()->saved_exception_pc() as return pc.
3101 return_pc_location = RegisterSaver::return_pc_is_thread_saved_exception_pc;
3102 }
3104 // Save registers, fpu state, and flags.
3105 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3106 &frame_size_in_bytes,
3107 /*generate_oop_map=*/ true,
3108 /*return_pc_adjustment=*/0,
3109 return_pc_location);
3111 // The following is basically a call_VM. However, we need the precise
3112 // address of the call in order to generate an oopmap. Hence, we do all the
3113 // work outselves.
3114 __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg);
3116 // The return address must always be correct so that the frame constructor
3117 // never sees an invalid pc.
3119 // Do the call
3120 __ call_VM_leaf(call_ptr, R16_thread);
3121 address calls_return_pc = __ last_calls_return_pc();
3123 // Set an oopmap for the call site. This oopmap will map all
3124 // oop-registers and debug-info registers as callee-saved. This
3125 // will allow deoptimization at this safepoint to find all possible
3126 // debug-info recordings, as well as let GC find all oops.
3127 oop_maps->add_gc_map(calls_return_pc - start, map);
3129 Label noException;
3131 // Clear the last Java frame.
3132 __ reset_last_Java_frame();
3134 BLOCK_COMMENT(" Check pending exception.");
3135 const Register pending_exception = R0;
3136 __ ld(pending_exception, thread_(pending_exception));
3137 __ cmpdi(CCR0, pending_exception, 0);
3138 __ beq(CCR0, noException);
3140 // Exception pending
3141 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3142 frame_size_in_bytes,
3143 /*restore_ctr=*/true);
3145 BLOCK_COMMENT(" Jump to forward_exception_entry.");
3146 // Jump to forward_exception_entry, with the issuing PC in LR
3147 // so it looks like the original nmethod called forward_exception_entry.
3148 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3150 // No exception case.
3151 __ BIND(noException);
3154 // Normal exit, restore registers and exit.
3155 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3156 frame_size_in_bytes,
3157 /*restore_ctr=*/true);
3159 __ blr();
3161 // Make sure all code is generated
3162 masm->flush();
3164 // Fill-out other meta info
3165 // CodeBlob frame size is in words.
3166 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_bytes / wordSize);
3167 }
3169 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss)
3170 //
3171 // Generate a stub that calls into the vm to find out the proper destination
3172 // of a java call. All the argument registers are live at this point
3173 // but since this is generic code we don't know what they are and the caller
3174 // must do any gc of the args.
3175 //
3176 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3178 // allocate space for the code
3179 ResourceMark rm;
3181 CodeBuffer buffer(name, 1000, 512);
3182 MacroAssembler* masm = new MacroAssembler(&buffer);
3184 int frame_size_in_bytes;
3186 OopMapSet *oop_maps = new OopMapSet();
3187 OopMap* map = NULL;
3189 address start = __ pc();
3191 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3192 &frame_size_in_bytes,
3193 /*generate_oop_map*/ true,
3194 /*return_pc_adjustment*/ 0,
3195 RegisterSaver::return_pc_is_lr);
3197 // Use noreg as last_Java_pc, the return pc will be reconstructed
3198 // from the physical frame.
3199 __ set_last_Java_frame(/*sp*/R1_SP, noreg);
3201 int frame_complete = __ offset();
3203 // Pass R19_method as 2nd (optional) argument, used by
3204 // counter_overflow_stub.
3205 __ call_VM_leaf(destination, R16_thread, R19_method);
3206 address calls_return_pc = __ last_calls_return_pc();
3207 // Set an oopmap for the call site.
3208 // We need this not only for callee-saved registers, but also for volatile
3209 // registers that the compiler might be keeping live across a safepoint.
3210 // Create the oopmap for the call's return pc.
3211 oop_maps->add_gc_map(calls_return_pc - start, map);
3213 // R3_RET contains the address we are going to jump to assuming no exception got installed.
3215 // clear last_Java_sp
3216 __ reset_last_Java_frame();
3218 // Check for pending exceptions.
3219 BLOCK_COMMENT("Check for pending exceptions.");
3220 Label pending;
3221 __ ld(R11_scratch1, thread_(pending_exception));
3222 __ cmpdi(CCR0, R11_scratch1, 0);
3223 __ bne(CCR0, pending);
3225 __ mtctr(R3_RET); // Ctr will not be touched by restore_live_registers_and_pop_frame.
3227 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ false);
3229 // Get the returned method.
3230 __ get_vm_result_2(R19_method);
3232 __ bctr();
3235 // Pending exception after the safepoint.
3236 __ BIND(pending);
3238 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ true);
3240 // exception pending => remove activation and forward to exception handler
3242 __ li(R11_scratch1, 0);
3243 __ ld(R3_ARG1, thread_(pending_exception));
3244 __ std(R11_scratch1, in_bytes(JavaThread::vm_result_offset()), R16_thread);
3245 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3247 // -------------
3248 // Make sure all code is generated.
3249 masm->flush();
3251 // return the blob
3252 // frame_size_words or bytes??
3253 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_bytes/wordSize,
3254 oop_maps, true);
3255 }