Thu, 06 Mar 2014 10:55:28 -0800
8035647: PPC64: Support for elf v2 abi.
Summary: ELFv2 ABI used by the little endian PowerPC64 on Linux.
Reviewed-by: kvn
Contributed-by: asmundak@google.com
1 /*
2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2013 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_ppc.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
44 #define __ masm->
46 #ifdef PRODUCT
47 #define BLOCK_COMMENT(str) // nothing
48 #else
49 #define BLOCK_COMMENT(str) __ block_comment(str)
50 #endif
52 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
55 // Used by generate_deopt_blob. Defined in .ad file.
56 extern uint size_deopt_handler();
59 class RegisterSaver {
60 // Used for saving volatile registers.
61 public:
63 // Support different return pc locations.
64 enum ReturnPCLocation {
65 return_pc_is_lr,
66 return_pc_is_r4,
67 return_pc_is_thread_saved_exception_pc
68 };
70 static OopMap* push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
71 int* out_frame_size_in_bytes,
72 bool generate_oop_map,
73 int return_pc_adjustment,
74 ReturnPCLocation return_pc_location);
75 static void restore_live_registers_and_pop_frame(MacroAssembler* masm,
76 int frame_size_in_bytes,
77 bool restore_ctr);
79 static void push_frame_and_save_argument_registers(MacroAssembler* masm,
80 Register r_temp,
81 int frame_size,
82 int total_args,
83 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
84 static void restore_argument_registers_and_pop_frame(MacroAssembler*masm,
85 int frame_size,
86 int total_args,
87 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
89 // During deoptimization only the result registers need to be restored
90 // all the other values have already been extracted.
91 static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes);
93 // Constants and data structures:
95 typedef enum {
96 int_reg = 0,
97 float_reg = 1,
98 special_reg = 2
99 } RegisterType;
101 typedef enum {
102 reg_size = 8,
103 half_reg_size = reg_size / 2,
104 } RegisterConstants;
106 typedef struct {
107 RegisterType reg_type;
108 int reg_num;
109 VMReg vmreg;
110 } LiveRegType;
111 };
114 #define RegisterSaver_LiveSpecialReg(regname) \
115 { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }
117 #define RegisterSaver_LiveIntReg(regname) \
118 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() }
120 #define RegisterSaver_LiveFloatReg(regname) \
121 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() }
123 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
124 // Live registers which get spilled to the stack. Register
125 // positions in this array correspond directly to the stack layout.
127 //
128 // live special registers:
129 //
130 RegisterSaver_LiveSpecialReg(SR_CTR),
131 //
132 // live float registers:
133 //
134 RegisterSaver_LiveFloatReg( F0 ),
135 RegisterSaver_LiveFloatReg( F1 ),
136 RegisterSaver_LiveFloatReg( F2 ),
137 RegisterSaver_LiveFloatReg( F3 ),
138 RegisterSaver_LiveFloatReg( F4 ),
139 RegisterSaver_LiveFloatReg( F5 ),
140 RegisterSaver_LiveFloatReg( F6 ),
141 RegisterSaver_LiveFloatReg( F7 ),
142 RegisterSaver_LiveFloatReg( F8 ),
143 RegisterSaver_LiveFloatReg( F9 ),
144 RegisterSaver_LiveFloatReg( F10 ),
145 RegisterSaver_LiveFloatReg( F11 ),
146 RegisterSaver_LiveFloatReg( F12 ),
147 RegisterSaver_LiveFloatReg( F13 ),
148 RegisterSaver_LiveFloatReg( F14 ),
149 RegisterSaver_LiveFloatReg( F15 ),
150 RegisterSaver_LiveFloatReg( F16 ),
151 RegisterSaver_LiveFloatReg( F17 ),
152 RegisterSaver_LiveFloatReg( F18 ),
153 RegisterSaver_LiveFloatReg( F19 ),
154 RegisterSaver_LiveFloatReg( F20 ),
155 RegisterSaver_LiveFloatReg( F21 ),
156 RegisterSaver_LiveFloatReg( F22 ),
157 RegisterSaver_LiveFloatReg( F23 ),
158 RegisterSaver_LiveFloatReg( F24 ),
159 RegisterSaver_LiveFloatReg( F25 ),
160 RegisterSaver_LiveFloatReg( F26 ),
161 RegisterSaver_LiveFloatReg( F27 ),
162 RegisterSaver_LiveFloatReg( F28 ),
163 RegisterSaver_LiveFloatReg( F29 ),
164 RegisterSaver_LiveFloatReg( F30 ),
165 RegisterSaver_LiveFloatReg( F31 ),
166 //
167 // live integer registers:
168 //
169 RegisterSaver_LiveIntReg( R0 ),
170 //RegisterSaver_LiveIntReg( R1 ), // stack pointer
171 RegisterSaver_LiveIntReg( R2 ),
172 RegisterSaver_LiveIntReg( R3 ),
173 RegisterSaver_LiveIntReg( R4 ),
174 RegisterSaver_LiveIntReg( R5 ),
175 RegisterSaver_LiveIntReg( R6 ),
176 RegisterSaver_LiveIntReg( R7 ),
177 RegisterSaver_LiveIntReg( R8 ),
178 RegisterSaver_LiveIntReg( R9 ),
179 RegisterSaver_LiveIntReg( R10 ),
180 RegisterSaver_LiveIntReg( R11 ),
181 RegisterSaver_LiveIntReg( R12 ),
182 //RegisterSaver_LiveIntReg( R13 ), // system thread id
183 RegisterSaver_LiveIntReg( R14 ),
184 RegisterSaver_LiveIntReg( R15 ),
185 RegisterSaver_LiveIntReg( R16 ),
186 RegisterSaver_LiveIntReg( R17 ),
187 RegisterSaver_LiveIntReg( R18 ),
188 RegisterSaver_LiveIntReg( R19 ),
189 RegisterSaver_LiveIntReg( R20 ),
190 RegisterSaver_LiveIntReg( R21 ),
191 RegisterSaver_LiveIntReg( R22 ),
192 RegisterSaver_LiveIntReg( R23 ),
193 RegisterSaver_LiveIntReg( R24 ),
194 RegisterSaver_LiveIntReg( R25 ),
195 RegisterSaver_LiveIntReg( R26 ),
196 RegisterSaver_LiveIntReg( R27 ),
197 RegisterSaver_LiveIntReg( R28 ),
198 RegisterSaver_LiveIntReg( R29 ),
199 RegisterSaver_LiveIntReg( R31 ),
200 RegisterSaver_LiveIntReg( R30 ), // r30 must be the last register
201 };
203 OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
204 int* out_frame_size_in_bytes,
205 bool generate_oop_map,
206 int return_pc_adjustment,
207 ReturnPCLocation return_pc_location) {
208 // Push an abi_reg_args-frame and store all registers which may be live.
209 // If requested, create an OopMap: Record volatile registers as
210 // callee-save values in an OopMap so their save locations will be
211 // propagated to the RegisterMap of the caller frame during
212 // StackFrameStream construction (needed for deoptimization; see
213 // compiledVFrame::create_stack_value).
214 // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.
216 int i;
217 int offset;
219 // calcualte frame size
220 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
221 sizeof(RegisterSaver::LiveRegType);
222 const int register_save_size = regstosave_num * reg_size;
223 const int frame_size_in_bytes = round_to(register_save_size, frame::alignment_in_bytes)
224 + frame::abi_reg_args_size;
225 *out_frame_size_in_bytes = frame_size_in_bytes;
226 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
227 const int register_save_offset = frame_size_in_bytes - register_save_size;
229 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
230 OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL;
232 BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");
234 // Save r30 in the last slot of the not yet pushed frame so that we
235 // can use it as scratch reg.
236 __ std(R30, -reg_size, R1_SP);
237 assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size),
238 "consistency check");
240 // save the flags
241 // Do the save_LR_CR by hand and adjust the return pc if requested.
242 __ mfcr(R30);
243 __ std(R30, _abi(cr), R1_SP);
244 switch (return_pc_location) {
245 case return_pc_is_lr: __ mflr(R30); break;
246 case return_pc_is_r4: __ mr(R30, R4); break;
247 case return_pc_is_thread_saved_exception_pc:
248 __ ld(R30, thread_(saved_exception_pc)); break;
249 default: ShouldNotReachHere();
250 }
251 if (return_pc_adjustment != 0)
252 __ addi(R30, R30, return_pc_adjustment);
253 __ std(R30, _abi(lr), R1_SP);
255 // push a new frame
256 __ push_frame(frame_size_in_bytes, R30);
258 // save all registers (ints and floats)
259 offset = register_save_offset;
260 for (int i = 0; i < regstosave_num; i++) {
261 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
262 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
264 switch (reg_type) {
265 case RegisterSaver::int_reg: {
266 if (reg_num != 30) { // We spilled R30 right at the beginning.
267 __ std(as_Register(reg_num), offset, R1_SP);
268 }
269 break;
270 }
271 case RegisterSaver::float_reg: {
272 __ stfd(as_FloatRegister(reg_num), offset, R1_SP);
273 break;
274 }
275 case RegisterSaver::special_reg: {
276 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
277 __ mfctr(R30);
278 __ std(R30, offset, R1_SP);
279 } else {
280 Unimplemented();
281 }
282 break;
283 }
284 default:
285 ShouldNotReachHere();
286 }
288 if (generate_oop_map) {
289 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
290 RegisterSaver_LiveRegs[i].vmreg);
291 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),
292 RegisterSaver_LiveRegs[i].vmreg->next());
293 }
294 offset += reg_size;
295 }
297 BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");
299 // And we're done.
300 return map;
301 }
304 // Pop the current frame and restore all the registers that we
305 // saved.
306 void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
307 int frame_size_in_bytes,
308 bool restore_ctr) {
309 int i;
310 int offset;
311 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
312 sizeof(RegisterSaver::LiveRegType);
313 const int register_save_size = regstosave_num * reg_size;
314 const int register_save_offset = frame_size_in_bytes - register_save_size;
316 BLOCK_COMMENT("restore_live_registers_and_pop_frame {");
318 // restore all registers (ints and floats)
319 offset = register_save_offset;
320 for (int i = 0; i < regstosave_num; i++) {
321 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
322 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
324 switch (reg_type) {
325 case RegisterSaver::int_reg: {
326 if (reg_num != 30) // R30 restored at the end, it's the tmp reg!
327 __ ld(as_Register(reg_num), offset, R1_SP);
328 break;
329 }
330 case RegisterSaver::float_reg: {
331 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
332 break;
333 }
334 case RegisterSaver::special_reg: {
335 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
336 if (restore_ctr) { // Nothing to do here if ctr already contains the next address.
337 __ ld(R30, offset, R1_SP);
338 __ mtctr(R30);
339 }
340 } else {
341 Unimplemented();
342 }
343 break;
344 }
345 default:
346 ShouldNotReachHere();
347 }
348 offset += reg_size;
349 }
351 // pop the frame
352 __ pop_frame();
354 // restore the flags
355 __ restore_LR_CR(R30);
357 // restore scratch register's value
358 __ ld(R30, -reg_size, R1_SP);
360 BLOCK_COMMENT("} restore_live_registers_and_pop_frame");
361 }
363 void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp,
364 int frame_size,int total_args, const VMRegPair *regs,
365 const VMRegPair *regs2) {
366 __ push_frame(frame_size, r_temp);
367 int st_off = frame_size - wordSize;
368 for (int i = 0; i < total_args; i++) {
369 VMReg r_1 = regs[i].first();
370 VMReg r_2 = regs[i].second();
371 if (!r_1->is_valid()) {
372 assert(!r_2->is_valid(), "");
373 continue;
374 }
375 if (r_1->is_Register()) {
376 Register r = r_1->as_Register();
377 __ std(r, st_off, R1_SP);
378 st_off -= wordSize;
379 } else if (r_1->is_FloatRegister()) {
380 FloatRegister f = r_1->as_FloatRegister();
381 __ stfd(f, st_off, R1_SP);
382 st_off -= wordSize;
383 }
384 }
385 if (regs2 != NULL) {
386 for (int i = 0; i < total_args; i++) {
387 VMReg r_1 = regs2[i].first();
388 VMReg r_2 = regs2[i].second();
389 if (!r_1->is_valid()) {
390 assert(!r_2->is_valid(), "");
391 continue;
392 }
393 if (r_1->is_Register()) {
394 Register r = r_1->as_Register();
395 __ std(r, st_off, R1_SP);
396 st_off -= wordSize;
397 } else if (r_1->is_FloatRegister()) {
398 FloatRegister f = r_1->as_FloatRegister();
399 __ stfd(f, st_off, R1_SP);
400 st_off -= wordSize;
401 }
402 }
403 }
404 }
406 void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size,
407 int total_args, const VMRegPair *regs,
408 const VMRegPair *regs2) {
409 int st_off = frame_size - wordSize;
410 for (int i = 0; i < total_args; i++) {
411 VMReg r_1 = regs[i].first();
412 VMReg r_2 = regs[i].second();
413 if (r_1->is_Register()) {
414 Register r = r_1->as_Register();
415 __ ld(r, st_off, R1_SP);
416 st_off -= wordSize;
417 } else if (r_1->is_FloatRegister()) {
418 FloatRegister f = r_1->as_FloatRegister();
419 __ lfd(f, st_off, R1_SP);
420 st_off -= wordSize;
421 }
422 }
423 if (regs2 != NULL)
424 for (int i = 0; i < total_args; i++) {
425 VMReg r_1 = regs2[i].first();
426 VMReg r_2 = regs2[i].second();
427 if (r_1->is_Register()) {
428 Register r = r_1->as_Register();
429 __ ld(r, st_off, R1_SP);
430 st_off -= wordSize;
431 } else if (r_1->is_FloatRegister()) {
432 FloatRegister f = r_1->as_FloatRegister();
433 __ lfd(f, st_off, R1_SP);
434 st_off -= wordSize;
435 }
436 }
437 __ pop_frame();
438 }
440 // Restore the registers that might be holding a result.
441 void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {
442 int i;
443 int offset;
444 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
445 sizeof(RegisterSaver::LiveRegType);
446 const int register_save_size = regstosave_num * reg_size;
447 const int register_save_offset = frame_size_in_bytes - register_save_size;
449 // restore all result registers (ints and floats)
450 offset = register_save_offset;
451 for (int i = 0; i < regstosave_num; i++) {
452 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
453 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
454 switch (reg_type) {
455 case RegisterSaver::int_reg: {
456 if (as_Register(reg_num)==R3_RET) // int result_reg
457 __ ld(as_Register(reg_num), offset, R1_SP);
458 break;
459 }
460 case RegisterSaver::float_reg: {
461 if (as_FloatRegister(reg_num)==F1_RET) // float result_reg
462 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
463 break;
464 }
465 case RegisterSaver::special_reg: {
466 // Special registers don't hold a result.
467 break;
468 }
469 default:
470 ShouldNotReachHere();
471 }
472 offset += reg_size;
473 }
474 }
476 // Is vector's size (in bytes) bigger than a size saved by default?
477 bool SharedRuntime::is_wide_vector(int size) {
478 ResourceMark rm;
479 // Note, MaxVectorSize == 8 on PPC64.
480 assert(size <= 8, err_msg_res("%d bytes vectors are not supported", size));
481 return size > 8;
482 }
483 #ifdef COMPILER2
484 static int reg2slot(VMReg r) {
485 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();
486 }
488 static int reg2offset(VMReg r) {
489 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
490 }
491 #endif
493 // ---------------------------------------------------------------------------
494 // Read the array of BasicTypes from a signature, and compute where the
495 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
496 // quantities. Values less than VMRegImpl::stack0 are registers, those above
497 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
498 // as framesizes are fixed.
499 // VMRegImpl::stack0 refers to the first slot 0(sp).
500 // and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register
501 // up to RegisterImpl::number_of_registers) are the 64-bit
502 // integer registers.
504 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
505 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
506 // units regardless of build. Of course for i486 there is no 64 bit build
508 // The Java calling convention is a "shifted" version of the C ABI.
509 // By skipping the first C ABI register we can call non-static jni methods
510 // with small numbers of arguments without having to shuffle the arguments
511 // at all. Since we control the java ABI we ought to at least get some
512 // advantage out of it.
514 const VMReg java_iarg_reg[8] = {
515 R3->as_VMReg(),
516 R4->as_VMReg(),
517 R5->as_VMReg(),
518 R6->as_VMReg(),
519 R7->as_VMReg(),
520 R8->as_VMReg(),
521 R9->as_VMReg(),
522 R10->as_VMReg()
523 };
525 const VMReg java_farg_reg[13] = {
526 F1->as_VMReg(),
527 F2->as_VMReg(),
528 F3->as_VMReg(),
529 F4->as_VMReg(),
530 F5->as_VMReg(),
531 F6->as_VMReg(),
532 F7->as_VMReg(),
533 F8->as_VMReg(),
534 F9->as_VMReg(),
535 F10->as_VMReg(),
536 F11->as_VMReg(),
537 F12->as_VMReg(),
538 F13->as_VMReg()
539 };
541 const int num_java_iarg_registers = sizeof(java_iarg_reg) / sizeof(java_iarg_reg[0]);
542 const int num_java_farg_registers = sizeof(java_farg_reg) / sizeof(java_farg_reg[0]);
544 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
545 VMRegPair *regs,
546 int total_args_passed,
547 int is_outgoing) {
548 // C2c calling conventions for compiled-compiled calls.
549 // Put 8 ints/longs into registers _AND_ 13 float/doubles into
550 // registers _AND_ put the rest on the stack.
552 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats
553 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
555 int i;
556 VMReg reg;
557 int stk = 0;
558 int ireg = 0;
559 int freg = 0;
561 // We put the first 8 arguments into registers and the rest on the
562 // stack, float arguments are already in their argument registers
563 // due to c2c calling conventions (see calling_convention).
564 for (int i = 0; i < total_args_passed; ++i) {
565 switch(sig_bt[i]) {
566 case T_BOOLEAN:
567 case T_CHAR:
568 case T_BYTE:
569 case T_SHORT:
570 case T_INT:
571 if (ireg < num_java_iarg_registers) {
572 // Put int/ptr in register
573 reg = java_iarg_reg[ireg];
574 ++ireg;
575 } else {
576 // Put int/ptr on stack.
577 reg = VMRegImpl::stack2reg(stk);
578 stk += inc_stk_for_intfloat;
579 }
580 regs[i].set1(reg);
581 break;
582 case T_LONG:
583 assert(sig_bt[i+1] == T_VOID, "expecting half");
584 if (ireg < num_java_iarg_registers) {
585 // Put long in register.
586 reg = java_iarg_reg[ireg];
587 ++ireg;
588 } else {
589 // Put long on stack. They must be aligned to 2 slots.
590 if (stk & 0x1) ++stk;
591 reg = VMRegImpl::stack2reg(stk);
592 stk += inc_stk_for_longdouble;
593 }
594 regs[i].set2(reg);
595 break;
596 case T_OBJECT:
597 case T_ARRAY:
598 case T_ADDRESS:
599 if (ireg < num_java_iarg_registers) {
600 // Put ptr in register.
601 reg = java_iarg_reg[ireg];
602 ++ireg;
603 } else {
604 // Put ptr on stack. Objects must be aligned to 2 slots too,
605 // because "64-bit pointers record oop-ishness on 2 aligned
606 // adjacent registers." (see OopFlow::build_oop_map).
607 if (stk & 0x1) ++stk;
608 reg = VMRegImpl::stack2reg(stk);
609 stk += inc_stk_for_longdouble;
610 }
611 regs[i].set2(reg);
612 break;
613 case T_FLOAT:
614 if (freg < num_java_farg_registers) {
615 // Put float in register.
616 reg = java_farg_reg[freg];
617 ++freg;
618 } else {
619 // Put float on stack.
620 reg = VMRegImpl::stack2reg(stk);
621 stk += inc_stk_for_intfloat;
622 }
623 regs[i].set1(reg);
624 break;
625 case T_DOUBLE:
626 assert(sig_bt[i+1] == T_VOID, "expecting half");
627 if (freg < num_java_farg_registers) {
628 // Put double in register.
629 reg = java_farg_reg[freg];
630 ++freg;
631 } else {
632 // Put double on stack. They must be aligned to 2 slots.
633 if (stk & 0x1) ++stk;
634 reg = VMRegImpl::stack2reg(stk);
635 stk += inc_stk_for_longdouble;
636 }
637 regs[i].set2(reg);
638 break;
639 case T_VOID:
640 // Do not count halves.
641 regs[i].set_bad();
642 break;
643 default:
644 ShouldNotReachHere();
645 }
646 }
647 return round_to(stk, 2);
648 }
650 #ifdef COMPILER2
651 // Calling convention for calling C code.
652 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
653 VMRegPair *regs,
654 VMRegPair *regs2,
655 int total_args_passed) {
656 // Calling conventions for C runtime calls and calls to JNI native methods.
657 //
658 // PPC64 convention: Hoist the first 8 int/ptr/long's in the first 8
659 // int regs, leaving int regs undefined if the arg is flt/dbl. Hoist
660 // the first 13 flt/dbl's in the first 13 fp regs but additionally
661 // copy flt/dbl to the stack if they are beyond the 8th argument.
663 const VMReg iarg_reg[8] = {
664 R3->as_VMReg(),
665 R4->as_VMReg(),
666 R5->as_VMReg(),
667 R6->as_VMReg(),
668 R7->as_VMReg(),
669 R8->as_VMReg(),
670 R9->as_VMReg(),
671 R10->as_VMReg()
672 };
674 const VMReg farg_reg[13] = {
675 F1->as_VMReg(),
676 F2->as_VMReg(),
677 F3->as_VMReg(),
678 F4->as_VMReg(),
679 F5->as_VMReg(),
680 F6->as_VMReg(),
681 F7->as_VMReg(),
682 F8->as_VMReg(),
683 F9->as_VMReg(),
684 F10->as_VMReg(),
685 F11->as_VMReg(),
686 F12->as_VMReg(),
687 F13->as_VMReg()
688 };
690 // Check calling conventions consistency.
691 assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
692 sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
693 "consistency");
695 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
696 // 2 such slots, like 64 bit values do.
697 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
698 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
700 int i;
701 VMReg reg;
702 // Leave room for C-compatible ABI_REG_ARGS.
703 int stk = (frame::abi_reg_args_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
704 int arg = 0;
705 int freg = 0;
707 // Avoid passing C arguments in the wrong stack slots.
708 #if defined(ABI_ELFv2)
709 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 96,
710 "passing C arguments in wrong stack slots");
711 #else
712 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112,
713 "passing C arguments in wrong stack slots");
714 #endif
715 // We fill-out regs AND regs2 if an argument must be passed in a
716 // register AND in a stack slot. If regs2 is NULL in such a
717 // situation, we bail-out with a fatal error.
718 for (int i = 0; i < total_args_passed; ++i, ++arg) {
719 // Initialize regs2 to BAD.
720 if (regs2 != NULL) regs2[i].set_bad();
722 switch(sig_bt[i]) {
724 //
725 // If arguments 0-7 are integers, they are passed in integer registers.
726 // Argument i is placed in iarg_reg[i].
727 //
728 case T_BOOLEAN:
729 case T_CHAR:
730 case T_BYTE:
731 case T_SHORT:
732 case T_INT:
733 // We must cast ints to longs and use full 64 bit stack slots
734 // here. We do the cast in GraphKit::gen_stub() and just guard
735 // here against loosing that change.
736 assert(CCallingConventionRequiresIntsAsLongs,
737 "argument of type int should be promoted to type long");
738 guarantee(i > 0 && sig_bt[i-1] == T_LONG,
739 "argument of type (bt) should have been promoted to type (T_LONG,bt) for bt in "
740 "{T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
741 // Do not count halves.
742 regs[i].set_bad();
743 --arg;
744 break;
745 case T_LONG:
746 guarantee(sig_bt[i+1] == T_VOID ||
747 sig_bt[i+1] == T_BOOLEAN || sig_bt[i+1] == T_CHAR ||
748 sig_bt[i+1] == T_BYTE || sig_bt[i+1] == T_SHORT ||
749 sig_bt[i+1] == T_INT,
750 "expecting type (T_LONG,half) or type (T_LONG,bt) with bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
751 case T_OBJECT:
752 case T_ARRAY:
753 case T_ADDRESS:
754 case T_METADATA:
755 // Oops are already boxed if required (JNI).
756 if (arg < Argument::n_int_register_parameters_c) {
757 reg = iarg_reg[arg];
758 } else {
759 reg = VMRegImpl::stack2reg(stk);
760 stk += inc_stk_for_longdouble;
761 }
762 regs[i].set2(reg);
763 break;
765 //
766 // Floats are treated differently from int regs: The first 13 float arguments
767 // are passed in registers (not the float args among the first 13 args).
768 // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
769 // in farg_reg[j] if argument i is the j-th float argument of this call.
770 //
771 case T_FLOAT:
772 if (freg < Argument::n_float_register_parameters_c) {
773 // Put float in register ...
774 reg = farg_reg[freg];
775 ++freg;
777 // Argument i for i > 8 is placed on the stack even if it's
778 // placed in a register (if it's a float arg). Aix disassembly
779 // shows that xlC places these float args on the stack AND in
780 // a register. This is not documented, but we follow this
781 // convention, too.
782 if (arg >= Argument::n_regs_not_on_stack_c) {
783 // ... and on the stack.
784 guarantee(regs2 != NULL, "must pass float in register and stack slot");
785 VMReg reg2 = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
786 regs2[i].set1(reg2);
787 stk += inc_stk_for_intfloat;
788 }
790 } else {
791 // Put float on stack.
792 reg = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
793 stk += inc_stk_for_intfloat;
794 }
795 regs[i].set1(reg);
796 break;
797 case T_DOUBLE:
798 assert(sig_bt[i+1] == T_VOID, "expecting half");
799 if (freg < Argument::n_float_register_parameters_c) {
800 // Put double in register ...
801 reg = farg_reg[freg];
802 ++freg;
804 // Argument i for i > 8 is placed on the stack even if it's
805 // placed in a register (if it's a double arg). Aix disassembly
806 // shows that xlC places these float args on the stack AND in
807 // a register. This is not documented, but we follow this
808 // convention, too.
809 if (arg >= Argument::n_regs_not_on_stack_c) {
810 // ... and on the stack.
811 guarantee(regs2 != NULL, "must pass float in register and stack slot");
812 VMReg reg2 = VMRegImpl::stack2reg(stk);
813 regs2[i].set2(reg2);
814 stk += inc_stk_for_longdouble;
815 }
816 } else {
817 // Put double on stack.
818 reg = VMRegImpl::stack2reg(stk);
819 stk += inc_stk_for_longdouble;
820 }
821 regs[i].set2(reg);
822 break;
824 case T_VOID:
825 // Do not count halves.
826 regs[i].set_bad();
827 --arg;
828 break;
829 default:
830 ShouldNotReachHere();
831 }
832 }
834 return round_to(stk, 2);
835 }
836 #endif // COMPILER2
838 static address gen_c2i_adapter(MacroAssembler *masm,
839 int total_args_passed,
840 int comp_args_on_stack,
841 const BasicType *sig_bt,
842 const VMRegPair *regs,
843 Label& call_interpreter,
844 const Register& ientry) {
846 address c2i_entrypoint;
848 const Register sender_SP = R21_sender_SP; // == R21_tmp1
849 const Register code = R22_tmp2;
850 //const Register ientry = R23_tmp3;
851 const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 };
852 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
853 int value_regs_index = 0;
855 const Register return_pc = R27_tmp7;
856 const Register tmp = R28_tmp8;
858 assert_different_registers(sender_SP, code, ientry, return_pc, tmp);
860 // Adapter needs TOP_IJAVA_FRAME_ABI.
861 const int adapter_size = frame::top_ijava_frame_abi_size +
862 round_to(total_args_passed * wordSize, frame::alignment_in_bytes);
864 // regular (verified) c2i entry point
865 c2i_entrypoint = __ pc();
867 // Does compiled code exists? If yes, patch the caller's callsite.
868 __ ld(code, method_(code));
869 __ cmpdi(CCR0, code, 0);
870 __ ld(ientry, method_(interpreter_entry)); // preloaded
871 __ beq(CCR0, call_interpreter);
874 // Patch caller's callsite, method_(code) was not NULL which means that
875 // compiled code exists.
876 __ mflr(return_pc);
877 __ std(return_pc, _abi(lr), R1_SP);
878 RegisterSaver::push_frame_and_save_argument_registers(masm, tmp, adapter_size, total_args_passed, regs);
880 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), R19_method, return_pc);
882 RegisterSaver::restore_argument_registers_and_pop_frame(masm, adapter_size, total_args_passed, regs);
883 __ ld(return_pc, _abi(lr), R1_SP);
884 __ ld(ientry, method_(interpreter_entry)); // preloaded
885 __ mtlr(return_pc);
888 // Call the interpreter.
889 __ BIND(call_interpreter);
890 __ mtctr(ientry);
892 // Get a copy of the current SP for loading caller's arguments.
893 __ mr(sender_SP, R1_SP);
895 // Add space for the adapter.
896 __ resize_frame(-adapter_size, R12_scratch2);
898 int st_off = adapter_size - wordSize;
900 // Write the args into the outgoing interpreter space.
901 for (int i = 0; i < total_args_passed; i++) {
902 VMReg r_1 = regs[i].first();
903 VMReg r_2 = regs[i].second();
904 if (!r_1->is_valid()) {
905 assert(!r_2->is_valid(), "");
906 continue;
907 }
908 if (r_1->is_stack()) {
909 Register tmp_reg = value_regs[value_regs_index];
910 value_regs_index = (value_regs_index + 1) % num_value_regs;
911 // The calling convention produces OptoRegs that ignore the out
912 // preserve area (JIT's ABI). We must account for it here.
913 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
914 if (!r_2->is_valid()) {
915 __ lwz(tmp_reg, ld_off, sender_SP);
916 } else {
917 __ ld(tmp_reg, ld_off, sender_SP);
918 }
919 // Pretend stack targets were loaded into tmp_reg.
920 r_1 = tmp_reg->as_VMReg();
921 }
923 if (r_1->is_Register()) {
924 Register r = r_1->as_Register();
925 if (!r_2->is_valid()) {
926 __ stw(r, st_off, R1_SP);
927 st_off-=wordSize;
928 } else {
929 // Longs are given 2 64-bit slots in the interpreter, but the
930 // data is passed in only 1 slot.
931 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
932 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
933 st_off-=wordSize;
934 }
935 __ std(r, st_off, R1_SP);
936 st_off-=wordSize;
937 }
938 } else {
939 assert(r_1->is_FloatRegister(), "");
940 FloatRegister f = r_1->as_FloatRegister();
941 if (!r_2->is_valid()) {
942 __ stfs(f, st_off, R1_SP);
943 st_off-=wordSize;
944 } else {
945 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
946 // data is passed in only 1 slot.
947 // One of these should get known junk...
948 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
949 st_off-=wordSize;
950 __ stfd(f, st_off, R1_SP);
951 st_off-=wordSize;
952 }
953 }
954 }
956 // Jump to the interpreter just as if interpreter was doing it.
958 #ifdef CC_INTERP
959 const Register tos = R17_tos;
960 #endif
962 // load TOS
963 __ addi(tos, R1_SP, st_off);
965 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
966 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
967 __ bctr();
969 return c2i_entrypoint;
970 }
972 static void gen_i2c_adapter(MacroAssembler *masm,
973 int total_args_passed,
974 int comp_args_on_stack,
975 const BasicType *sig_bt,
976 const VMRegPair *regs) {
978 // Load method's entry-point from methodOop.
979 __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
980 __ mtctr(R12_scratch2);
982 // We will only enter here from an interpreted frame and never from after
983 // passing thru a c2i. Azul allowed this but we do not. If we lose the
984 // race and use a c2i we will remain interpreted for the race loser(s).
985 // This removes all sorts of headaches on the x86 side and also eliminates
986 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
988 // Note: r13 contains the senderSP on entry. We must preserve it since
989 // we may do a i2c -> c2i transition if we lose a race where compiled
990 // code goes non-entrant while we get args ready.
991 // In addition we use r13 to locate all the interpreter args as
992 // we must align the stack to 16 bytes on an i2c entry else we
993 // lose alignment we expect in all compiled code and register
994 // save code can segv when fxsave instructions find improperly
995 // aligned stack pointer.
997 #ifdef CC_INTERP
998 const Register ld_ptr = R17_tos;
999 #endif
1000 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
1001 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
1002 int value_regs_index = 0;
1004 int ld_offset = total_args_passed*wordSize;
1006 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
1007 // in registers, we will occasionally have no stack args.
1008 int comp_words_on_stack = 0;
1009 if (comp_args_on_stack) {
1010 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1011 // registers are below. By subtracting stack0, we either get a negative
1012 // number (all values in registers) or the maximum stack slot accessed.
1014 // Convert 4-byte c2 stack slots to words.
1015 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1016 // Round up to miminum stack alignment, in wordSize.
1017 comp_words_on_stack = round_to(comp_words_on_stack, 2);
1018 __ resize_frame(-comp_words_on_stack * wordSize, R11_scratch1);
1019 }
1021 // Now generate the shuffle code. Pick up all register args and move the
1022 // rest through register value=Z_R12.
1023 BLOCK_COMMENT("Shuffle arguments");
1024 for (int i = 0; i < total_args_passed; i++) {
1025 if (sig_bt[i] == T_VOID) {
1026 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
1027 continue;
1028 }
1030 // Pick up 0, 1 or 2 words from ld_ptr.
1031 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
1032 "scrambled load targets?");
1033 VMReg r_1 = regs[i].first();
1034 VMReg r_2 = regs[i].second();
1035 if (!r_1->is_valid()) {
1036 assert(!r_2->is_valid(), "");
1037 continue;
1038 }
1039 if (r_1->is_FloatRegister()) {
1040 if (!r_2->is_valid()) {
1041 __ lfs(r_1->as_FloatRegister(), ld_offset, ld_ptr);
1042 ld_offset-=wordSize;
1043 } else {
1044 // Skip the unused interpreter slot.
1045 __ lfd(r_1->as_FloatRegister(), ld_offset-wordSize, ld_ptr);
1046 ld_offset-=2*wordSize;
1047 }
1048 } else {
1049 Register r;
1050 if (r_1->is_stack()) {
1051 // Must do a memory to memory move thru "value".
1052 r = value_regs[value_regs_index];
1053 value_regs_index = (value_regs_index + 1) % num_value_regs;
1054 } else {
1055 r = r_1->as_Register();
1056 }
1057 if (!r_2->is_valid()) {
1058 // Not sure we need to do this but it shouldn't hurt.
1059 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ADDRESS || sig_bt[i] == T_ARRAY) {
1060 __ ld(r, ld_offset, ld_ptr);
1061 ld_offset-=wordSize;
1062 } else {
1063 __ lwz(r, ld_offset, ld_ptr);
1064 ld_offset-=wordSize;
1065 }
1066 } else {
1067 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
1068 // data is passed in only 1 slot.
1069 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
1070 ld_offset-=wordSize;
1071 }
1072 __ ld(r, ld_offset, ld_ptr);
1073 ld_offset-=wordSize;
1074 }
1076 if (r_1->is_stack()) {
1077 // Now store value where the compiler expects it
1078 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size;
1080 if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN ||
1081 sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) {
1082 __ stw(r, st_off, R1_SP);
1083 } else {
1084 __ std(r, st_off, R1_SP);
1085 }
1086 }
1087 }
1088 }
1090 BLOCK_COMMENT("Store method oop");
1091 // Store method oop into thread->callee_target.
1092 // We might end up in handle_wrong_method if the callee is
1093 // deoptimized as we race thru here. If that happens we don't want
1094 // to take a safepoint because the caller frame will look
1095 // interpreted and arguments are now "compiled" so it is much better
1096 // to make this transition invisible to the stack walking
1097 // code. Unfortunately if we try and find the callee by normal means
1098 // a safepoint is possible. So we stash the desired callee in the
1099 // thread and the vm will find there should this case occur.
1100 __ std(R19_method, thread_(callee_target));
1102 // Jump to the compiled code just as if compiled code was doing it.
1103 __ bctr();
1104 }
1106 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1107 int total_args_passed,
1108 int comp_args_on_stack,
1109 const BasicType *sig_bt,
1110 const VMRegPair *regs,
1111 AdapterFingerPrint* fingerprint) {
1112 address i2c_entry;
1113 address c2i_unverified_entry;
1114 address c2i_entry;
1117 // entry: i2c
1119 __ align(CodeEntryAlignment);
1120 i2c_entry = __ pc();
1121 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
1124 // entry: c2i unverified
1126 __ align(CodeEntryAlignment);
1127 BLOCK_COMMENT("c2i unverified entry");
1128 c2i_unverified_entry = __ pc();
1130 // inline_cache contains a compiledICHolder
1131 const Register ic = R19_method;
1132 const Register ic_klass = R11_scratch1;
1133 const Register receiver_klass = R12_scratch2;
1134 const Register code = R21_tmp1;
1135 const Register ientry = R23_tmp3;
1137 assert_different_registers(ic, ic_klass, receiver_klass, R3_ARG1, code, ientry);
1138 assert(R11_scratch1 == R11, "need prologue scratch register");
1140 Label call_interpreter;
1142 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()),
1143 "klass offset should reach into any page");
1144 // Check for NULL argument if we don't have implicit null checks.
1145 if (!ImplicitNullChecks || !os::zero_page_read_protected()) {
1146 if (TrapBasedNullChecks) {
1147 __ trap_null_check(R3_ARG1);
1148 } else {
1149 Label valid;
1150 __ cmpdi(CCR0, R3_ARG1, 0);
1151 __ bne_predict_taken(CCR0, valid);
1152 // We have a null argument, branch to ic_miss_stub.
1153 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1154 relocInfo::runtime_call_type);
1155 __ BIND(valid);
1156 }
1157 }
1158 // Assume argument is not NULL, load klass from receiver.
1159 __ load_klass(receiver_klass, R3_ARG1);
1161 __ ld(ic_klass, CompiledICHolder::holder_klass_offset(), ic);
1163 if (TrapBasedICMissChecks) {
1164 __ trap_ic_miss_check(receiver_klass, ic_klass);
1165 } else {
1166 Label valid;
1167 __ cmpd(CCR0, receiver_klass, ic_klass);
1168 __ beq_predict_taken(CCR0, valid);
1169 // We have an unexpected klass, branch to ic_miss_stub.
1170 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1171 relocInfo::runtime_call_type);
1172 __ BIND(valid);
1173 }
1175 // Argument is valid and klass is as expected, continue.
1177 // Extract method from inline cache, verified entry point needs it.
1178 __ ld(R19_method, CompiledICHolder::holder_method_offset(), ic);
1179 assert(R19_method == ic, "the inline cache register is dead here");
1181 __ ld(code, method_(code));
1182 __ cmpdi(CCR0, code, 0);
1183 __ ld(ientry, method_(interpreter_entry)); // preloaded
1184 __ beq_predict_taken(CCR0, call_interpreter);
1186 // Branch to ic_miss_stub.
1187 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1189 // entry: c2i
1191 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
1193 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1194 }
1196 #ifdef COMPILER2
1197 // An oop arg. Must pass a handle not the oop itself.
1198 static void object_move(MacroAssembler* masm,
1199 int frame_size_in_slots,
1200 OopMap* oop_map, int oop_handle_offset,
1201 bool is_receiver, int* receiver_offset,
1202 VMRegPair src, VMRegPair dst,
1203 Register r_caller_sp, Register r_temp_1, Register r_temp_2) {
1204 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)),
1205 "receiver has already been moved");
1207 // We must pass a handle. First figure out the location we use as a handle.
1209 if (src.first()->is_stack()) {
1210 // stack to stack or reg
1212 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1213 Label skip;
1214 const int oop_slot_in_callers_frame = reg2slot(src.first());
1216 guarantee(!is_receiver, "expecting receiver in register");
1217 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot_in_callers_frame + frame_size_in_slots));
1219 __ addi(r_handle, r_caller_sp, reg2offset(src.first()));
1220 __ ld( r_temp_2, reg2offset(src.first()), r_caller_sp);
1221 __ cmpdi(CCR0, r_temp_2, 0);
1222 __ bne(CCR0, skip);
1223 // Use a NULL handle if oop is NULL.
1224 __ li(r_handle, 0);
1225 __ bind(skip);
1227 if (dst.first()->is_stack()) {
1228 // stack to stack
1229 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1230 } else {
1231 // stack to reg
1232 // Nothing to do, r_handle is already the dst register.
1233 }
1234 } else {
1235 // reg to stack or reg
1236 const Register r_oop = src.first()->as_Register();
1237 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1238 const int oop_slot = (r_oop->encoding()-R3_ARG1->encoding()) * VMRegImpl::slots_per_word
1239 + oop_handle_offset; // in slots
1240 const int oop_offset = oop_slot * VMRegImpl::stack_slot_size;
1241 Label skip;
1243 if (is_receiver) {
1244 *receiver_offset = oop_offset;
1245 }
1246 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot));
1248 __ std( r_oop, oop_offset, R1_SP);
1249 __ addi(r_handle, R1_SP, oop_offset);
1251 __ cmpdi(CCR0, r_oop, 0);
1252 __ bne(CCR0, skip);
1253 // Use a NULL handle if oop is NULL.
1254 __ li(r_handle, 0);
1255 __ bind(skip);
1257 if (dst.first()->is_stack()) {
1258 // reg to stack
1259 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1260 } else {
1261 // reg to reg
1262 // Nothing to do, r_handle is already the dst register.
1263 }
1264 }
1265 }
1267 static void int_move(MacroAssembler*masm,
1268 VMRegPair src, VMRegPair dst,
1269 Register r_caller_sp, Register r_temp) {
1270 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long-int");
1271 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1273 if (src.first()->is_stack()) {
1274 if (dst.first()->is_stack()) {
1275 // stack to stack
1276 __ lwa(r_temp, reg2offset(src.first()), r_caller_sp);
1277 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1278 } else {
1279 // stack to reg
1280 __ lwa(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1281 }
1282 } else if (dst.first()->is_stack()) {
1283 // reg to stack
1284 __ extsw(r_temp, src.first()->as_Register());
1285 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1286 } else {
1287 // reg to reg
1288 __ extsw(dst.first()->as_Register(), src.first()->as_Register());
1289 }
1290 }
1292 static void long_move(MacroAssembler*masm,
1293 VMRegPair src, VMRegPair dst,
1294 Register r_caller_sp, Register r_temp) {
1295 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long");
1296 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1298 if (src.first()->is_stack()) {
1299 if (dst.first()->is_stack()) {
1300 // stack to stack
1301 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1302 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1303 } else {
1304 // stack to reg
1305 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1306 }
1307 } else if (dst.first()->is_stack()) {
1308 // reg to stack
1309 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1310 } else {
1311 // reg to reg
1312 if (dst.first()->as_Register() != src.first()->as_Register())
1313 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1314 }
1315 }
1317 static void float_move(MacroAssembler*masm,
1318 VMRegPair src, VMRegPair dst,
1319 Register r_caller_sp, Register r_temp) {
1320 assert(src.first()->is_valid() && !src.second()->is_valid(), "incoming must be float");
1321 assert(dst.first()->is_valid() && !dst.second()->is_valid(), "outgoing must be float");
1323 if (src.first()->is_stack()) {
1324 if (dst.first()->is_stack()) {
1325 // stack to stack
1326 __ lwz(r_temp, reg2offset(src.first()), r_caller_sp);
1327 __ stw(r_temp, reg2offset(dst.first()), R1_SP);
1328 } else {
1329 // stack to reg
1330 __ lfs(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1331 }
1332 } else if (dst.first()->is_stack()) {
1333 // reg to stack
1334 __ stfs(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1335 } else {
1336 // reg to reg
1337 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1338 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1339 }
1340 }
1342 static void double_move(MacroAssembler*masm,
1343 VMRegPair src, VMRegPair dst,
1344 Register r_caller_sp, Register r_temp) {
1345 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be double");
1346 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be double");
1348 if (src.first()->is_stack()) {
1349 if (dst.first()->is_stack()) {
1350 // stack to stack
1351 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1352 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1353 } else {
1354 // stack to reg
1355 __ lfd(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1356 }
1357 } else if (dst.first()->is_stack()) {
1358 // reg to stack
1359 __ stfd(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1360 } else {
1361 // reg to reg
1362 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1363 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1364 }
1365 }
1367 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1368 switch (ret_type) {
1369 case T_BOOLEAN:
1370 case T_CHAR:
1371 case T_BYTE:
1372 case T_SHORT:
1373 case T_INT:
1374 __ stw (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1375 break;
1376 case T_ARRAY:
1377 case T_OBJECT:
1378 case T_LONG:
1379 __ std (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1380 break;
1381 case T_FLOAT:
1382 __ stfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1383 break;
1384 case T_DOUBLE:
1385 __ stfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1386 break;
1387 case T_VOID:
1388 break;
1389 default:
1390 ShouldNotReachHere();
1391 break;
1392 }
1393 }
1395 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1396 switch (ret_type) {
1397 case T_BOOLEAN:
1398 case T_CHAR:
1399 case T_BYTE:
1400 case T_SHORT:
1401 case T_INT:
1402 __ lwz(R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1403 break;
1404 case T_ARRAY:
1405 case T_OBJECT:
1406 case T_LONG:
1407 __ ld (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1408 break;
1409 case T_FLOAT:
1410 __ lfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1411 break;
1412 case T_DOUBLE:
1413 __ lfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1414 break;
1415 case T_VOID:
1416 break;
1417 default:
1418 ShouldNotReachHere();
1419 break;
1420 }
1421 }
1423 static void save_or_restore_arguments(MacroAssembler* masm,
1424 const int stack_slots,
1425 const int total_in_args,
1426 const int arg_save_area,
1427 OopMap* map,
1428 VMRegPair* in_regs,
1429 BasicType* in_sig_bt) {
1430 // If map is non-NULL then the code should store the values,
1431 // otherwise it should load them.
1432 int slot = arg_save_area;
1433 // Save down double word first.
1434 for (int i = 0; i < total_in_args; i++) {
1435 if (in_regs[i].first()->is_FloatRegister() && in_sig_bt[i] == T_DOUBLE) {
1436 int offset = slot * VMRegImpl::stack_slot_size;
1437 slot += VMRegImpl::slots_per_word;
1438 assert(slot <= stack_slots, "overflow (after DOUBLE stack slot)");
1439 if (map != NULL) {
1440 __ stfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1441 } else {
1442 __ lfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1443 }
1444 } else if (in_regs[i].first()->is_Register() &&
1445 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1446 int offset = slot * VMRegImpl::stack_slot_size;
1447 if (map != NULL) {
1448 __ std(in_regs[i].first()->as_Register(), offset, R1_SP);
1449 if (in_sig_bt[i] == T_ARRAY) {
1450 map->set_oop(VMRegImpl::stack2reg(slot));
1451 }
1452 } else {
1453 __ ld(in_regs[i].first()->as_Register(), offset, R1_SP);
1454 }
1455 slot += VMRegImpl::slots_per_word;
1456 assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
1457 }
1458 }
1459 // Save or restore single word registers.
1460 for (int i = 0; i < total_in_args; i++) {
1461 // PPC64: pass ints as longs: must only deal with floats here.
1462 if (in_regs[i].first()->is_FloatRegister()) {
1463 if (in_sig_bt[i] == T_FLOAT) {
1464 int offset = slot * VMRegImpl::stack_slot_size;
1465 slot++;
1466 assert(slot <= stack_slots, "overflow (after FLOAT stack slot)");
1467 if (map != NULL) {
1468 __ stfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1469 } else {
1470 __ lfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1471 }
1472 }
1473 } else if (in_regs[i].first()->is_stack()) {
1474 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1475 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1476 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1477 }
1478 }
1479 }
1480 }
1482 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1483 // keeps a new JNI critical region from starting until a GC has been
1484 // forced. Save down any oops in registers and describe them in an
1485 // OopMap.
1486 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1487 const int stack_slots,
1488 const int total_in_args,
1489 const int arg_save_area,
1490 OopMapSet* oop_maps,
1491 VMRegPair* in_regs,
1492 BasicType* in_sig_bt,
1493 Register tmp_reg ) {
1494 __ block_comment("check GC_locker::needs_gc");
1495 Label cont;
1496 __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GC_locker::needs_gc_address());
1497 __ cmplwi(CCR0, tmp_reg, 0);
1498 __ beq(CCR0, cont);
1500 // Save down any values that are live in registers and call into the
1501 // runtime to halt for a GC.
1502 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1503 save_or_restore_arguments(masm, stack_slots, total_in_args,
1504 arg_save_area, map, in_regs, in_sig_bt);
1506 __ mr(R3_ARG1, R16_thread);
1507 __ set_last_Java_frame(R1_SP, noreg);
1509 __ block_comment("block_for_jni_critical");
1510 address entry_point = CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical);
1511 #if defined(ABI_ELFv2)
1512 __ call_c(entry_point, relocInfo::runtime_call_type);
1513 #else
1514 __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::runtime_call_type);
1515 #endif
1516 address start = __ pc() - __ offset(),
1517 calls_return_pc = __ last_calls_return_pc();
1518 oop_maps->add_gc_map(calls_return_pc - start, map);
1520 __ reset_last_Java_frame();
1522 // Reload all the register arguments.
1523 save_or_restore_arguments(masm, stack_slots, total_in_args,
1524 arg_save_area, NULL, in_regs, in_sig_bt);
1526 __ BIND(cont);
1528 #ifdef ASSERT
1529 if (StressCriticalJNINatives) {
1530 // Stress register saving.
1531 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1532 save_or_restore_arguments(masm, stack_slots, total_in_args,
1533 arg_save_area, map, in_regs, in_sig_bt);
1534 // Destroy argument registers.
1535 for (int i = 0; i < total_in_args; i++) {
1536 if (in_regs[i].first()->is_Register()) {
1537 const Register reg = in_regs[i].first()->as_Register();
1538 __ neg(reg, reg);
1539 } else if (in_regs[i].first()->is_FloatRegister()) {
1540 __ fneg(in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister());
1541 }
1542 }
1544 save_or_restore_arguments(masm, stack_slots, total_in_args,
1545 arg_save_area, NULL, in_regs, in_sig_bt);
1546 }
1547 #endif
1548 }
1550 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst, Register r_caller_sp, Register r_temp) {
1551 if (src.first()->is_stack()) {
1552 if (dst.first()->is_stack()) {
1553 // stack to stack
1554 __ ld(r_temp, reg2offset(src.first()), r_caller_sp);
1555 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1556 } else {
1557 // stack to reg
1558 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1559 }
1560 } else if (dst.first()->is_stack()) {
1561 // reg to stack
1562 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1563 } else {
1564 if (dst.first() != src.first()) {
1565 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1566 }
1567 }
1568 }
1570 // Unpack an array argument into a pointer to the body and the length
1571 // if the array is non-null, otherwise pass 0 for both.
1572 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type,
1573 VMRegPair body_arg, VMRegPair length_arg, Register r_caller_sp,
1574 Register tmp_reg, Register tmp2_reg) {
1575 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1576 "possible collision");
1577 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1578 "possible collision");
1580 // Pass the length, ptr pair.
1581 Label set_out_args;
1582 VMRegPair tmp, tmp2;
1583 tmp.set_ptr(tmp_reg->as_VMReg());
1584 tmp2.set_ptr(tmp2_reg->as_VMReg());
1585 if (reg.first()->is_stack()) {
1586 // Load the arg up from the stack.
1587 move_ptr(masm, reg, tmp, r_caller_sp, /*unused*/ R0);
1588 reg = tmp;
1589 }
1590 __ li(tmp2_reg, 0); // Pass zeros if Array=null.
1591 if (tmp_reg != reg.first()->as_Register()) __ li(tmp_reg, 0);
1592 __ cmpdi(CCR0, reg.first()->as_Register(), 0);
1593 __ beq(CCR0, set_out_args);
1594 __ lwa(tmp2_reg, arrayOopDesc::length_offset_in_bytes(), reg.first()->as_Register());
1595 __ addi(tmp_reg, reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type));
1596 __ bind(set_out_args);
1597 move_ptr(masm, tmp, body_arg, r_caller_sp, /*unused*/ R0);
1598 move_ptr(masm, tmp2, length_arg, r_caller_sp, /*unused*/ R0); // Same as move32_64 on PPC64.
1599 }
1601 static void verify_oop_args(MacroAssembler* masm,
1602 methodHandle method,
1603 const BasicType* sig_bt,
1604 const VMRegPair* regs) {
1605 Register temp_reg = R19_method; // not part of any compiled calling seq
1606 if (VerifyOops) {
1607 for (int i = 0; i < method->size_of_parameters(); i++) {
1608 if (sig_bt[i] == T_OBJECT ||
1609 sig_bt[i] == T_ARRAY) {
1610 VMReg r = regs[i].first();
1611 assert(r->is_valid(), "bad oop arg");
1612 if (r->is_stack()) {
1613 __ ld(temp_reg, reg2offset(r), R1_SP);
1614 __ verify_oop(temp_reg);
1615 } else {
1616 __ verify_oop(r->as_Register());
1617 }
1618 }
1619 }
1620 }
1621 }
1623 static void gen_special_dispatch(MacroAssembler* masm,
1624 methodHandle method,
1625 const BasicType* sig_bt,
1626 const VMRegPair* regs) {
1627 verify_oop_args(masm, method, sig_bt, regs);
1628 vmIntrinsics::ID iid = method->intrinsic_id();
1630 // Now write the args into the outgoing interpreter space
1631 bool has_receiver = false;
1632 Register receiver_reg = noreg;
1633 int member_arg_pos = -1;
1634 Register member_reg = noreg;
1635 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1636 if (ref_kind != 0) {
1637 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1638 member_reg = R19_method; // known to be free at this point
1639 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1640 } else if (iid == vmIntrinsics::_invokeBasic) {
1641 has_receiver = true;
1642 } else {
1643 fatal(err_msg_res("unexpected intrinsic id %d", iid));
1644 }
1646 if (member_reg != noreg) {
1647 // Load the member_arg into register, if necessary.
1648 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1649 VMReg r = regs[member_arg_pos].first();
1650 if (r->is_stack()) {
1651 __ ld(member_reg, reg2offset(r), R1_SP);
1652 } else {
1653 // no data motion is needed
1654 member_reg = r->as_Register();
1655 }
1656 }
1658 if (has_receiver) {
1659 // Make sure the receiver is loaded into a register.
1660 assert(method->size_of_parameters() > 0, "oob");
1661 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1662 VMReg r = regs[0].first();
1663 assert(r->is_valid(), "bad receiver arg");
1664 if (r->is_stack()) {
1665 // Porting note: This assumes that compiled calling conventions always
1666 // pass the receiver oop in a register. If this is not true on some
1667 // platform, pick a temp and load the receiver from stack.
1668 fatal("receiver always in a register");
1669 receiver_reg = R11_scratch1; // TODO (hs24): is R11_scratch1 really free at this point?
1670 __ ld(receiver_reg, reg2offset(r), R1_SP);
1671 } else {
1672 // no data motion is needed
1673 receiver_reg = r->as_Register();
1674 }
1675 }
1677 // Figure out which address we are really jumping to:
1678 MethodHandles::generate_method_handle_dispatch(masm, iid,
1679 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1680 }
1682 #endif // COMPILER2
1684 // ---------------------------------------------------------------------------
1685 // Generate a native wrapper for a given method. The method takes arguments
1686 // in the Java compiled code convention, marshals them to the native
1687 // convention (handlizes oops, etc), transitions to native, makes the call,
1688 // returns to java state (possibly blocking), unhandlizes any result and
1689 // returns.
1690 //
1691 // Critical native functions are a shorthand for the use of
1692 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1693 // functions. The wrapper is expected to unpack the arguments before
1694 // passing them to the callee and perform checks before and after the
1695 // native call to ensure that they GC_locker
1696 // lock_critical/unlock_critical semantics are followed. Some other
1697 // parts of JNI setup are skipped like the tear down of the JNI handle
1698 // block and the check for pending exceptions it's impossible for them
1699 // to be thrown.
1700 //
1701 // They are roughly structured like this:
1702 // if (GC_locker::needs_gc())
1703 // SharedRuntime::block_for_jni_critical();
1704 // tranistion to thread_in_native
1705 // unpack arrray arguments and call native entry point
1706 // check for safepoint in progress
1707 // check if any thread suspend flags are set
1708 // call into JVM and possible unlock the JNI critical
1709 // if a GC was suppressed while in the critical native.
1710 // transition back to thread_in_Java
1711 // return to caller
1712 //
1713 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1714 methodHandle method,
1715 int compile_id,
1716 BasicType *in_sig_bt,
1717 VMRegPair *in_regs,
1718 BasicType ret_type) {
1719 #ifdef COMPILER2
1720 if (method->is_method_handle_intrinsic()) {
1721 vmIntrinsics::ID iid = method->intrinsic_id();
1722 intptr_t start = (intptr_t)__ pc();
1723 int vep_offset = ((intptr_t)__ pc()) - start;
1724 gen_special_dispatch(masm,
1725 method,
1726 in_sig_bt,
1727 in_regs);
1728 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1729 __ flush();
1730 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1731 return nmethod::new_native_nmethod(method,
1732 compile_id,
1733 masm->code(),
1734 vep_offset,
1735 frame_complete,
1736 stack_slots / VMRegImpl::slots_per_word,
1737 in_ByteSize(-1),
1738 in_ByteSize(-1),
1739 (OopMapSet*)NULL);
1740 }
1742 bool is_critical_native = true;
1743 address native_func = method->critical_native_function();
1744 if (native_func == NULL) {
1745 native_func = method->native_function();
1746 is_critical_native = false;
1747 }
1748 assert(native_func != NULL, "must have function");
1750 // First, create signature for outgoing C call
1751 // --------------------------------------------------------------------------
1753 int total_in_args = method->size_of_parameters();
1754 // We have received a description of where all the java args are located
1755 // on entry to the wrapper. We need to convert these args to where
1756 // the jni function will expect them. To figure out where they go
1757 // we convert the java signature to a C signature by inserting
1758 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1759 //
1760 // Additionally, on ppc64 we must convert integers to longs in the C
1761 // signature. We do this in advance in order to have no trouble with
1762 // indexes into the bt-arrays.
1763 // So convert the signature and registers now, and adjust the total number
1764 // of in-arguments accordingly.
1765 int i2l_argcnt = convert_ints_to_longints_argcnt(total_in_args, in_sig_bt); // PPC64: pass ints as longs.
1767 // Calculate the total number of C arguments and create arrays for the
1768 // signature and the outgoing registers.
1769 // On ppc64, we have two arrays for the outgoing registers, because
1770 // some floating-point arguments must be passed in registers _and_
1771 // in stack locations.
1772 bool method_is_static = method->is_static();
1773 int total_c_args = i2l_argcnt;
1775 if (!is_critical_native) {
1776 int n_hidden_args = method_is_static ? 2 : 1;
1777 total_c_args += n_hidden_args;
1778 } else {
1779 // No JNIEnv*, no this*, but unpacked arrays (base+length).
1780 for (int i = 0; i < total_in_args; i++) {
1781 if (in_sig_bt[i] == T_ARRAY) {
1782 total_c_args += 2; // PPC64: T_LONG, T_INT, T_ADDRESS (see convert_ints_to_longints and c_calling_convention)
1783 }
1784 }
1785 }
1787 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1788 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1789 VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1790 BasicType* in_elem_bt = NULL;
1792 // Create the signature for the C call:
1793 // 1) add the JNIEnv*
1794 // 2) add the class if the method is static
1795 // 3) copy the rest of the incoming signature (shifted by the number of
1796 // hidden arguments).
1798 int argc = 0;
1799 if (!is_critical_native) {
1800 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs.
1802 out_sig_bt[argc++] = T_ADDRESS;
1803 if (method->is_static()) {
1804 out_sig_bt[argc++] = T_OBJECT;
1805 }
1807 for (int i = 0; i < total_in_args ; i++ ) {
1808 out_sig_bt[argc++] = in_sig_bt[i];
1809 }
1810 } else {
1811 Thread* THREAD = Thread::current();
1812 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, i2l_argcnt);
1813 SignatureStream ss(method->signature());
1814 int o = 0;
1815 for (int i = 0; i < total_in_args ; i++, o++) {
1816 if (in_sig_bt[i] == T_ARRAY) {
1817 // Arrays are passed as int, elem* pair
1818 Symbol* atype = ss.as_symbol(CHECK_NULL);
1819 const char* at = atype->as_C_string();
1820 if (strlen(at) == 2) {
1821 assert(at[0] == '[', "must be");
1822 switch (at[1]) {
1823 case 'B': in_elem_bt[o] = T_BYTE; break;
1824 case 'C': in_elem_bt[o] = T_CHAR; break;
1825 case 'D': in_elem_bt[o] = T_DOUBLE; break;
1826 case 'F': in_elem_bt[o] = T_FLOAT; break;
1827 case 'I': in_elem_bt[o] = T_INT; break;
1828 case 'J': in_elem_bt[o] = T_LONG; break;
1829 case 'S': in_elem_bt[o] = T_SHORT; break;
1830 case 'Z': in_elem_bt[o] = T_BOOLEAN; break;
1831 default: ShouldNotReachHere();
1832 }
1833 }
1834 } else {
1835 in_elem_bt[o] = T_VOID;
1836 switch(in_sig_bt[i]) { // PPC64: pass ints as longs.
1837 case T_BOOLEAN:
1838 case T_CHAR:
1839 case T_BYTE:
1840 case T_SHORT:
1841 case T_INT: in_elem_bt[++o] = T_VOID; break;
1842 default: break;
1843 }
1844 }
1845 if (in_sig_bt[i] != T_VOID) {
1846 assert(in_sig_bt[i] == ss.type(), "must match");
1847 ss.next();
1848 }
1849 }
1850 assert(i2l_argcnt==o, "must match");
1852 convert_ints_to_longints(i2l_argcnt, total_in_args, in_sig_bt, in_regs); // PPC64: pass ints as longs.
1854 for (int i = 0; i < total_in_args ; i++ ) {
1855 if (in_sig_bt[i] == T_ARRAY) {
1856 // Arrays are passed as int, elem* pair.
1857 out_sig_bt[argc++] = T_LONG; // PPC64: pass ints as longs.
1858 out_sig_bt[argc++] = T_INT;
1859 out_sig_bt[argc++] = T_ADDRESS;
1860 } else {
1861 out_sig_bt[argc++] = in_sig_bt[i];
1862 }
1863 }
1864 }
1867 // Compute the wrapper's frame size.
1868 // --------------------------------------------------------------------------
1870 // Now figure out where the args must be stored and how much stack space
1871 // they require.
1872 //
1873 // Compute framesize for the wrapper. We need to handlize all oops in
1874 // incoming registers.
1875 //
1876 // Calculate the total number of stack slots we will need:
1877 // 1) abi requirements
1878 // 2) outgoing arguments
1879 // 3) space for inbound oop handle area
1880 // 4) space for handlizing a klass if static method
1881 // 5) space for a lock if synchronized method
1882 // 6) workspace for saving return values, int <-> float reg moves, etc.
1883 // 7) alignment
1884 //
1885 // Layout of the native wrapper frame:
1886 // (stack grows upwards, memory grows downwards)
1887 //
1888 // NW [ABI_REG_ARGS] <-- 1) R1_SP
1889 // [outgoing arguments] <-- 2) R1_SP + out_arg_slot_offset
1890 // [oopHandle area] <-- 3) R1_SP + oop_handle_offset (save area for critical natives)
1891 // klass <-- 4) R1_SP + klass_offset
1892 // lock <-- 5) R1_SP + lock_offset
1893 // [workspace] <-- 6) R1_SP + workspace_offset
1894 // [alignment] (optional) <-- 7)
1895 // caller [JIT_TOP_ABI_48] <-- r_callers_sp
1896 //
1897 // - *_slot_offset Indicates offset from SP in number of stack slots.
1898 // - *_offset Indicates offset from SP in bytes.
1900 int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) // 1+2)
1901 + SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention.
1903 // Now the space for the inbound oop handle area.
1904 int total_save_slots = num_java_iarg_registers * VMRegImpl::slots_per_word;
1905 if (is_critical_native) {
1906 // Critical natives may have to call out so they need a save area
1907 // for register arguments.
1908 int double_slots = 0;
1909 int single_slots = 0;
1910 for (int i = 0; i < total_in_args; i++) {
1911 if (in_regs[i].first()->is_Register()) {
1912 const Register reg = in_regs[i].first()->as_Register();
1913 switch (in_sig_bt[i]) {
1914 case T_BOOLEAN:
1915 case T_BYTE:
1916 case T_SHORT:
1917 case T_CHAR:
1918 case T_INT: /*single_slots++;*/ break; // PPC64: pass ints as longs.
1919 case T_ARRAY:
1920 case T_LONG: double_slots++; break;
1921 default: ShouldNotReachHere();
1922 }
1923 } else if (in_regs[i].first()->is_FloatRegister()) {
1924 switch (in_sig_bt[i]) {
1925 case T_FLOAT: single_slots++; break;
1926 case T_DOUBLE: double_slots++; break;
1927 default: ShouldNotReachHere();
1928 }
1929 }
1930 }
1931 total_save_slots = double_slots * 2 + round_to(single_slots, 2); // round to even
1932 }
1934 int oop_handle_slot_offset = stack_slots;
1935 stack_slots += total_save_slots; // 3)
1937 int klass_slot_offset = 0;
1938 int klass_offset = -1;
1939 if (method_is_static && !is_critical_native) { // 4)
1940 klass_slot_offset = stack_slots;
1941 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1942 stack_slots += VMRegImpl::slots_per_word;
1943 }
1945 int lock_slot_offset = 0;
1946 int lock_offset = -1;
1947 if (method->is_synchronized()) { // 5)
1948 lock_slot_offset = stack_slots;
1949 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size;
1950 stack_slots += VMRegImpl::slots_per_word;
1951 }
1953 int workspace_slot_offset = stack_slots; // 6)
1954 stack_slots += 2;
1956 // Now compute actual number of stack words we need.
1957 // Rounding to make stack properly aligned.
1958 stack_slots = round_to(stack_slots, // 7)
1959 frame::alignment_in_bytes / VMRegImpl::stack_slot_size);
1960 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size;
1963 // Now we can start generating code.
1964 // --------------------------------------------------------------------------
1966 intptr_t start_pc = (intptr_t)__ pc();
1967 intptr_t vep_start_pc;
1968 intptr_t frame_done_pc;
1969 intptr_t oopmap_pc;
1971 Label ic_miss;
1972 Label handle_pending_exception;
1974 Register r_callers_sp = R21;
1975 Register r_temp_1 = R22;
1976 Register r_temp_2 = R23;
1977 Register r_temp_3 = R24;
1978 Register r_temp_4 = R25;
1979 Register r_temp_5 = R26;
1980 Register r_temp_6 = R27;
1981 Register r_return_pc = R28;
1983 Register r_carg1_jnienv = noreg;
1984 Register r_carg2_classorobject = noreg;
1985 if (!is_critical_native) {
1986 r_carg1_jnienv = out_regs[0].first()->as_Register();
1987 r_carg2_classorobject = out_regs[1].first()->as_Register();
1988 }
1991 // Generate the Unverified Entry Point (UEP).
1992 // --------------------------------------------------------------------------
1993 assert(start_pc == (intptr_t)__ pc(), "uep must be at start");
1995 // Check ic: object class == cached class?
1996 if (!method_is_static) {
1997 Register ic = as_Register(Matcher::inline_cache_reg_encode());
1998 Register receiver_klass = r_temp_1;
2000 __ cmpdi(CCR0, R3_ARG1, 0);
2001 __ beq(CCR0, ic_miss);
2002 __ verify_oop(R3_ARG1);
2003 __ load_klass(receiver_klass, R3_ARG1);
2005 __ cmpd(CCR0, receiver_klass, ic);
2006 __ bne(CCR0, ic_miss);
2007 }
2010 // Generate the Verified Entry Point (VEP).
2011 // --------------------------------------------------------------------------
2012 vep_start_pc = (intptr_t)__ pc();
2014 __ save_LR_CR(r_temp_1);
2015 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame.
2016 __ mr(r_callers_sp, R1_SP); // Remember frame pointer.
2017 __ push_frame(frame_size_in_bytes, r_temp_1); // Push the c2n adapter's frame.
2018 frame_done_pc = (intptr_t)__ pc();
2020 // Native nmethod wrappers never take possesion of the oop arguments.
2021 // So the caller will gc the arguments.
2022 // The only thing we need an oopMap for is if the call is static.
2023 //
2024 // An OopMap for lock (and class if static), and one for the VM call itself.
2025 OopMapSet *oop_maps = new OopMapSet();
2026 OopMap *oop_map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2028 if (is_critical_native) {
2029 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, oop_handle_slot_offset, oop_maps, in_regs, in_sig_bt, r_temp_1);
2030 }
2032 // Move arguments from register/stack to register/stack.
2033 // --------------------------------------------------------------------------
2034 //
2035 // We immediately shuffle the arguments so that for any vm call we have
2036 // to make from here on out (sync slow path, jvmti, etc.) we will have
2037 // captured the oops from our caller and have a valid oopMap for them.
2038 //
2039 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
2040 // (derived from JavaThread* which is in R16_thread) and, if static,
2041 // the class mirror instead of a receiver. This pretty much guarantees that
2042 // register layout will not match. We ignore these extra arguments during
2043 // the shuffle. The shuffle is described by the two calling convention
2044 // vectors we have in our possession. We simply walk the java vector to
2045 // get the source locations and the c vector to get the destinations.
2047 // Record sp-based slot for receiver on stack for non-static methods.
2048 int receiver_offset = -1;
2050 // We move the arguments backward because the floating point registers
2051 // destination will always be to a register with a greater or equal
2052 // register number or the stack.
2053 // in is the index of the incoming Java arguments
2054 // out is the index of the outgoing C arguments
2056 #ifdef ASSERT
2057 bool reg_destroyed[RegisterImpl::number_of_registers];
2058 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2059 for (int r = 0 ; r < RegisterImpl::number_of_registers ; r++) {
2060 reg_destroyed[r] = false;
2061 }
2062 for (int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++) {
2063 freg_destroyed[f] = false;
2064 }
2065 #endif // ASSERT
2067 for (int in = total_in_args - 1, out = total_c_args - 1; in >= 0 ; in--, out--) {
2069 #ifdef ASSERT
2070 if (in_regs[in].first()->is_Register()) {
2071 assert(!reg_destroyed[in_regs[in].first()->as_Register()->encoding()], "ack!");
2072 } else if (in_regs[in].first()->is_FloatRegister()) {
2073 assert(!freg_destroyed[in_regs[in].first()->as_FloatRegister()->encoding()], "ack!");
2074 }
2075 if (out_regs[out].first()->is_Register()) {
2076 reg_destroyed[out_regs[out].first()->as_Register()->encoding()] = true;
2077 } else if (out_regs[out].first()->is_FloatRegister()) {
2078 freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true;
2079 }
2080 if (out_regs2[out].first()->is_Register()) {
2081 reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true;
2082 } else if (out_regs2[out].first()->is_FloatRegister()) {
2083 freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true;
2084 }
2085 #endif // ASSERT
2087 switch (in_sig_bt[in]) {
2088 case T_BOOLEAN:
2089 case T_CHAR:
2090 case T_BYTE:
2091 case T_SHORT:
2092 case T_INT:
2093 guarantee(in > 0 && in_sig_bt[in-1] == T_LONG,
2094 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
2095 break;
2096 case T_LONG:
2097 if (in_sig_bt[in+1] == T_VOID) {
2098 long_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2099 } else {
2100 guarantee(in_sig_bt[in+1] == T_BOOLEAN || in_sig_bt[in+1] == T_CHAR ||
2101 in_sig_bt[in+1] == T_BYTE || in_sig_bt[in+1] == T_SHORT ||
2102 in_sig_bt[in+1] == T_INT,
2103 "expecting type (T_LONG,bt) for bt in {T_BOOLEAN, T_CHAR, T_BYTE, T_SHORT, T_INT}");
2104 int_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2105 }
2106 break;
2107 case T_ARRAY:
2108 if (is_critical_native) {
2109 int body_arg = out;
2110 out -= 2; // Point to length arg. PPC64: pass ints as longs.
2111 unpack_array_argument(masm, in_regs[in], in_elem_bt[in], out_regs[body_arg], out_regs[out],
2112 r_callers_sp, r_temp_1, r_temp_2);
2113 break;
2114 }
2115 case T_OBJECT:
2116 assert(!is_critical_native, "no oop arguments");
2117 object_move(masm, stack_slots,
2118 oop_map, oop_handle_slot_offset,
2119 ((in == 0) && (!method_is_static)), &receiver_offset,
2120 in_regs[in], out_regs[out],
2121 r_callers_sp, r_temp_1, r_temp_2);
2122 break;
2123 case T_VOID:
2124 break;
2125 case T_FLOAT:
2126 float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2127 if (out_regs2[out].first()->is_valid()) {
2128 float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2129 }
2130 break;
2131 case T_DOUBLE:
2132 double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2133 if (out_regs2[out].first()->is_valid()) {
2134 double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2135 }
2136 break;
2137 case T_ADDRESS:
2138 fatal("found type (T_ADDRESS) in java args");
2139 break;
2140 default:
2141 ShouldNotReachHere();
2142 break;
2143 }
2144 }
2146 // Pre-load a static method's oop into ARG2.
2147 // Used both by locking code and the normal JNI call code.
2148 if (method_is_static && !is_critical_native) {
2149 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()),
2150 r_carg2_classorobject);
2152 // Now handlize the static class mirror in carg2. It's known not-null.
2153 __ std(r_carg2_classorobject, klass_offset, R1_SP);
2154 oop_map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2155 __ addi(r_carg2_classorobject, R1_SP, klass_offset);
2156 }
2158 // Get JNIEnv* which is first argument to native.
2159 if (!is_critical_native) {
2160 __ addi(r_carg1_jnienv, R16_thread, in_bytes(JavaThread::jni_environment_offset()));
2161 }
2163 // NOTE:
2164 //
2165 // We have all of the arguments setup at this point.
2166 // We MUST NOT touch any outgoing regs from this point on.
2167 // So if we must call out we must push a new frame.
2169 // Get current pc for oopmap, and load it patchable relative to global toc.
2170 oopmap_pc = (intptr_t) __ pc();
2171 __ calculate_address_from_global_toc(r_return_pc, (address)oopmap_pc, true, true, true, true);
2173 // We use the same pc/oopMap repeatedly when we call out.
2174 oop_maps->add_gc_map(oopmap_pc - start_pc, oop_map);
2176 // r_return_pc now has the pc loaded that we will use when we finally call
2177 // to native.
2179 // Make sure that thread is non-volatile; it crosses a bunch of VM calls below.
2180 assert(R16_thread->is_nonvolatile(), "thread must be in non-volatile register");
2183 # if 0
2184 // DTrace method entry
2185 # endif
2187 // Lock a synchronized method.
2188 // --------------------------------------------------------------------------
2190 if (method->is_synchronized()) {
2191 assert(!is_critical_native, "unhandled");
2192 ConditionRegister r_flag = CCR1;
2193 Register r_oop = r_temp_4;
2194 const Register r_box = r_temp_5;
2195 Label done, locked;
2197 // Load the oop for the object or class. r_carg2_classorobject contains
2198 // either the handlized oop from the incoming arguments or the handlized
2199 // class mirror (if the method is static).
2200 __ ld(r_oop, 0, r_carg2_classorobject);
2202 // Get the lock box slot's address.
2203 __ addi(r_box, R1_SP, lock_offset);
2205 # ifdef ASSERT
2206 if (UseBiasedLocking) {
2207 // Making the box point to itself will make it clear it went unused
2208 // but also be obviously invalid.
2209 __ std(r_box, 0, r_box);
2210 }
2211 # endif // ASSERT
2213 // Try fastpath for locking.
2214 // fast_lock kills r_temp_1, r_temp_2, r_temp_3.
2215 __ compiler_fast_lock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2216 __ beq(r_flag, locked);
2218 // None of the above fast optimizations worked so we have to get into the
2219 // slow case of monitor enter. Inline a special case of call_VM that
2220 // disallows any pending_exception.
2222 // Save argument registers and leave room for C-compatible ABI_REG_ARGS.
2223 int frame_size = frame::abi_reg_args_size +
2224 round_to(total_c_args * wordSize, frame::alignment_in_bytes);
2225 __ mr(R11_scratch1, R1_SP);
2226 RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2);
2228 // Do the call.
2229 __ set_last_Java_frame(R11_scratch1, r_return_pc);
2230 assert(r_return_pc->is_nonvolatile(), "expecting return pc to be in non-volatile register");
2231 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread);
2232 __ reset_last_Java_frame();
2234 RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2);
2236 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2237 "no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C", 0);
2239 __ bind(locked);
2240 }
2243 // Publish thread state
2244 // --------------------------------------------------------------------------
2246 // Use that pc we placed in r_return_pc a while back as the current frame anchor.
2247 __ set_last_Java_frame(R1_SP, r_return_pc);
2249 // Transition from _thread_in_Java to _thread_in_native.
2250 __ li(R0, _thread_in_native);
2251 __ release();
2252 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2253 __ stw(R0, thread_(thread_state));
2254 if (UseMembar) {
2255 __ fence();
2256 }
2259 // The JNI call
2260 // --------------------------------------------------------------------------
2261 #if defined(ABI_ELFv2)
2262 __ call_c(native_func, relocInfo::runtime_call_type);
2263 #else
2264 FunctionDescriptor* fd_native_method = (FunctionDescriptor*) native_func;
2265 __ call_c(fd_native_method, relocInfo::runtime_call_type);
2266 #endif
2269 // Now, we are back from the native code.
2272 // Unpack the native result.
2273 // --------------------------------------------------------------------------
2275 // For int-types, we do any needed sign-extension required.
2276 // Care must be taken that the return values (R3_RET and F1_RET)
2277 // will survive any VM calls for blocking or unlocking.
2278 // An OOP result (handle) is done specially in the slow-path code.
2280 switch (ret_type) {
2281 case T_VOID: break; // Nothing to do!
2282 case T_FLOAT: break; // Got it where we want it (unless slow-path).
2283 case T_DOUBLE: break; // Got it where we want it (unless slow-path).
2284 case T_LONG: break; // Got it where we want it (unless slow-path).
2285 case T_OBJECT: break; // Really a handle.
2286 // Cannot de-handlize until after reclaiming jvm_lock.
2287 case T_ARRAY: break;
2289 case T_BOOLEAN: { // 0 -> false(0); !0 -> true(1)
2290 Label skip_modify;
2291 __ cmpwi(CCR0, R3_RET, 0);
2292 __ beq(CCR0, skip_modify);
2293 __ li(R3_RET, 1);
2294 __ bind(skip_modify);
2295 break;
2296 }
2297 case T_BYTE: { // sign extension
2298 __ extsb(R3_RET, R3_RET);
2299 break;
2300 }
2301 case T_CHAR: { // unsigned result
2302 __ andi(R3_RET, R3_RET, 0xffff);
2303 break;
2304 }
2305 case T_SHORT: { // sign extension
2306 __ extsh(R3_RET, R3_RET);
2307 break;
2308 }
2309 case T_INT: // nothing to do
2310 break;
2311 default:
2312 ShouldNotReachHere();
2313 break;
2314 }
2317 // Publish thread state
2318 // --------------------------------------------------------------------------
2320 // Switch thread to "native transition" state before reading the
2321 // synchronization state. This additional state is necessary because reading
2322 // and testing the synchronization state is not atomic w.r.t. GC, as this
2323 // scenario demonstrates:
2324 // - Java thread A, in _thread_in_native state, loads _not_synchronized
2325 // and is preempted.
2326 // - VM thread changes sync state to synchronizing and suspends threads
2327 // for GC.
2328 // - Thread A is resumed to finish this native method, but doesn't block
2329 // here since it didn't see any synchronization in progress, and escapes.
2331 // Transition from _thread_in_native to _thread_in_native_trans.
2332 __ li(R0, _thread_in_native_trans);
2333 __ release();
2334 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2335 __ stw(R0, thread_(thread_state));
2338 // Must we block?
2339 // --------------------------------------------------------------------------
2341 // Block, if necessary, before resuming in _thread_in_Java state.
2342 // In order for GC to work, don't clear the last_Java_sp until after blocking.
2343 Label after_transition;
2344 {
2345 Label no_block, sync;
2347 if (os::is_MP()) {
2348 if (UseMembar) {
2349 // Force this write out before the read below.
2350 __ fence();
2351 } else {
2352 // Write serialization page so VM thread can do a pseudo remote membar.
2353 // We use the current thread pointer to calculate a thread specific
2354 // offset to write to within the page. This minimizes bus traffic
2355 // due to cache line collision.
2356 __ serialize_memory(R16_thread, r_temp_4, r_temp_5);
2357 }
2358 }
2360 Register sync_state_addr = r_temp_4;
2361 Register sync_state = r_temp_5;
2362 Register suspend_flags = r_temp_6;
2364 __ load_const(sync_state_addr, SafepointSynchronize::address_of_state(), /*temp*/ sync_state);
2366 // TODO: PPC port assert(4 == SafepointSynchronize::sz_state(), "unexpected field size");
2367 __ lwz(sync_state, 0, sync_state_addr);
2369 // TODO: PPC port assert(4 == Thread::sz_suspend_flags(), "unexpected field size");
2370 __ lwz(suspend_flags, thread_(suspend_flags));
2372 __ acquire();
2374 Label do_safepoint;
2375 // No synchronization in progress nor yet synchronized.
2376 __ cmpwi(CCR0, sync_state, SafepointSynchronize::_not_synchronized);
2377 // Not suspended.
2378 __ cmpwi(CCR1, suspend_flags, 0);
2380 __ bne(CCR0, sync);
2381 __ beq(CCR1, no_block);
2383 // Block. Save any potential method result value before the operation and
2384 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this
2385 // lets us share the oopMap we used when we went native rather than create
2386 // a distinct one for this pc.
2387 __ bind(sync);
2389 address entry_point = is_critical_native
2390 ? CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)
2391 : CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans);
2392 save_native_result(masm, ret_type, workspace_slot_offset);
2393 __ call_VM_leaf(entry_point, R16_thread);
2394 restore_native_result(masm, ret_type, workspace_slot_offset);
2396 if (is_critical_native) {
2397 __ b(after_transition); // No thread state transition here.
2398 }
2399 __ bind(no_block);
2400 }
2402 // Publish thread state.
2403 // --------------------------------------------------------------------------
2405 // Thread state is thread_in_native_trans. Any safepoint blocking has
2406 // already happened so we can now change state to _thread_in_Java.
2408 // Transition from _thread_in_native_trans to _thread_in_Java.
2409 __ li(R0, _thread_in_Java);
2410 __ release();
2411 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2412 __ stw(R0, thread_(thread_state));
2413 if (UseMembar) {
2414 __ fence();
2415 }
2416 __ bind(after_transition);
2418 // Reguard any pages if necessary.
2419 // --------------------------------------------------------------------------
2421 Label no_reguard;
2422 __ lwz(r_temp_1, thread_(stack_guard_state));
2423 __ cmpwi(CCR0, r_temp_1, JavaThread::stack_guard_yellow_disabled);
2424 __ bne(CCR0, no_reguard);
2426 save_native_result(masm, ret_type, workspace_slot_offset);
2427 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2428 restore_native_result(masm, ret_type, workspace_slot_offset);
2430 __ bind(no_reguard);
2433 // Unlock
2434 // --------------------------------------------------------------------------
2436 if (method->is_synchronized()) {
2438 ConditionRegister r_flag = CCR1;
2439 const Register r_oop = r_temp_4;
2440 const Register r_box = r_temp_5;
2441 const Register r_exception = r_temp_6;
2442 Label done;
2444 // Get oop and address of lock object box.
2445 if (method_is_static) {
2446 assert(klass_offset != -1, "");
2447 __ ld(r_oop, klass_offset, R1_SP);
2448 } else {
2449 assert(receiver_offset != -1, "");
2450 __ ld(r_oop, receiver_offset, R1_SP);
2451 }
2452 __ addi(r_box, R1_SP, lock_offset);
2454 // Try fastpath for unlocking.
2455 __ compiler_fast_unlock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2456 __ beq(r_flag, done);
2458 // Save and restore any potential method result value around the unlocking operation.
2459 save_native_result(masm, ret_type, workspace_slot_offset);
2461 // Must save pending exception around the slow-path VM call. Since it's a
2462 // leaf call, the pending exception (if any) can be kept in a register.
2463 __ ld(r_exception, thread_(pending_exception));
2464 assert(r_exception->is_nonvolatile(), "exception register must be non-volatile");
2465 __ li(R0, 0);
2466 __ std(R0, thread_(pending_exception));
2468 // Slow case of monitor enter.
2469 // Inline a special case of call_VM that disallows any pending_exception.
2470 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), r_oop, r_box);
2472 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2473 "no pending exception allowed on exit from SharedRuntime::complete_monitor_unlocking_C", 0);
2475 restore_native_result(masm, ret_type, workspace_slot_offset);
2477 // Check_forward_pending_exception jump to forward_exception if any pending
2478 // exception is set. The forward_exception routine expects to see the
2479 // exception in pending_exception and not in a register. Kind of clumsy,
2480 // since all folks who branch to forward_exception must have tested
2481 // pending_exception first and hence have it in a register already.
2482 __ std(r_exception, thread_(pending_exception));
2484 __ bind(done);
2485 }
2487 # if 0
2488 // DTrace method exit
2489 # endif
2491 // Clear "last Java frame" SP and PC.
2492 // --------------------------------------------------------------------------
2494 __ reset_last_Java_frame();
2496 // Unpack oop result.
2497 // --------------------------------------------------------------------------
2499 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2500 Label skip_unboxing;
2501 __ cmpdi(CCR0, R3_RET, 0);
2502 __ beq(CCR0, skip_unboxing);
2503 __ ld(R3_RET, 0, R3_RET);
2504 __ bind(skip_unboxing);
2505 __ verify_oop(R3_RET);
2506 }
2509 // Reset handle block.
2510 // --------------------------------------------------------------------------
2511 if (!is_critical_native) {
2512 __ ld(r_temp_1, thread_(active_handles));
2513 // TODO: PPC port assert(4 == JNIHandleBlock::top_size_in_bytes(), "unexpected field size");
2514 __ li(r_temp_2, 0);
2515 __ stw(r_temp_2, JNIHandleBlock::top_offset_in_bytes(), r_temp_1);
2518 // Check for pending exceptions.
2519 // --------------------------------------------------------------------------
2520 __ ld(r_temp_2, thread_(pending_exception));
2521 __ cmpdi(CCR0, r_temp_2, 0);
2522 __ bne(CCR0, handle_pending_exception);
2523 }
2525 // Return
2526 // --------------------------------------------------------------------------
2528 __ pop_frame();
2529 __ restore_LR_CR(R11);
2530 __ blr();
2533 // Handler for pending exceptions (out-of-line).
2534 // --------------------------------------------------------------------------
2536 // Since this is a native call, we know the proper exception handler
2537 // is the empty function. We just pop this frame and then jump to
2538 // forward_exception_entry.
2539 if (!is_critical_native) {
2540 __ align(InteriorEntryAlignment);
2541 __ bind(handle_pending_exception);
2543 __ pop_frame();
2544 __ restore_LR_CR(R11);
2545 __ b64_patchable((address)StubRoutines::forward_exception_entry(),
2546 relocInfo::runtime_call_type);
2547 }
2549 // Handler for a cache miss (out-of-line).
2550 // --------------------------------------------------------------------------
2552 if (!method_is_static) {
2553 __ align(InteriorEntryAlignment);
2554 __ bind(ic_miss);
2556 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
2557 relocInfo::runtime_call_type);
2558 }
2560 // Done.
2561 // --------------------------------------------------------------------------
2563 __ flush();
2565 nmethod *nm = nmethod::new_native_nmethod(method,
2566 compile_id,
2567 masm->code(),
2568 vep_start_pc-start_pc,
2569 frame_done_pc-start_pc,
2570 stack_slots / VMRegImpl::slots_per_word,
2571 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2572 in_ByteSize(lock_offset),
2573 oop_maps);
2575 if (is_critical_native) {
2576 nm->set_lazy_critical_native(true);
2577 }
2579 return nm;
2580 #else
2581 ShouldNotReachHere();
2582 return NULL;
2583 #endif // COMPILER2
2584 }
2586 // This function returns the adjust size (in number of words) to a c2i adapter
2587 // activation for use during deoptimization.
2588 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2589 return round_to((callee_locals - callee_parameters) * Interpreter::stackElementWords, frame::alignment_in_bytes);
2590 }
2592 uint SharedRuntime::out_preserve_stack_slots() {
2593 #ifdef COMPILER2
2594 return frame::jit_out_preserve_size / VMRegImpl::stack_slot_size;
2595 #else
2596 return 0;
2597 #endif
2598 }
2600 #ifdef COMPILER2
2601 // Frame generation for deopt and uncommon trap blobs.
2602 static void push_skeleton_frame(MacroAssembler* masm, bool deopt,
2603 /* Read */
2604 Register unroll_block_reg,
2605 /* Update */
2606 Register frame_sizes_reg,
2607 Register number_of_frames_reg,
2608 Register pcs_reg,
2609 /* Invalidate */
2610 Register frame_size_reg,
2611 Register pc_reg) {
2613 __ ld(pc_reg, 0, pcs_reg);
2614 __ ld(frame_size_reg, 0, frame_sizes_reg);
2615 __ std(pc_reg, _abi(lr), R1_SP);
2616 __ push_frame(frame_size_reg, R0/*tmp*/);
2617 #ifdef CC_INTERP
2618 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2619 #else
2620 Unimplemented();
2621 #endif
2622 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
2623 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
2624 __ addi(pcs_reg, pcs_reg, wordSize);
2625 }
2627 // Loop through the UnrollBlock info and create new frames.
2628 static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
2629 /* read */
2630 Register unroll_block_reg,
2631 /* invalidate */
2632 Register frame_sizes_reg,
2633 Register number_of_frames_reg,
2634 Register pcs_reg,
2635 Register frame_size_reg,
2636 Register pc_reg) {
2637 Label loop;
2639 // _number_of_frames is of type int (deoptimization.hpp)
2640 __ lwa(number_of_frames_reg,
2641 Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(),
2642 unroll_block_reg);
2643 __ ld(pcs_reg,
2644 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(),
2645 unroll_block_reg);
2646 __ ld(frame_sizes_reg,
2647 Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(),
2648 unroll_block_reg);
2650 // stack: (caller_of_deoptee, ...).
2652 // At this point we either have an interpreter frame or a compiled
2653 // frame on top of stack. If it is a compiled frame we push a new c2i
2654 // adapter here
2656 // Memorize top-frame stack-pointer.
2657 __ mr(frame_size_reg/*old_sp*/, R1_SP);
2659 // Resize interpreter top frame OR C2I adapter.
2661 // At this moment, the top frame (which is the caller of the deoptee) is
2662 // an interpreter frame or a newly pushed C2I adapter or an entry frame.
2663 // The top frame has a TOP_IJAVA_FRAME_ABI and the frame contains the
2664 // outgoing arguments.
2665 //
2666 // In order to push the interpreter frame for the deoptee, we need to
2667 // resize the top frame such that we are able to place the deoptee's
2668 // locals in the frame.
2669 // Additionally, we have to turn the top frame's TOP_IJAVA_FRAME_ABI
2670 // into a valid PARENT_IJAVA_FRAME_ABI.
2672 __ lwa(R11_scratch1,
2673 Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(),
2674 unroll_block_reg);
2675 __ neg(R11_scratch1, R11_scratch1);
2677 // R11_scratch1 contains size of locals for frame resizing.
2678 // R12_scratch2 contains top frame's lr.
2680 // Resize frame by complete frame size prevents TOC from being
2681 // overwritten by locals. A more stack space saving way would be
2682 // to copy the TOC to its location in the new abi.
2683 __ addi(R11_scratch1, R11_scratch1, - frame::parent_ijava_frame_abi_size);
2685 // now, resize the frame
2686 __ resize_frame(R11_scratch1, pc_reg/*tmp*/);
2688 // In the case where we have resized a c2i frame above, the optional
2689 // alignment below the locals has size 32 (why?).
2690 __ std(R12_scratch2, _abi(lr), R1_SP);
2692 // Initialize initial_caller_sp.
2693 __ std(frame_size_reg/*old_sp*/, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2695 #ifdef ASSERT
2696 // Make sure that there is at least one entry in the array.
2697 __ cmpdi(CCR0, number_of_frames_reg, 0);
2698 __ asm_assert_ne("array_size must be > 0", 0x205);
2699 #endif
2701 // Now push the new interpreter frames.
2702 //
2703 __ bind(loop);
2704 // Allocate a new frame, fill in the pc.
2705 push_skeleton_frame(masm, deopt,
2706 unroll_block_reg,
2707 frame_sizes_reg,
2708 number_of_frames_reg,
2709 pcs_reg,
2710 frame_size_reg,
2711 pc_reg);
2712 __ cmpdi(CCR0, number_of_frames_reg, 0);
2713 __ bne(CCR0, loop);
2715 // Get the return address pointing into the frame manager.
2716 __ ld(R0, 0, pcs_reg);
2717 // Store it in the top interpreter frame.
2718 __ std(R0, _abi(lr), R1_SP);
2719 // Initialize frame_manager_lr of interpreter top frame.
2720 #ifdef CC_INTERP
2721 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP);
2722 #endif
2723 }
2724 #endif
2726 void SharedRuntime::generate_deopt_blob() {
2727 // Allocate space for the code
2728 ResourceMark rm;
2729 // Setup code generation tools
2730 CodeBuffer buffer("deopt_blob", 2048, 1024);
2731 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2732 Label exec_mode_initialized;
2733 int frame_size_in_words;
2734 OopMap* map = NULL;
2735 OopMapSet *oop_maps = new OopMapSet();
2737 // size of ABI112 plus spill slots for R3_RET and F1_RET.
2738 const int frame_size_in_bytes = frame::abi_reg_args_spill_size;
2739 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
2740 int first_frame_size_in_bytes = 0; // frame size of "unpack frame" for call to fetch_unroll_info.
2742 const Register exec_mode_reg = R21_tmp1;
2744 const address start = __ pc();
2746 #ifdef COMPILER2
2747 // --------------------------------------------------------------------------
2748 // Prolog for non exception case!
2750 // We have been called from the deopt handler of the deoptee.
2751 //
2752 // deoptee:
2753 // ...
2754 // call X
2755 // ...
2756 // deopt_handler: call_deopt_stub
2757 // cur. return pc --> ...
2758 //
2759 // So currently SR_LR points behind the call in the deopt handler.
2760 // We adjust it such that it points to the start of the deopt handler.
2761 // The return_pc has been stored in the frame of the deoptee and
2762 // will replace the address of the deopt_handler in the call
2763 // to Deoptimization::fetch_unroll_info below.
2764 // We can't grab a free register here, because all registers may
2765 // contain live values, so let the RegisterSaver do the adjustment
2766 // of the return pc.
2767 const int return_pc_adjustment_no_exception = -size_deopt_handler();
2769 // Push the "unpack frame"
2770 // Save everything in sight.
2771 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2772 &first_frame_size_in_bytes,
2773 /*generate_oop_map=*/ true,
2774 return_pc_adjustment_no_exception,
2775 RegisterSaver::return_pc_is_lr);
2776 assert(map != NULL, "OopMap must have been created");
2778 __ li(exec_mode_reg, Deoptimization::Unpack_deopt);
2779 // Save exec mode for unpack_frames.
2780 __ b(exec_mode_initialized);
2782 // --------------------------------------------------------------------------
2783 // Prolog for exception case
2785 // An exception is pending.
2786 // We have been called with a return (interpreter) or a jump (exception blob).
2787 //
2788 // - R3_ARG1: exception oop
2789 // - R4_ARG2: exception pc
2791 int exception_offset = __ pc() - start;
2793 BLOCK_COMMENT("Prolog for exception case");
2795 // The RegisterSaves doesn't need to adjust the return pc for this situation.
2796 const int return_pc_adjustment_exception = 0;
2798 // Push the "unpack frame".
2799 // Save everything in sight.
2800 assert(R4 == R4_ARG2, "exception pc must be in r4");
2801 RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2802 &first_frame_size_in_bytes,
2803 /*generate_oop_map=*/ false,
2804 return_pc_adjustment_exception,
2805 RegisterSaver::return_pc_is_r4);
2807 // Deopt during an exception. Save exec mode for unpack_frames.
2808 __ li(exec_mode_reg, Deoptimization::Unpack_exception);
2810 // Store exception oop and pc in thread (location known to GC).
2811 // This is needed since the call to "fetch_unroll_info()" may safepoint.
2812 __ std(R3_ARG1, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2813 __ std(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2815 // fall through
2817 // --------------------------------------------------------------------------
2818 __ BIND(exec_mode_initialized);
2820 {
2821 const Register unroll_block_reg = R22_tmp2;
2823 // We need to set `last_Java_frame' because `fetch_unroll_info' will
2824 // call `last_Java_frame()'. The value of the pc in the frame is not
2825 // particularly important. It just needs to identify this blob.
2826 __ set_last_Java_frame(R1_SP, noreg);
2828 // With EscapeAnalysis turned on, this call may safepoint!
2829 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), R16_thread);
2830 address calls_return_pc = __ last_calls_return_pc();
2831 // Set an oopmap for the call site that describes all our saved registers.
2832 oop_maps->add_gc_map(calls_return_pc - start, map);
2834 __ reset_last_Java_frame();
2835 // Save the return value.
2836 __ mr(unroll_block_reg, R3_RET);
2838 // Restore only the result registers that have been saved
2839 // by save_volatile_registers(...).
2840 RegisterSaver::restore_result_registers(masm, first_frame_size_in_bytes);
2842 // In excp_deopt_mode, restore and clear exception oop which we
2843 // stored in the thread during exception entry above. The exception
2844 // oop will be the return value of this stub.
2845 Label skip_restore_excp;
2846 __ cmpdi(CCR0, exec_mode_reg, Deoptimization::Unpack_exception);
2847 __ bne(CCR0, skip_restore_excp);
2848 __ ld(R3_RET, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2849 __ ld(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2850 __ li(R0, 0);
2851 __ std(R0, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2852 __ std(R0, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2853 __ BIND(skip_restore_excp);
2855 // reload narrro_oop_base
2856 if (UseCompressedOops && Universe::narrow_oop_base() != 0) {
2857 __ load_const_optimized(R30, Universe::narrow_oop_base());
2858 }
2860 __ pop_frame();
2862 // stack: (deoptee, optional i2c, caller of deoptee, ...).
2864 // pop the deoptee's frame
2865 __ pop_frame();
2867 // stack: (caller_of_deoptee, ...).
2869 // Loop through the `UnrollBlock' info and create interpreter frames.
2870 push_skeleton_frames(masm, true/*deopt*/,
2871 unroll_block_reg,
2872 R23_tmp3,
2873 R24_tmp4,
2874 R25_tmp5,
2875 R26_tmp6,
2876 R27_tmp7);
2878 // stack: (skeletal interpreter frame, ..., optional skeletal
2879 // interpreter frame, optional c2i, caller of deoptee, ...).
2880 }
2882 // push an `unpack_frame' taking care of float / int return values.
2883 __ push_frame(frame_size_in_bytes, R0/*tmp*/);
2885 // stack: (unpack frame, skeletal interpreter frame, ..., optional
2886 // skeletal interpreter frame, optional c2i, caller of deoptee,
2887 // ...).
2889 // Spill live volatile registers since we'll do a call.
2890 __ std( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2891 __ stfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2893 // Let the unpacker layout information in the skeletal frames just
2894 // allocated.
2895 __ get_PC_trash_LR(R3_RET);
2896 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R3_RET);
2897 // This is a call to a LEAF method, so no oop map is required.
2898 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
2899 R16_thread/*thread*/, exec_mode_reg/*exec_mode*/);
2900 __ reset_last_Java_frame();
2902 // Restore the volatiles saved above.
2903 __ ld( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2904 __ lfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2906 // Pop the unpack frame.
2907 __ pop_frame();
2908 __ restore_LR_CR(R0);
2910 // stack: (top interpreter frame, ..., optional interpreter frame,
2911 // optional c2i, caller of deoptee, ...).
2913 // Initialize R14_state.
2914 __ ld(R14_state, 0, R1_SP);
2915 __ addi(R14_state, R14_state, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
2916 // Also inititialize R15_prev_state.
2917 __ restore_prev_state();
2919 // Return to the interpreter entry point.
2920 __ blr();
2921 __ flush();
2922 #else // COMPILER2
2923 __ unimplemented("deopt blob needed only with compiler");
2924 int exception_offset = __ pc() - start;
2925 #endif // COMPILER2
2927 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, 0, first_frame_size_in_bytes / wordSize);
2928 }
2930 #ifdef COMPILER2
2931 void SharedRuntime::generate_uncommon_trap_blob() {
2932 // Allocate space for the code.
2933 ResourceMark rm;
2934 // Setup code generation tools.
2935 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2936 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2937 address start = __ pc();
2939 Register unroll_block_reg = R21_tmp1;
2940 Register klass_index_reg = R22_tmp2;
2941 Register unc_trap_reg = R23_tmp3;
2943 OopMapSet* oop_maps = new OopMapSet();
2944 int frame_size_in_bytes = frame::abi_reg_args_size;
2945 OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
2947 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
2949 // Push a dummy `unpack_frame' and call
2950 // `Deoptimization::uncommon_trap' to pack the compiled frame into a
2951 // vframe array and return the `UnrollBlock' information.
2953 // Save LR to compiled frame.
2954 __ save_LR_CR(R11_scratch1);
2956 // Push an "uncommon_trap" frame.
2957 __ push_frame_reg_args(0, R11_scratch1);
2959 // stack: (unpack frame, deoptee, optional i2c, caller_of_deoptee, ...).
2961 // Set the `unpack_frame' as last_Java_frame.
2962 // `Deoptimization::uncommon_trap' expects it and considers its
2963 // sender frame as the deoptee frame.
2964 // Remember the offset of the instruction whose address will be
2965 // moved to R11_scratch1.
2966 address gc_map_pc = __ get_PC_trash_LR(R11_scratch1);
2968 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
2970 __ mr(klass_index_reg, R3);
2971 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap),
2972 R16_thread, klass_index_reg);
2974 // Set an oopmap for the call site.
2975 oop_maps->add_gc_map(gc_map_pc - start, map);
2977 __ reset_last_Java_frame();
2979 // Pop the `unpack frame'.
2980 __ pop_frame();
2982 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
2984 // Save the return value.
2985 __ mr(unroll_block_reg, R3_RET);
2987 // Pop the uncommon_trap frame.
2988 __ pop_frame();
2990 // stack: (caller_of_deoptee, ...).
2992 // Allocate new interpreter frame(s) and possibly a c2i adapter
2993 // frame.
2994 push_skeleton_frames(masm, false/*deopt*/,
2995 unroll_block_reg,
2996 R22_tmp2,
2997 R23_tmp3,
2998 R24_tmp4,
2999 R25_tmp5,
3000 R26_tmp6);
3002 // stack: (skeletal interpreter frame, ..., optional skeletal
3003 // interpreter frame, optional c2i, caller of deoptee, ...).
3005 // Push a dummy `unpack_frame' taking care of float return values.
3006 // Call `Deoptimization::unpack_frames' to layout information in the
3007 // interpreter frames just created.
3009 // Push a simple "unpack frame" here.
3010 __ push_frame_reg_args(0, R11_scratch1);
3012 // stack: (unpack frame, skeletal interpreter frame, ..., optional
3013 // skeletal interpreter frame, optional c2i, caller of deoptee,
3014 // ...).
3016 // Set the "unpack_frame" as last_Java_frame.
3017 __ get_PC_trash_LR(R11_scratch1);
3018 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
3020 // Indicate it is the uncommon trap case.
3021 __ li(unc_trap_reg, Deoptimization::Unpack_uncommon_trap);
3022 // Let the unpacker layout information in the skeletal frames just
3023 // allocated.
3024 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
3025 R16_thread, unc_trap_reg);
3027 __ reset_last_Java_frame();
3028 // Pop the `unpack frame'.
3029 __ pop_frame();
3030 // Restore LR from top interpreter frame.
3031 __ restore_LR_CR(R11_scratch1);
3033 // stack: (top interpreter frame, ..., optional interpreter frame,
3034 // optional c2i, caller of deoptee, ...).
3036 // Initialize R14_state, ...
3037 __ ld(R11_scratch1, 0, R1_SP);
3038 __ addi(R14_state, R11_scratch1, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
3039 // also initialize R15_prev_state.
3040 __ restore_prev_state();
3041 // Return to the interpreter entry point.
3042 __ blr();
3044 masm->flush();
3046 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, frame_size_in_bytes/wordSize);
3047 }
3048 #endif // COMPILER2
3050 // Generate a special Compile2Runtime blob that saves all registers, and setup oopmap.
3051 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3052 assert(StubRoutines::forward_exception_entry() != NULL,
3053 "must be generated before");
3055 ResourceMark rm;
3056 OopMapSet *oop_maps = new OopMapSet();
3057 OopMap* map;
3059 // Allocate space for the code. Setup code generation tools.
3060 CodeBuffer buffer("handler_blob", 2048, 1024);
3061 MacroAssembler* masm = new MacroAssembler(&buffer);
3063 address start = __ pc();
3064 int frame_size_in_bytes = 0;
3066 RegisterSaver::ReturnPCLocation return_pc_location;
3067 bool cause_return = (poll_type == POLL_AT_RETURN);
3068 if (cause_return) {
3069 // Nothing to do here. The frame has already been popped in MachEpilogNode.
3070 // Register LR already contains the return pc.
3071 return_pc_location = RegisterSaver::return_pc_is_lr;
3072 } else {
3073 // Use thread()->saved_exception_pc() as return pc.
3074 return_pc_location = RegisterSaver::return_pc_is_thread_saved_exception_pc;
3075 }
3077 // Save registers, fpu state, and flags.
3078 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3079 &frame_size_in_bytes,
3080 /*generate_oop_map=*/ true,
3081 /*return_pc_adjustment=*/0,
3082 return_pc_location);
3084 // The following is basically a call_VM. However, we need the precise
3085 // address of the call in order to generate an oopmap. Hence, we do all the
3086 // work outselves.
3087 __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg);
3089 // The return address must always be correct so that the frame constructor
3090 // never sees an invalid pc.
3092 // Do the call
3093 __ call_VM_leaf(call_ptr, R16_thread);
3094 address calls_return_pc = __ last_calls_return_pc();
3096 // Set an oopmap for the call site. This oopmap will map all
3097 // oop-registers and debug-info registers as callee-saved. This
3098 // will allow deoptimization at this safepoint to find all possible
3099 // debug-info recordings, as well as let GC find all oops.
3100 oop_maps->add_gc_map(calls_return_pc - start, map);
3102 Label noException;
3104 // Clear the last Java frame.
3105 __ reset_last_Java_frame();
3107 BLOCK_COMMENT(" Check pending exception.");
3108 const Register pending_exception = R0;
3109 __ ld(pending_exception, thread_(pending_exception));
3110 __ cmpdi(CCR0, pending_exception, 0);
3111 __ beq(CCR0, noException);
3113 // Exception pending
3114 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3115 frame_size_in_bytes,
3116 /*restore_ctr=*/true);
3119 BLOCK_COMMENT(" Jump to forward_exception_entry.");
3120 // Jump to forward_exception_entry, with the issuing PC in LR
3121 // so it looks like the original nmethod called forward_exception_entry.
3122 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3124 // No exception case.
3125 __ BIND(noException);
3128 // Normal exit, restore registers and exit.
3129 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3130 frame_size_in_bytes,
3131 /*restore_ctr=*/true);
3133 __ blr();
3135 // Make sure all code is generated
3136 masm->flush();
3138 // Fill-out other meta info
3139 // CodeBlob frame size is in words.
3140 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_bytes / wordSize);
3141 }
3143 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss)
3144 //
3145 // Generate a stub that calls into the vm to find out the proper destination
3146 // of a java call. All the argument registers are live at this point
3147 // but since this is generic code we don't know what they are and the caller
3148 // must do any gc of the args.
3149 //
3150 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3152 // allocate space for the code
3153 ResourceMark rm;
3155 CodeBuffer buffer(name, 1000, 512);
3156 MacroAssembler* masm = new MacroAssembler(&buffer);
3158 int frame_size_in_bytes;
3160 OopMapSet *oop_maps = new OopMapSet();
3161 OopMap* map = NULL;
3163 address start = __ pc();
3165 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3166 &frame_size_in_bytes,
3167 /*generate_oop_map*/ true,
3168 /*return_pc_adjustment*/ 0,
3169 RegisterSaver::return_pc_is_lr);
3171 // Use noreg as last_Java_pc, the return pc will be reconstructed
3172 // from the physical frame.
3173 __ set_last_Java_frame(/*sp*/R1_SP, noreg);
3175 int frame_complete = __ offset();
3177 // Pass R19_method as 2nd (optional) argument, used by
3178 // counter_overflow_stub.
3179 __ call_VM_leaf(destination, R16_thread, R19_method);
3180 address calls_return_pc = __ last_calls_return_pc();
3181 // Set an oopmap for the call site.
3182 // We need this not only for callee-saved registers, but also for volatile
3183 // registers that the compiler might be keeping live across a safepoint.
3184 // Create the oopmap for the call's return pc.
3185 oop_maps->add_gc_map(calls_return_pc - start, map);
3187 // R3_RET contains the address we are going to jump to assuming no exception got installed.
3189 // clear last_Java_sp
3190 __ reset_last_Java_frame();
3192 // Check for pending exceptions.
3193 BLOCK_COMMENT("Check for pending exceptions.");
3194 Label pending;
3195 __ ld(R11_scratch1, thread_(pending_exception));
3196 __ cmpdi(CCR0, R11_scratch1, 0);
3197 __ bne(CCR0, pending);
3199 __ mtctr(R3_RET); // Ctr will not be touched by restore_live_registers_and_pop_frame.
3201 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ false);
3203 // Get the returned methodOop.
3204 __ get_vm_result_2(R19_method);
3206 __ bctr();
3209 // Pending exception after the safepoint.
3210 __ BIND(pending);
3212 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ true);
3214 // exception pending => remove activation and forward to exception handler
3216 __ li(R11_scratch1, 0);
3217 __ ld(R3_ARG1, thread_(pending_exception));
3218 __ std(R11_scratch1, in_bytes(JavaThread::vm_result_offset()), R16_thread);
3219 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3221 // -------------
3222 // Make sure all code is generated.
3223 masm->flush();
3225 // return the blob
3226 // frame_size_words or bytes??
3227 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_bytes/wordSize,
3228 oop_maps, true);
3229 }