Tue, 26 Jul 2016 17:06:17 +0800
Add multiply word to GPR instruction (mul) in MIPS assembler.
1 /*
2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
26 #ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP
27 #define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP
28 static void prepare_invoke(int byte_no, Register method, Register index = noreg, Register recv = noreg,
29 Register flags = noreg);
30 static void invokevirtual_helper(Register index, Register recv,
31 Register flags);
32 //static void volatile_barrier(Assembler::Membar_mask_bits order_constraint);
33 static void volatile_barrier();
35 // Helpers
36 static void index_check(Register array, Register index);
37 static void index_check_without_pop(Register array, Register index);
39 #endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP