Tue, 26 Jul 2016 17:06:17 +0800
Add multiply word to GPR instruction (mul) in MIPS assembler.
1 /*
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3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
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14 * accompanied this code).
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24 */
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.hpp"
28 #include "code/relocInfo.hpp"
29 #include "nativeInst_mips.hpp"
30 #include "oops/oop.inline.hpp"
31 #include "runtime/safepoint.hpp"
34 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
35 #ifdef _LP64
36 x += o;
37 typedef Assembler::WhichOperand WhichOperand;
38 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
39 assert(which == Assembler::disp32_operand ||
40 which == Assembler::narrow_oop_operand ||
41 which == Assembler::imm_operand, "format unpacks ok");
42 if (which == Assembler::imm_operand) {
43 if (verify_only) {
44 assert(nativeMovConstReg_at(addr())->data() == (long)x, "instructions must match");
45 } else {
46 nativeMovConstReg_at(addr())->set_data((intptr_t)(x));
47 }
48 } else if (which == Assembler::narrow_oop_operand) {
49 // both compressed oops and compressed classes look the same
50 if (Universe::heap()->is_in_reserved((oop)x)) {
51 if (verify_only) {
52 assert(nativeMovConstReg_at(addr())->data() == (long)oopDesc::encode_heap_oop((oop)x), "instructions must match");
53 } else {
54 nativeMovConstReg_at(addr())->set_data((intptr_t)(oopDesc::encode_heap_oop((oop)x)));
55 }
56 } else {
57 if (verify_only) {
58 assert(nativeMovConstReg_at(addr())->data() == (long)Klass::encode_klass((Klass*)x), "instructions must match");
59 } else {
60 nativeMovConstReg_at(addr())->set_data((intptr_t)(Klass::encode_klass((Klass*)x)));
61 }
62 }
63 } else {
64 // Note: Use runtime_call_type relocations for call32_operand.
65 assert(0, "call32_operand not supported in MIPS64");
66 }
67 #else
68 if (verify_only) {
69 assert(*pd_address_in_code() == (x + o), "instructions must match");
70 } else {
71 *pd_address_in_code() = x + o;
72 }
73 #endif // AMD64
74 }
77 //NOTICE HERE, this relocate is not need for MIPS, since MIPS USE abosolutly target,
78 //Maybe We should FORGET CALL RELOCATION
79 address Relocation::pd_call_destination(address orig_addr) {
80 intptr_t adj = 0;
81 NativeInstruction* ni = nativeInstruction_at(addr());
82 if (ni->is_call()) {
83 return nativeCall_at(addr())->destination() + adj;
84 } else if (ni->is_jump()) {
85 //return nativeJump_at(addr())->jump_destination() + adj;
86 return nativeGeneralJump_at(addr())->jump_destination() + adj;
87 } else if (ni->is_cond_jump()) {
88 return nativeCondJump_at(addr())->jump_destination() +adj;
89 } else {
90 ShouldNotReachHere();
91 return NULL;
92 }
93 }
96 void Relocation::pd_set_call_destination(address x) {
97 NativeInstruction* ni = nativeInstruction_at(addr());
98 if (ni->is_call()) {
99 nativeCall_at(addr())->set_destination(x);
100 } else if (ni->is_jump())
101 //NativeJump* nj = nativeJump_at(addr());
102 nativeGeneralJump_at(addr())->set_jump_destination(x);
103 else if (ni->is_cond_jump())
104 nativeCondJump_at(addr())->set_jump_destination(x);
105 else
106 { ShouldNotReachHere(); }
108 // Unresolved jumps are recognized by a destination of -1
109 // However 64bit can't actually produce such an address
110 // and encodes a jump to self but jump_destination will
111 // return a -1 as the signal. We must not relocate this
112 // jmp or the ic code will not see it as unresolved.
113 /*
114 if (nj->jump_destination() == (address) -1) {
115 x = addr(); // jump to self
116 }
117 nj->set_jump_destination(x);
118 } else if (ni->is_cond_jump()) {
119 // %%%% kludge this, for now, until we get a jump_destination method
120 address old_dest = nativeGeneralJump_at(addr())->jump_destination();
121 address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
122 *(jint*)disp += (x - old_dest);
123 } else if (ni->is_mov_literal64()) {
124 ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
125 } else {
126 ShouldNotReachHere();
127 }
128 */
129 }
132 address* Relocation::pd_address_in_code() {
133 //ShouldNotReachHere();
134 return (address*)addr();
135 }
138 address Relocation::pd_get_address_from_code() {
139 tty->print_cr("%s: %d", __func__, __LINE__); //aoqi_test
140 NativeMovConstReg* ni = nativeMovConstReg_at(addr());
141 return (address)ni->data();
142 }
145 /*
146 int Relocation::pd_breakpoint_size() {
147 // minimum breakpoint size, in short words
148 return NativeIllegalInstruction::instruction_size / sizeof(short);
149 }
151 void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
152 Untested("pd_swap_in_breakpoint");
153 if (instrs != NULL) {
154 assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
155 for (int i = 0; i < instrlen; i++) {
156 instrs[i] = ((short*)x)[i];
157 }
158 }
159 NativeIllegalInstruction::insert(x);
160 }
162 void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
163 Untested("pd_swap_out_breakpoint");
164 assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update");
165 NativeInstruction* ni = nativeInstruction_at(x);
166 *(short*)ni->addr_at(0) = instrs[0];
167 }
168 */
170 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
171 // Unimplemented();
172 }
174 void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
175 // Unimplemented();
176 }
178 void internal_pc_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
179 address target =0;
180 NativeMovConstReg* ni = nativeMovConstReg_at(addr());
181 target = new_addr_for((address)ni->data(), src, dest);
182 ni->set_data((intptr_t)target);
183 }
185 void metadata_Relocation::pd_fix_value(address x) {
186 }