Tue, 26 Jul 2016 17:06:17 +0800
Add multiply word to GPR instruction (mul) in MIPS assembler.
aoqi@1 | 1 | /* |
aoqi@1 | 2 | * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. |
aoqi@1 | 3 | * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. |
aoqi@1 | 4 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@1 | 5 | * |
aoqi@1 | 6 | * This code is free software; you can redistribute it and/or modify it |
aoqi@1 | 7 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@1 | 8 | * published by the Free Software Foundation. |
aoqi@1 | 9 | * |
aoqi@1 | 10 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@1 | 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@1 | 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@1 | 13 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@1 | 14 | * accompanied this code). |
aoqi@1 | 15 | * |
aoqi@1 | 16 | * You should have received a copy of the GNU General Public License version |
aoqi@1 | 17 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@1 | 18 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@1 | 19 | * |
aoqi@1 | 20 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@1 | 21 | * or visit www.oracle.com if you need additional information or have any |
aoqi@1 | 22 | * questions. |
aoqi@1 | 23 | * |
aoqi@1 | 24 | */ |
aoqi@1 | 25 | |
aoqi@1 | 26 | #include "precompiled.hpp" |
aoqi@1 | 27 | #include "asm/macroAssembler.hpp" |
aoqi@1 | 28 | #include "code/relocInfo.hpp" |
aoqi@1 | 29 | #include "nativeInst_mips.hpp" |
aoqi@1 | 30 | #include "oops/oop.inline.hpp" |
aoqi@1 | 31 | #include "runtime/safepoint.hpp" |
aoqi@1 | 32 | |
aoqi@1 | 33 | |
aoqi@1 | 34 | void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { |
aoqi@1 | 35 | #ifdef _LP64 |
aoqi@1 | 36 | x += o; |
aoqi@1 | 37 | typedef Assembler::WhichOperand WhichOperand; |
aoqi@1 | 38 | WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop |
aoqi@1 | 39 | assert(which == Assembler::disp32_operand || |
aoqi@1 | 40 | which == Assembler::narrow_oop_operand || |
aoqi@1 | 41 | which == Assembler::imm_operand, "format unpacks ok"); |
aoqi@1 | 42 | if (which == Assembler::imm_operand) { |
aoqi@1 | 43 | if (verify_only) { |
aoqi@1 | 44 | assert(nativeMovConstReg_at(addr())->data() == (long)x, "instructions must match"); |
aoqi@1 | 45 | } else { |
aoqi@1 | 46 | nativeMovConstReg_at(addr())->set_data((intptr_t)(x)); |
aoqi@1 | 47 | } |
aoqi@1 | 48 | } else if (which == Assembler::narrow_oop_operand) { |
aoqi@1 | 49 | // both compressed oops and compressed classes look the same |
aoqi@1 | 50 | if (Universe::heap()->is_in_reserved((oop)x)) { |
aoqi@1 | 51 | if (verify_only) { |
aoqi@1 | 52 | assert(nativeMovConstReg_at(addr())->data() == (long)oopDesc::encode_heap_oop((oop)x), "instructions must match"); |
aoqi@1 | 53 | } else { |
aoqi@1 | 54 | nativeMovConstReg_at(addr())->set_data((intptr_t)(oopDesc::encode_heap_oop((oop)x))); |
aoqi@1 | 55 | } |
aoqi@1 | 56 | } else { |
aoqi@1 | 57 | if (verify_only) { |
aoqi@1 | 58 | assert(nativeMovConstReg_at(addr())->data() == (long)Klass::encode_klass((Klass*)x), "instructions must match"); |
aoqi@1 | 59 | } else { |
aoqi@1 | 60 | nativeMovConstReg_at(addr())->set_data((intptr_t)(Klass::encode_klass((Klass*)x))); |
aoqi@1 | 61 | } |
aoqi@1 | 62 | } |
aoqi@1 | 63 | } else { |
aoqi@1 | 64 | // Note: Use runtime_call_type relocations for call32_operand. |
aoqi@1 | 65 | assert(0, "call32_operand not supported in MIPS64"); |
aoqi@1 | 66 | } |
aoqi@1 | 67 | #else |
aoqi@1 | 68 | if (verify_only) { |
aoqi@1 | 69 | assert(*pd_address_in_code() == (x + o), "instructions must match"); |
aoqi@1 | 70 | } else { |
aoqi@1 | 71 | *pd_address_in_code() = x + o; |
aoqi@1 | 72 | } |
aoqi@1 | 73 | #endif // AMD64 |
aoqi@1 | 74 | } |
aoqi@1 | 75 | |
aoqi@1 | 76 | |
aoqi@1 | 77 | //NOTICE HERE, this relocate is not need for MIPS, since MIPS USE abosolutly target, |
aoqi@1 | 78 | //Maybe We should FORGET CALL RELOCATION |
aoqi@1 | 79 | address Relocation::pd_call_destination(address orig_addr) { |
aoqi@1 | 80 | intptr_t adj = 0; |
aoqi@1 | 81 | NativeInstruction* ni = nativeInstruction_at(addr()); |
aoqi@1 | 82 | if (ni->is_call()) { |
aoqi@1 | 83 | return nativeCall_at(addr())->destination() + adj; |
aoqi@1 | 84 | } else if (ni->is_jump()) { |
aoqi@1 | 85 | //return nativeJump_at(addr())->jump_destination() + adj; |
aoqi@1 | 86 | return nativeGeneralJump_at(addr())->jump_destination() + adj; |
aoqi@1 | 87 | } else if (ni->is_cond_jump()) { |
aoqi@1 | 88 | return nativeCondJump_at(addr())->jump_destination() +adj; |
aoqi@1 | 89 | } else { |
aoqi@1 | 90 | ShouldNotReachHere(); |
aoqi@1 | 91 | return NULL; |
aoqi@1 | 92 | } |
aoqi@1 | 93 | } |
aoqi@1 | 94 | |
aoqi@1 | 95 | |
aoqi@1 | 96 | void Relocation::pd_set_call_destination(address x) { |
aoqi@1 | 97 | NativeInstruction* ni = nativeInstruction_at(addr()); |
aoqi@1 | 98 | if (ni->is_call()) { |
aoqi@1 | 99 | nativeCall_at(addr())->set_destination(x); |
aoqi@1 | 100 | } else if (ni->is_jump()) |
aoqi@1 | 101 | //NativeJump* nj = nativeJump_at(addr()); |
aoqi@1 | 102 | nativeGeneralJump_at(addr())->set_jump_destination(x); |
aoqi@1 | 103 | else if (ni->is_cond_jump()) |
aoqi@1 | 104 | nativeCondJump_at(addr())->set_jump_destination(x); |
aoqi@1 | 105 | else |
aoqi@1 | 106 | { ShouldNotReachHere(); } |
aoqi@1 | 107 | |
aoqi@1 | 108 | // Unresolved jumps are recognized by a destination of -1 |
aoqi@1 | 109 | // However 64bit can't actually produce such an address |
aoqi@1 | 110 | // and encodes a jump to self but jump_destination will |
aoqi@1 | 111 | // return a -1 as the signal. We must not relocate this |
aoqi@1 | 112 | // jmp or the ic code will not see it as unresolved. |
aoqi@1 | 113 | /* |
aoqi@1 | 114 | if (nj->jump_destination() == (address) -1) { |
aoqi@1 | 115 | x = addr(); // jump to self |
aoqi@1 | 116 | } |
aoqi@1 | 117 | nj->set_jump_destination(x); |
aoqi@1 | 118 | } else if (ni->is_cond_jump()) { |
aoqi@1 | 119 | // %%%% kludge this, for now, until we get a jump_destination method |
aoqi@1 | 120 | address old_dest = nativeGeneralJump_at(addr())->jump_destination(); |
aoqi@1 | 121 | address disp = Assembler::locate_operand(addr(), Assembler::call32_operand); |
aoqi@1 | 122 | *(jint*)disp += (x - old_dest); |
aoqi@1 | 123 | } else if (ni->is_mov_literal64()) { |
aoqi@1 | 124 | ((NativeMovConstReg*)ni)->set_data((intptr_t)x); |
aoqi@1 | 125 | } else { |
aoqi@1 | 126 | ShouldNotReachHere(); |
aoqi@1 | 127 | } |
aoqi@1 | 128 | */ |
aoqi@1 | 129 | } |
aoqi@1 | 130 | |
aoqi@1 | 131 | |
aoqi@1 | 132 | address* Relocation::pd_address_in_code() { |
aoqi@1 | 133 | //ShouldNotReachHere(); |
aoqi@1 | 134 | return (address*)addr(); |
aoqi@1 | 135 | } |
aoqi@1 | 136 | |
aoqi@1 | 137 | |
aoqi@1 | 138 | address Relocation::pd_get_address_from_code() { |
aoqi@1 | 139 | tty->print_cr("%s: %d", __func__, __LINE__); //aoqi_test |
aoqi@1 | 140 | NativeMovConstReg* ni = nativeMovConstReg_at(addr()); |
aoqi@1 | 141 | return (address)ni->data(); |
aoqi@1 | 142 | } |
aoqi@1 | 143 | |
aoqi@1 | 144 | |
aoqi@1 | 145 | /* |
aoqi@1 | 146 | int Relocation::pd_breakpoint_size() { |
aoqi@1 | 147 | // minimum breakpoint size, in short words |
aoqi@1 | 148 | return NativeIllegalInstruction::instruction_size / sizeof(short); |
aoqi@1 | 149 | } |
aoqi@1 | 150 | |
aoqi@1 | 151 | void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) { |
aoqi@1 | 152 | Untested("pd_swap_in_breakpoint"); |
aoqi@1 | 153 | if (instrs != NULL) { |
aoqi@1 | 154 | assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data"); |
aoqi@1 | 155 | for (int i = 0; i < instrlen; i++) { |
aoqi@1 | 156 | instrs[i] = ((short*)x)[i]; |
aoqi@1 | 157 | } |
aoqi@1 | 158 | } |
aoqi@1 | 159 | NativeIllegalInstruction::insert(x); |
aoqi@1 | 160 | } |
aoqi@1 | 161 | |
aoqi@1 | 162 | void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) { |
aoqi@1 | 163 | Untested("pd_swap_out_breakpoint"); |
aoqi@1 | 164 | assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update"); |
aoqi@1 | 165 | NativeInstruction* ni = nativeInstruction_at(x); |
aoqi@1 | 166 | *(short*)ni->addr_at(0) = instrs[0]; |
aoqi@1 | 167 | } |
aoqi@1 | 168 | */ |
aoqi@1 | 169 | |
aoqi@1 | 170 | void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { |
aoqi@1 | 171 | // Unimplemented(); |
aoqi@1 | 172 | } |
aoqi@1 | 173 | |
aoqi@1 | 174 | void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { |
aoqi@1 | 175 | // Unimplemented(); |
aoqi@1 | 176 | } |
aoqi@1 | 177 | |
aoqi@1 | 178 | void internal_pc_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { |
aoqi@1 | 179 | address target =0; |
aoqi@1 | 180 | NativeMovConstReg* ni = nativeMovConstReg_at(addr()); |
aoqi@1 | 181 | target = new_addr_for((address)ni->data(), src, dest); |
aoqi@1 | 182 | ni->set_data((intptr_t)target); |
aoqi@1 | 183 | } |
aoqi@1 | 184 | |
aoqi@1 | 185 | void metadata_Relocation::pd_fix_value(address x) { |
aoqi@1 | 186 | } |
aoqi@1 | 187 |