jdk8-mips64-public/hotspot: src/cpu/mips/vm/register

     1 /*

     2  * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.

     3  * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.

     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     5  *

     6  * This code is free software; you can redistribute it and/or modify it

     7  * under the terms of the GNU General Public License version 2 only, as

     8  * published by the Free Software Foundation.

     9  *

    10  * This code is distributed in the hope that it will be useful, but WITHOUT

    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    13  * version 2 for more details (a copy is included in the LICENSE file that

    14  * accompanied this code).

    15  *

    16  * You should have received a copy of the GNU General Public License version

    17  * 2 along with this work; if not, write to the Free Software Foundation,

    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    19  *

    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    21  * or visit www.oracle.com if you need additional information or have any

    22  * questions.

    23  *

    24  */

    26 #ifndef CPU_MIPS_VM_REGISTER_MIPS_HPP

    27 #define CPU_MIPS_VM_REGISTER_MIPS_HPP

    29 #include "asm/register.hpp"

    30 #include "vm_version_mips.hpp"

    32 class VMRegImpl;

    33 typedef VMRegImpl* VMReg;

    35 // Use Register as shortcut

    36 class RegisterImpl;

    37 typedef RegisterImpl* Register;

    40 // The implementation of integer registers for the ia32 architecture

    41 inline Register as_Register(int encoding) {

    42   return (Register)(intptr_t) encoding;

    43 }

    45 class RegisterImpl: public AbstractRegisterImpl {

    46  public:

    47   enum {

    48     number_of_registers     = 32

    49   };

    51   // derived registers, offsets, and addresses

    52   Register successor() const                          { return as_Register(encoding() + 1); }

    54   // construction

    55   inline friend Register as_Register(int encoding);

    57   VMReg as_VMReg();

    59   // accessors

    60   int   encoding() const                         { assert(is_valid(),err_msg( "invalid register (%d)", (int)(intptr_t)this)); return (intptr_t)this; }

    61   bool  is_valid() const                         { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }

    62   const char* name() const;

    63 };

    66 // The integer registers of the MIPS32 architecture

    67 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1));

    70 CONSTANT_REGISTER_DECLARATION(Register, i0,    (0));

    71 CONSTANT_REGISTER_DECLARATION(Register, i1,    (1));

    72 CONSTANT_REGISTER_DECLARATION(Register, i2,    (2));

    73 CONSTANT_REGISTER_DECLARATION(Register, i3,    (3));

    74 CONSTANT_REGISTER_DECLARATION(Register, i4,    (4));

    75 CONSTANT_REGISTER_DECLARATION(Register, i5,    (5));

    76 CONSTANT_REGISTER_DECLARATION(Register, i6,    (6));

    77 CONSTANT_REGISTER_DECLARATION(Register, i7,    (7));

    78 CONSTANT_REGISTER_DECLARATION(Register, i8,    (8));

    79 CONSTANT_REGISTER_DECLARATION(Register, i9,    (9));

    80 CONSTANT_REGISTER_DECLARATION(Register, i10,   (10));

    81 CONSTANT_REGISTER_DECLARATION(Register, i11,   (11));

    82 CONSTANT_REGISTER_DECLARATION(Register, i12,   (12));

    83 CONSTANT_REGISTER_DECLARATION(Register, i13,   (13));

    84 CONSTANT_REGISTER_DECLARATION(Register, i14,   (14));

    85 CONSTANT_REGISTER_DECLARATION(Register, i15,   (15));

    86 CONSTANT_REGISTER_DECLARATION(Register, i16,   (16));

    87 CONSTANT_REGISTER_DECLARATION(Register, i17,   (17));

    88 CONSTANT_REGISTER_DECLARATION(Register, i18,   (18));

    89 CONSTANT_REGISTER_DECLARATION(Register, i19,   (19));

    90 CONSTANT_REGISTER_DECLARATION(Register, i20,   (20));

    91 CONSTANT_REGISTER_DECLARATION(Register, i21,   (21));

    92 CONSTANT_REGISTER_DECLARATION(Register, i22,   (22));

    93 CONSTANT_REGISTER_DECLARATION(Register, i23,   (23));

    94 CONSTANT_REGISTER_DECLARATION(Register, i24,   (24));

    95 CONSTANT_REGISTER_DECLARATION(Register, i25,   (25));

    96 CONSTANT_REGISTER_DECLARATION(Register, i26,   (26));

    97 CONSTANT_REGISTER_DECLARATION(Register, i27,   (27));

    98 CONSTANT_REGISTER_DECLARATION(Register, i28,   (28));

    99 CONSTANT_REGISTER_DECLARATION(Register, i29,   (29));

   100 CONSTANT_REGISTER_DECLARATION(Register, i30,   (30));

   101 CONSTANT_REGISTER_DECLARATION(Register, i31,   (31));

   103 #ifndef DONT_USE_REGISTER_DEFINES

   104 #define NOREG ((Register)(noreg_RegisterEnumValue))

   106 #define I0 ((Register)(i0_RegisterEnumValue))

   107 #define I1 ((Register)(i1_RegisterEnumValue))

   108 #define I2 ((Register)(i2_RegisterEnumValue))

   109 #define I3 ((Register)(i3_RegisterEnumValue))

   110 #define I4 ((Register)(i4_RegisterEnumValue))

   111 #define I5 ((Register)(i5_RegisterEnumValue))

   112 #define I6 ((Register)(i6_RegisterEnumValue))

   113 #define I7 ((Register)(i7_RegisterEnumValue))

   114 #define I8 ((Register)(i8_RegisterEnumValue))

   115 #define I9 ((Register)(i9_RegisterEnumValue))

   116 #define I10 ((Register)(i10_RegisterEnumValue))

   117 #define I11 ((Register)(i11_RegisterEnumValue))

   118 #define I12 ((Register)(i12_RegisterEnumValue))

   119 #define I13 ((Register)(i13_RegisterEnumValue))

   120 #define I14 ((Register)(i14_RegisterEnumValue))

   121 #define I15 ((Register)(i15_RegisterEnumValue))

   122 #define I16 ((Register)(i16_RegisterEnumValue))

   123 #define I17 ((Register)(i17_RegisterEnumValue))

   124 #define I18 ((Register)(i18_RegisterEnumValue))

   125 #define I19 ((Register)(i19_RegisterEnumValue))

   126 #define I20 ((Register)(i20_RegisterEnumValue))

   127 #define I21 ((Register)(i21_RegisterEnumValue))

   128 #define I22 ((Register)(i22_RegisterEnumValue))

   129 #define I23 ((Register)(i23_RegisterEnumValue))

   130 #define I24 ((Register)(i24_RegisterEnumValue))

   131 #define I25 ((Register)(i25_RegisterEnumValue))

   132 #define I26 ((Register)(i26_RegisterEnumValue))

   133 #define I27 ((Register)(i27_RegisterEnumValue))

   134 #define I28 ((Register)(i28_RegisterEnumValue))

   135 #define I29 ((Register)(i29_RegisterEnumValue))

   136 #define I30 ((Register)(i30_RegisterEnumValue))

   137 #define I31 ((Register)(i31_RegisterEnumValue))

   139 #ifndef _LP64

   141 #define R0 ((Register)(i0_RegisterEnumValue))

   142 #define AT ((Register)(i1_RegisterEnumValue))

   143 #define V0 ((Register)(i2_RegisterEnumValue))

   144 #define V1 ((Register)(i3_RegisterEnumValue))

   145 #define A0 ((Register)(i4_RegisterEnumValue))

   146 #define A1 ((Register)(i5_RegisterEnumValue))

   147 #define A2 ((Register)(i6_RegisterEnumValue))

   148 #define A3 ((Register)(i7_RegisterEnumValue))

   149 #define T0 ((Register)(i8_RegisterEnumValue))

   150 #define T1 ((Register)(i9_RegisterEnumValue))

   151 #define T2 ((Register)(i10_RegisterEnumValue))

   152 #define T3 ((Register)(i11_RegisterEnumValue))

   153 #define T4 ((Register)(i12_RegisterEnumValue))

   154 #define T5 ((Register)(i13_RegisterEnumValue))

   155 #define T6 ((Register)(i14_RegisterEnumValue))

   156 #define T7 ((Register)(i15_RegisterEnumValue))

   157 #define S0 ((Register)(i16_RegisterEnumValue))

   158 #define S1 ((Register)(i17_RegisterEnumValue))

   159 #define S2 ((Register)(i18_RegisterEnumValue))

   160 #define S3 ((Register)(i19_RegisterEnumValue))

   161 #define S4 ((Register)(i20_RegisterEnumValue))

   162 #define S5 ((Register)(i21_RegisterEnumValue))

   163 #define S6 ((Register)(i22_RegisterEnumValue))

   164 #define S7 ((Register)(i23_RegisterEnumValue))

   165 #define T8 ((Register)(i24_RegisterEnumValue))

   166 #define T9 ((Register)(i25_RegisterEnumValue))

   167 #define K0 ((Register)(i26_RegisterEnumValue))

   168 #define K1 ((Register)(i27_RegisterEnumValue))

   169 #define GP ((Register)(i28_RegisterEnumValue))

   170 #define SP ((Register)(i29_RegisterEnumValue))

   171 #define FP ((Register)(i30_RegisterEnumValue))

   172 #define S8 ((Register)(i30_RegisterEnumValue))

   173 #define RA ((Register)(i31_RegisterEnumValue))

   175 #else

   177 #define R0 ((Register)(i0_RegisterEnumValue))

   178 #define AT ((Register)(i1_RegisterEnumValue))

   179 #define V0 ((Register)(i2_RegisterEnumValue))

   180 #define V1 ((Register)(i3_RegisterEnumValue))

   181 #define A0 ((Register)(i4_RegisterEnumValue))

   182 #define A1 ((Register)(i5_RegisterEnumValue))

   183 #define A2 ((Register)(i6_RegisterEnumValue))

   184 #define A3 ((Register)(i7_RegisterEnumValue))

   185 #define A4 ((Register)(i8_RegisterEnumValue))

   186 #define A5 ((Register)(i9_RegisterEnumValue))

   187 #define A6 ((Register)(i10_RegisterEnumValue))

   188 #define A7 ((Register)(i11_RegisterEnumValue))

   189 #define T0 ((Register)(i12_RegisterEnumValue))

   190 #define T1 ((Register)(i13_RegisterEnumValue))

   191 #define T2 ((Register)(i14_RegisterEnumValue))

   192 #define T3 ((Register)(i15_RegisterEnumValue))

   193 #define S0 ((Register)(i16_RegisterEnumValue))

   194 #define S1 ((Register)(i17_RegisterEnumValue))

   195 #define S2 ((Register)(i18_RegisterEnumValue))

   196 #define S3 ((Register)(i19_RegisterEnumValue))

   197 #define S4 ((Register)(i20_RegisterEnumValue))

   198 #define S5 ((Register)(i21_RegisterEnumValue))

   199 #define S6 ((Register)(i22_RegisterEnumValue))

   200 #define S7 ((Register)(i23_RegisterEnumValue))

   201 #define T8 ((Register)(i24_RegisterEnumValue))

   202 #define T9 ((Register)(i25_RegisterEnumValue))

   203 #define K0 ((Register)(i26_RegisterEnumValue))

   204 #define K1 ((Register)(i27_RegisterEnumValue))

   205 #define GP ((Register)(i28_RegisterEnumValue))

   206 #define SP ((Register)(i29_RegisterEnumValue))

   207 #define FP ((Register)(i30_RegisterEnumValue))

   208 #define S8 ((Register)(i30_RegisterEnumValue))

   209 #define RA ((Register)(i31_RegisterEnumValue))

   210 /*

   211 #define TA0 ((Register)(i8_RegisterEnumValue))

   212 #define TA1 ((Register)(i9_RegisterEnumValue))

   213 #define TA2 ((Register)(i10_RegisterEnumValue))

   214 #define TA3 ((Register)(i11_RegisterEnumValue))

   215 #define T4 ((Register)(i12_RegisterEnumValue))

   216 #define T5 ((Register)(i13_RegisterEnumValue))

   217 #define T6 ((Register)(i14_RegisterEnumValue))

   218 #define T7 ((Register)(i15_RegisterEnumValue))

   219 */

   220 #define c_rarg0       T0

   221 #define c_rarg1       T1

   222 #define Rmethod       S3

   223 #define Rsender       S4

   224 #define Rnext       S1

   226 #define RT0       T0

   227 #define RT1       T1

   228 #define RT2       T2

   229 #define RT3       T3

   230 #define RT4       T8

   231 #define RT5       T9

   232 #endif //_LP64

   235 //for interpreter frame

   236 // bytecode pointer register

   237 #define BCP            S0

   238 // local variable pointer register

   239 #define LVP            S7

   240 // temperary callee saved register, we use this register to save the register maybe blowed cross call_VM

   241 // be sure to save and restore its value in call_stub

   242 #define TSR            S2

   244 //OPT_SAFEPOINT not supported yet

   245 #define OPT_SAFEPOINT 1

   247 #define OPT_THREAD 1

   249 #define TREG          S6

   251 #define  S5_heapbase        S5

   253 #define mh_SP_save                              SP

   255 #define FSR            V0

   256 #define SSR            V1

   257 #define FSF            F0

   258 #define SSF            F1

   259 #define FTF            F14

   260 #define STF            F15

   262 #define AFT            F30

   264 #define RECEIVER      T0

   265 #define IC_Klass      T1

   267 #define SHIFT_count    T3

   269 #endif // DONT_USE_REGISTER_DEFINES

   271 // Use FloatRegister as shortcut

   272 class FloatRegisterImpl;

   273 typedef FloatRegisterImpl* FloatRegister;

   275 inline FloatRegister as_FloatRegister(int encoding) {

   276   return (FloatRegister)(intptr_t) encoding;

   277 }

   279 // The implementation of floating point registers for the ia32 architecture

   280 class FloatRegisterImpl: public AbstractRegisterImpl {

   281  public:

   282   enum {

   283     float_arg_base      = 12,

   284     number_of_registers = 32

   285   };

   287   // construction

   288   inline friend FloatRegister as_FloatRegister(int encoding);

   290   VMReg as_VMReg();

   292   // derived registers, offsets, and addresses

   293   FloatRegister successor() const                          { return as_FloatRegister(encoding() + 1); }

   295   // accessors

   296   int   encoding() const                          { assert(is_valid(), "invalid register"); return (intptr_t)this; }

   297   bool  is_valid() const                          { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }

   298   const char* name() const;

   300 };

   302 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg , (-1));

   304 CONSTANT_REGISTER_DECLARATION(FloatRegister, f0     , ( 0));

   305 CONSTANT_REGISTER_DECLARATION(FloatRegister, f1     , ( 1));

   306 CONSTANT_REGISTER_DECLARATION(FloatRegister, f2     , ( 2));

   307 CONSTANT_REGISTER_DECLARATION(FloatRegister, f3     , ( 3));

   308 CONSTANT_REGISTER_DECLARATION(FloatRegister, f4     , ( 4));

   309 CONSTANT_REGISTER_DECLARATION(FloatRegister, f5     , ( 5));

   310 CONSTANT_REGISTER_DECLARATION(FloatRegister, f6     , ( 6));

   311 CONSTANT_REGISTER_DECLARATION(FloatRegister, f7     , ( 7));

   312 CONSTANT_REGISTER_DECLARATION(FloatRegister, f8     , ( 8));

   313 CONSTANT_REGISTER_DECLARATION(FloatRegister, f9     , ( 9));

   314 CONSTANT_REGISTER_DECLARATION(FloatRegister, f10    , (10));

   315 CONSTANT_REGISTER_DECLARATION(FloatRegister, f11    , (11));

   316 CONSTANT_REGISTER_DECLARATION(FloatRegister, f12    , (12));

   317 CONSTANT_REGISTER_DECLARATION(FloatRegister, f13    , (13));

   318 CONSTANT_REGISTER_DECLARATION(FloatRegister, f14    , (14));

   319 CONSTANT_REGISTER_DECLARATION(FloatRegister, f15    , (15));

   320 CONSTANT_REGISTER_DECLARATION(FloatRegister, f16    , (16));

   321 CONSTANT_REGISTER_DECLARATION(FloatRegister, f17    , (17));

   322 CONSTANT_REGISTER_DECLARATION(FloatRegister, f18    , (18));

   323 CONSTANT_REGISTER_DECLARATION(FloatRegister, f19    , (19));

   324 CONSTANT_REGISTER_DECLARATION(FloatRegister, f20    , (20));

   325 CONSTANT_REGISTER_DECLARATION(FloatRegister, f21    , (21));

   326 CONSTANT_REGISTER_DECLARATION(FloatRegister, f22    , (22));

   327 CONSTANT_REGISTER_DECLARATION(FloatRegister, f23    , (23));

   328 CONSTANT_REGISTER_DECLARATION(FloatRegister, f24    , (24));

   329 CONSTANT_REGISTER_DECLARATION(FloatRegister, f25    , (25));

   330 CONSTANT_REGISTER_DECLARATION(FloatRegister, f26    , (26));

   331 CONSTANT_REGISTER_DECLARATION(FloatRegister, f27    , (27));

   332 CONSTANT_REGISTER_DECLARATION(FloatRegister, f28    , (28));

   333 CONSTANT_REGISTER_DECLARATION(FloatRegister, f29    , (29));

   334 CONSTANT_REGISTER_DECLARATION(FloatRegister, f30    , (30));

   335 CONSTANT_REGISTER_DECLARATION(FloatRegister, f31    , (31));

   337 #ifndef DONT_USE_REGISTER_DEFINES

   338 #define FNOREG ((FloatRegister)(fnoreg_FloatRegisterEnumValue))

   339 #define F0     ((FloatRegister)(    f0_FloatRegisterEnumValue))

   340 #define F1     ((FloatRegister)(    f1_FloatRegisterEnumValue))

   341 #define F2     ((FloatRegister)(    f2_FloatRegisterEnumValue))

   342 #define F3     ((FloatRegister)(    f3_FloatRegisterEnumValue))

   343 #define F4     ((FloatRegister)(    f4_FloatRegisterEnumValue))

   344 #define F5     ((FloatRegister)(    f5_FloatRegisterEnumValue))

   345 #define F6     ((FloatRegister)(    f6_FloatRegisterEnumValue))

   346 #define F7     ((FloatRegister)(    f7_FloatRegisterEnumValue))

   347 #define F8     ((FloatRegister)(    f8_FloatRegisterEnumValue))

   348 #define F9     ((FloatRegister)(    f9_FloatRegisterEnumValue))

   349 #define F10    ((FloatRegister)(   f10_FloatRegisterEnumValue))

   350 #define F11    ((FloatRegister)(   f11_FloatRegisterEnumValue))

   351 #define F12    ((FloatRegister)(   f12_FloatRegisterEnumValue))

   352 #define F13    ((FloatRegister)(   f13_FloatRegisterEnumValue))

   353 #define F14    ((FloatRegister)(   f14_FloatRegisterEnumValue))

   354 #define F15    ((FloatRegister)(   f15_FloatRegisterEnumValue))

   355 #define F16    ((FloatRegister)(   f16_FloatRegisterEnumValue))

   356 #define F17    ((FloatRegister)(   f17_FloatRegisterEnumValue))

   357 #define F18    ((FloatRegister)(   f18_FloatRegisterEnumValue))

   358 #define F19    ((FloatRegister)(   f19_FloatRegisterEnumValue))

   359 #define F20    ((FloatRegister)(   f20_FloatRegisterEnumValue))

   360 #define F21    ((FloatRegister)(   f21_FloatRegisterEnumValue))

   361 #define F22    ((FloatRegister)(   f22_FloatRegisterEnumValue))

   362 #define F23    ((FloatRegister)(   f23_FloatRegisterEnumValue))

   363 #define F24    ((FloatRegister)(   f24_FloatRegisterEnumValue))

   364 #define F25    ((FloatRegister)(   f25_FloatRegisterEnumValue))

   365 #define F26    ((FloatRegister)(   f26_FloatRegisterEnumValue))

   366 #define F27    ((FloatRegister)(   f27_FloatRegisterEnumValue))

   367 #define F28    ((FloatRegister)(   f28_FloatRegisterEnumValue))

   368 #define F29    ((FloatRegister)(   f29_FloatRegisterEnumValue))

   369 #define F30    ((FloatRegister)(   f30_FloatRegisterEnumValue))

   370 #define F31    ((FloatRegister)(   f31_FloatRegisterEnumValue))

   371 #endif // DONT_USE_REGISTER_DEFINES

   374 const int MIPS_ARGS_IN_REGS_NUM = 4;

   376 // Need to know the total number of registers of all sorts for SharedInfo.

   377 // Define a class that exports it.

   378 class ConcreteRegisterImpl : public AbstractRegisterImpl {

   379  public:

   380   enum {

   381   // A big enough number for C2: all the registers plus flags

   382   // This number must be large enough to cover REG_COUNT (defined by c2) registers.

   383   // There is no requirement that any ordering here matches any ordering c2 gives

   384   // it's optoregs.

   385     number_of_registers = (RegisterImpl::number_of_registers + FloatRegisterImpl::number_of_registers)

   386         LP64_ONLY( * 2)

   387   };

   389   static const int max_gpr;

   390   static const int max_fpr;

   393 };

   395 #endif //CPU_MIPS_VM_REGISTER_MIPS_HPP

src/cpu/mips/vm/register_mips.hpp@617b86d17edb

src/cpu/mips/vm/register_mips.hpp

Mercurial > jdk8-mips64-public > hotspot / file revision

src/cpu/mips/vm/register_mips.hpp@617b86d17edb

src/cpu/mips/vm/register_mips.hpp